From 789cbe5032c60c816c9a3a2a9ac1c961a6afa693 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 11 Apr 2019 16:31:51 +0100 Subject: [PATCH] move RecordObject to singlepipe.py for now --- src/add/record_experiment.py | 17 +---------------- src/add/singlepipe.py | 16 ++++++++++++++++ 2 files changed, 17 insertions(+), 16 deletions(-) diff --git a/src/add/record_experiment.py b/src/add/record_experiment.py index 6c2545e0..6ecd6707 100644 --- a/src/add/record_experiment.py +++ b/src/add/record_experiment.py @@ -3,22 +3,7 @@ from nmigen.hdl.rec import Record, Layout, DIR_NONE from nmigen.compat.sim import run_simulation from nmigen.cli import verilog, rtlil from nmigen.compat.fhdl.bitcontainer import value_bits_sign -from singlepipe import flatten - - -class RecordObject(Record): - def __init__(self, name=None): - Record.__init__(self, layout=[], name=None) - - def __setattr__(self, k, v): - if k in dir(Record) or "fields" not in self.__dict__: - return object.__setattr__(self, k, v) - self.__dict__["fields"][k] = v - if isinstance(v, Record): - newlayout = {k: (k, v.layout)} - else: - newlayout = {k: (k, v.shape())} - self.__dict__["layout"].fields.update(newlayout) +from singlepipe import flatten, RecordObject class RecordTest: diff --git a/src/add/singlepipe.py b/src/add/singlepipe.py index 085b73dc..caaedae1 100644 --- a/src/add/singlepipe.py +++ b/src/add/singlepipe.py @@ -174,6 +174,22 @@ from abc import ABCMeta, abstractmethod from collections.abc import Sequence +class RecordObject(Record): + def __init__(self, layout=None, name=None): + Record.__init__(self, layout=layout or [], name=None) + + def __setattr__(self, k, v): + if k in dir(Record) or "fields" not in self.__dict__: + return object.__setattr__(self, k, v) + self.__dict__["fields"][k] = v + if isinstance(v, Record): + newlayout = {k: (k, v.layout)} + else: + newlayout = {k: (k, v.shape())} + self.__dict__["layout"].fields.update(newlayout) + + + class PrevControl: """ contains signals that come *from* the previous stage (both in and out) * i_valid: previous stage indicating all incoming data is valid. -- 2.30.2