From 78bc6033d0e1fa50fe58d7d9d0729c1c701f48e7 Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 9 Jun 2022 19:27:11 +0100 Subject: [PATCH] --- openpower/sv/mv.vec.mdwn | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/openpower/sv/mv.vec.mdwn b/openpower/sv/mv.vec.mdwn index 57ae410e0..7056184a3 100644 --- a/openpower/sv/mv.vec.mdwn +++ b/openpower/sv/mv.vec.mdwn @@ -6,7 +6,7 @@ In the SIMD VSX set, section 6.8.1 and 6.8.2 p254 of v3.0B has a series of pack See -Note that some of these may be covered by [[remap]] which is described in [[sv/propagation]] +Note that some of these may be covered by [[remap]]. # move to/from vec2/3/4 @@ -61,12 +61,12 @@ Also saturation can be applied to individual elements, including the elements wi These are Scalar equivalents to VSX Pack and Unpack: v3.1 Book I Section 6.8 p278. Saturated variants do not need adding because SVP64 overrides add Saturation already. -half source width (word) variants would be helpful for -the Scalar ISA. +More detailed merging may be achieved with [[sv/bitmanip]] +instructions. | 0.5 |6.10|11.15|16..20|21..25|26.....30|31| name | |-----|----|-----|------|------|---------|--|--------------| -| 19 | RT | RC | RB/0 | RA/0 | XO[5:9] |Rc| mv.zip | +| 19 | RTp| RC | RB/0 | RA/0 | XO[5:9] |Rc| mv.zip | | 19 | RT | RC | RS/0 | RA/0 | XO[5:9] |Rc| mv.unzip | these are specialist operations that zip or unzip to/from multiple regs to/from one vector including vec2/3/4. when SUBVL!=1 the vec2/3/4 is the contiguous unit that is copied (as if one register). different elwidths result in zero-extension or truncation except if saturation is enabled, where signed/unsigned may be applied as usual. -- 2.30.2