From 793e17f93b1ad24a86d7a7e25ee34effea4a2689 Mon Sep 17 00:00:00 2001 From: Luis Machado Date: Mon, 13 Nov 2017 10:29:33 +0000 Subject: [PATCH] [Documentation] Fix latency in pipeline description example 2017-11-09 Luis Machado gcc/ * doc/md.texi (Specifying processor pipeline description): Fix incorrect latency for the div instruction example. From-SVN: r254680 --- gcc/ChangeLog | 5 +++++ gcc/doc/md.texi | 4 ++-- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 20391e37432..c31208aa7bc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2017-11-13 Luis Machado + + * doc/md.texi (Specifying processor pipeline description): Fix + incorrect latency for the div instruction example. + 2017-11-13 Jakub Jelinek PR tree-optimization/78821 diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index c4c113850fe..9806b65d1cf 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -9617,7 +9617,7 @@ their result is ready in two cycles. The simple integer insns are issued into the first pipeline unless it is reserved, otherwise they are issued into the second pipeline. Integer division and multiplication insns can be executed only in the second integer -pipeline and their results are ready correspondingly in 8 and 4 +pipeline and their results are ready correspondingly in 9 and 4 cycles. The integer division is not pipelined, i.e.@: the subsequent integer division insn can not be issued until the current division insn finished. Floating point insns are fully pipelined and their @@ -9634,7 +9634,7 @@ incurred. To describe all of this we could specify (define_insn_reservation "mult" 4 (eq_attr "type" "mult") "i1_pipeline, nothing*2, (port0 | port1)") -(define_insn_reservation "div" 8 (eq_attr "type" "div") +(define_insn_reservation "div" 9 (eq_attr "type" "div") "i1_pipeline, div*7, div + (port0 | port1)") (define_insn_reservation "float" 3 (eq_attr "type" "float") -- 2.30.2