From 797d4e00e5b099c667bb55d5a324de21361f8d67 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 23 Jul 2022 10:45:50 +0100 Subject: [PATCH] --- openpower/sv/executive_summary.mdwn | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/openpower/sv/executive_summary.mdwn b/openpower/sv/executive_summary.mdwn index 41622bd2c..fb8d8714a 100644 --- a/openpower/sv/executive_summary.mdwn +++ b/openpower/sv/executive_summary.mdwn @@ -1,13 +1,12 @@ - Simple-V is a Scalable Vector ISA Extension specifically for the Power ISA. It is extremely important to think of Simple-V as a 2-Dimensional ISA: -instructions vertical and registers horizontal, otherwise it will be +instructions vertical and registers horizontal otherwise it will be difficult to understand. Simple-V is **not RISC-V and is not RISC-V Vectors**. NEC SX Aurora, RVV and Simple-V are all based on Cray-style Vectors hence the similarity, -the provision of a `setvl` instruction and why they are called +the provision of a `setvl` instruction and why they are each called "Scalable" Vectors because it is the `setvl` instruction that presents the programmer with explicit control over Vector length. @@ -18,4 +17,12 @@ hot-loops. Links to Simulator and Unit tests: -* Simple-V Simulator +* Unit tests and simulator for Power ISA v3.0 and SVP64 + +* several thousand more ISA unit tests + +* demo, showing 4.5x reduction in program size for MP3 decode, greatly + simplifies assembler development + +* binutils support for SVP64 + -- 2.30.2