From 7988f76d47de2441fa9c2438b0c7560721f6068b Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Thu, 17 Mar 2022 06:37:08 +0000
Subject: [PATCH]

---
 openpower/sv/bitmanip.mdwn | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn
index f50f20748..f69b64ee7 100644
--- a/openpower/sv/bitmanip.mdwn
+++ b/openpower/sv/bitmanip.mdwn
@@ -214,6 +214,9 @@ another mode selection would be CRs not Ints.
 
 # int min/max
 
+required for
+the [[sv/av_opcodes]]
+
 signed and unsigned min/max for integer.  this is sort-of partly synthesiseable in [[sv/svp64]] with pred-result as long as the dest reg is one of the sources, but not both signed and unsigned.  when the dest is also one of the srces and the mv fails due to the CR bittest failing this will only overwrite the dest where the src is greater (or less).
 
 signed/unsigned min/max gives more flexibility.
-- 
2.30.2