From 79c4d73bdd404cb24dee33c34591ef7ec8f3dfa2 Mon Sep 17 00:00:00 2001 From: Kelvin Nilsen Date: Mon, 27 Mar 2017 17:04:07 +0000 Subject: [PATCH] re PR target/80103 (ICE in output_1144, at config/rs6000/vsx.md:2298) gcc/testsuite/ChangeLog: 2017-03-27 Kelvin Nilsen PR target/80103 * gcc.target/powerpc/pr80103-1.c: New test. gcc/ChangeLog: 2017-03-27 Kelvin Nilsen PR target/80103 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Edit and add comments. * config/rs6000/rs6000.c (rs6000_option_override_internal): Add special handling for target option conflicts between dform options (-mpower9-dform, -mpower9-dform-vector, -mpower9-dform-scalar) and -mno-direct-move. From-SVN: r246505 --- gcc/ChangeLog | 10 ++++++ gcc/config/rs6000/rs6000-c.c | 38 ++++++++++++++++---- gcc/config/rs6000/rs6000.c | 27 ++++++++++++++ gcc/testsuite/ChangeLog | 5 +++ gcc/testsuite/gcc.target/powerpc/pr80103-1.c | 16 +++++++++ 5 files changed, 90 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr80103-1.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 600d26476b8..ee07f7ba486 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2017-03-27 Kelvin Nilsen + + PR target/80103 + * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Edit and + add comments. + * config/rs6000/rs6000.c (rs6000_option_override_internal): Add + special handling for target option conflicts between dform + options (-mpower9-dform, -mpower9-dform-vector, + -mpower9-dform-scalar) and -mno-direct-move. + 2017-03-27 Richard Biener PR tree-optimization/80181 diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c index c13b62b1a6b..d8e0a4e1310 100644 --- a/gcc/config/rs6000/rs6000-c.c +++ b/gcc/config/rs6000/rs6000-c.c @@ -429,6 +429,12 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags, if ((flags & OPTION_MASK_POPCNTD) != 0) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7"); /* Note that the OPTION_MASK_DIRECT_MOVE flag is automatically + turned on in the following condition: + 1. TARGET_P9_DFORM_SCALAR or TARGET_P9_DFORM_VECTOR are enabled + and OPTION_MASK_DIRECT_MOVE is not explicitly disabled. + Hereafter, the OPTION_MASK_DIRECT_MOVE flag is considered to + have been turned on explicitly. + Note that the OPTION_MASK_DIRECT_MOVE flag is automatically turned off in any of the following conditions: 1. TARGET_HARD_FLOAT, TARGET_ALTIVEC, or TARGET_VSX is explicitly disabled and OPTION_MASK_DIRECT_MOVE was not explicitly @@ -473,7 +479,12 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags, if (!flag_iso) rs6000_define_or_undefine_macro (define_p, "__APPLE_ALTIVEC__"); } - /* Note that the OPTION_MASK_VSX flag is automatically turned off in + /* Note that the OPTION_MASK_VSX flag is automatically turned on in + the following conditions: + 1. TARGET_P8_VECTOR is explicitly turned on and the OPTION_MASK_VSX + was not explicitly turned off. Hereafter, the OPTION_MASK_VSX + flag is considered to have been explicitly turned on. + Note that the OPTION_MASK_VSX flag is automatically turned off in the following conditions: 1. The operating system does not support saving of AltiVec registers (OS_MISSING_ALTIVEC). @@ -507,6 +518,12 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags, rs6000_define_or_undefine_macro (define_p, "__TM_FENCE__"); } /* Note that the OPTION_MASK_P8_VECTOR flag is automatically turned + on in the following conditions: + 1. TARGET_P9_VECTOR is explicitly turned on and + OPTION_MASK_P8_VECTOR is not explicitly turned off. + Hereafter, the OPTION_MASK_P8_VECTOR flag is considered to + have been turned off explicitly. + Note that the OPTION_MASK_P8_VECTOR flag is automatically turned off in the following conditions: 1. If any of TARGET_HARD_FLOAT, TARGET_ALTIVEC, or TARGET_VSX were turned off explicitly and OPTION_MASK_P8_VECTOR flag was @@ -514,15 +531,24 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags, 2. If TARGET_ALTIVEC is turned off. Hereafter, the OPTION_MASK_P8_VECTOR flag is considered to have been turned off explicitly. - 3. If TARGET_VSX is turned off. Hereafter, the OPTION_MASK_P8_VECTOR - flag is considered to have been turned off explicitly. */ + 3. If TARGET_VSX is turned off and OPTION_MASK_P8_VECTOR was not + explicitly enabled. If TARGET_VSX is explicitly enabled, the + OPTION_MASK_P8_VECTOR flag is hereafter also considered to + have been turned off explicitly. */ if ((flags & OPTION_MASK_P8_VECTOR) != 0) rs6000_define_or_undefine_macro (define_p, "__POWER8_VECTOR__"); /* Note that the OPTION_MASK_P9_VECTOR flag is automatically turned off in the following conditions: - 1. If TARGET_P8_VECTOR is turned off. Hereafter, the - OPTION_MASK_P9_VECTOR flag is considered to have been turned off - explicitly. */ + 1. If TARGET_P8_VECTOR is turned off and OPTION_MASK_P9_VECTOR is + not turned on explicitly. Hereafter, if OPTION_MASK_P8_VECTOR + was turned on explicitly, the OPTION_MASK_P9_VECTOR flag is + also considered to have been turned off explicitly. + Note that the OPTION_MASK_P9_VECTOR is automatically turned on + in the following conditions: + 1. If TARGET_P9_DFORM_SCALAR or TARGET_P9_DFORM_VECTOR and + OPTION_MASK_P9_VECTOR was not turned off explicitly. + Hereafter, THE OPTION_MASK_P9_VECTOR flag is considered to + have been turned on explicitly. */ if ((flags & OPTION_MASK_P9_VECTOR) != 0) rs6000_define_or_undefine_macro (define_p, "__POWER9_VECTOR__"); /* Note that the OPTION_MASK_QUAD_MEMORY flag is automatically diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index c91d2199ace..c63eebfdb3a 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -4595,6 +4595,33 @@ rs6000_option_override_internal (bool global_init_p) } } + if ((TARGET_P9_DFORM_SCALAR || TARGET_P9_DFORM_VECTOR) + && !TARGET_DIRECT_MOVE) + { + /* We prefer to not mention undocumented options in + error messages. However, if users have managed to select + power9-dform without selecting direct-move, they + already know about undocumented flags. */ + if ((rs6000_isa_flags_explicit & OPTION_MASK_DIRECT_MOVE) + && ((rs6000_isa_flags_explicit & OPTION_MASK_P9_DFORM_VECTOR) || + (rs6000_isa_flags_explicit & OPTION_MASK_P9_DFORM_SCALAR) || + (TARGET_P9_DFORM_BOTH == 1))) + error ("-mpower9-dform, -mpower9-dform-vector, -mpower9-dform-scalar" + " require -mdirect-move"); + else if ((rs6000_isa_flags_explicit & OPTION_MASK_DIRECT_MOVE) == 0) + { + rs6000_isa_flags |= OPTION_MASK_DIRECT_MOVE; + rs6000_isa_flags_explicit |= OPTION_MASK_DIRECT_MOVE; + } + else + { + rs6000_isa_flags &= + ~(OPTION_MASK_P9_DFORM_SCALAR | OPTION_MASK_P9_DFORM_VECTOR); + rs6000_isa_flags_explicit |= + (OPTION_MASK_P9_DFORM_SCALAR | OPTION_MASK_P9_DFORM_VECTOR); + } + } + if (TARGET_P9_DFORM_SCALAR && !TARGET_UPPER_REGS_DF) { /* We prefer to not mention undocumented options in diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index bc302a8f757..a6b7a7de560 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-03-27 Kelvin Nilsen + + PR target/80103 + * gcc.target/powerpc/pr80103-1.c: New test. + 2017-03-27 Richard Biener PR tree-optimization/80181 diff --git a/gcc/testsuite/gcc.target/powerpc/pr80103-1.c b/gcc/testsuite/gcc.target/powerpc/pr80103-1.c new file mode 100644 index 00000000000..35d48c4d8ce --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr80103-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-mpower9-dform-vector -mno-direct-move" } */ +/* { dg-excess-errors "expect error due to conflicting target options" } */ +/* Since the error message is not associated with a particular line + number, we cannot use the dg-error directive and cannot specify a + regexp to describe the expected error message. The expected error + message is: "-mpower9-dform, -mpower9-dform-vector, + -mpower9-dform-scalar require -mdirect-move" */ + +int a; +void b (__attribute__ ((__vector_size__ (16))) char c) +{ + a = ((__attributes__ ((__vector_size__ (2 * sizeof (long)))) long) c)[0]; +} -- 2.30.2