From 79eed0d2246e8e7be505784af0078507c712a02c Mon Sep 17 00:00:00 2001 From: Christoph Bumiller Date: Tue, 29 May 2012 17:00:10 +0200 Subject: [PATCH] nvc0/ir: allow 64-bit constant loads on nve4 Looks like only 128-bit access doesn't work. --- src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp | 2 ++ src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp index cfbe3ecf784..6f34b1aeb3c 100644 --- a/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp +++ b/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp @@ -1939,6 +1939,8 @@ FlatteningPass::visit(BasicBlock *bb) !isTextureOp(insn->op) && // probably just nve4 insn->op != OP_LINTERP && // probably just nve4 insn->op != OP_PINTERP && // probably just nve4 + ((insn->op != OP_LOAD && insn->op != OP_STORE) || + typeSizeof(insn->dType) <= 4) && !insn->isNop()) { insn->join = 1; bb->remove(bb->getExit()); diff --git a/src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp b/src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp index e4b9dc18311..0674f12704d 100644 --- a/src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp +++ b/src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp @@ -448,7 +448,7 @@ TargetNVC0::isAccessSupported(DataFile file, DataType ty) const if (ty == TYPE_NONE) return false; if (file == FILE_MEMORY_CONST && getChipset() >= 0xe0) // wrong encoding ? - return typeSizeof(ty) <= 4; + return typeSizeof(ty) <= 8; if (ty == TYPE_B96) return (file == FILE_SHADER_INPUT) || (file == FILE_SHADER_OUTPUT); return true; -- 2.30.2