From 7a96ae22b32fadd001e6183fff9cb3384c2da328 Mon Sep 17 00:00:00 2001 From: Staf Verhaegen Date: Tue, 13 Apr 2021 09:39:37 +0200 Subject: [PATCH] experiments9/freepdk_c4m45: Reduce core size. With a core size of 1.5x1.5mm the effective space margin is 20%. --- experiments9/freepdk_c4m45/doDesign.py | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/experiments9/freepdk_c4m45/doDesign.py b/experiments9/freepdk_c4m45/doDesign.py index 87ada2f..1d31ca5 100644 --- a/experiments9/freepdk_c4m45/doDesign.py +++ b/experiments9/freepdk_c4m45/doDesign.py @@ -135,9 +135,9 @@ def scriptMain (**kw): #helpers.setTraceLevel( 550 ) #Breakpoint.setStopLevel( 100 ) rvalue = True - coreSize = u(37*90.0) - #coreSize = u(59*90.0) - chipBorder = u(2*214.0 + 10*13.0) + coreSize = u(1500.0) + chipSize = u(3400.0) + # chipBorder = u(2*214.0 + 10*13.0) ioSpecs = IoSpecs() pinmuxFile = './ls180/litex_pinpads.json' ioSpecs.loadFromPinmux( pinmuxFile ) @@ -237,7 +237,8 @@ def scriptMain (**kw): ls180Conf.chipConf.name = 'chip' ls180Conf.chipConf.ioPadGauge = 'LibreSOCIO' ls180Conf.coreSize = (coreSize, coreSize) - ls180Conf.chipSize = (coreSize + chipBorder, coreSize + chipBorder) + # ls180Conf.chipSize = (coreSize + chipBorder, coreSize + chipBorder) + ls180Conf.chipSize = (chipSize, chipSize) with UpdateSession(): sliceHeight = ls180Conf.sliceHeight -- 2.30.2