From 7a9a5a4441eeed70b2f5608dd9510612ae195f90 Mon Sep 17 00:00:00 2001 From: John David Anglin Date: Sat, 6 Mar 2004 19:27:52 +0000 Subject: [PATCH] pa.md (icacheflush): Reorder operands to make match_scratch operand last. * pa.md (icacheflush): Reorder operands to make match_scratch operand last. * pa.h (INITIALIZE_TRAMPOLINE): Remove unnecessary scratch argument from calls to gen_icacheflush. From-SVN: r79029 --- gcc/ChangeLog | 7 +++++++ gcc/config/pa/pa.h | 2 -- gcc/config/pa/pa.md | 11 +++++------ 3 files changed, 12 insertions(+), 8 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 774621e66c8..ac59b7c4fbf 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2004-03-06 John David Anglin + + * pa.md (icacheflush): Reorder operands to make match_scratch operand + last. + * pa.h (INITIALIZE_TRAMPOLINE): Remove unnecessary scratch argument + from calls to gen_icacheflush. + 2004-03-06 Richard Henderson * config/alpha/alpha.h (MASK_LONG_DOUBLE_128): New. diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h index e8ba74dba68..200936e8e49 100644 --- a/gcc/config/pa/pa.h +++ b/gcc/config/pa/pa.h @@ -1095,7 +1095,6 @@ extern int may_call_alloca; emit_move_insn (line_length, GEN_INT (MIN_CACHELINE_SIZE)); \ emit_insn (gen_dcacheflush (start_addr, end_addr, line_length)); \ emit_insn (gen_icacheflush (start_addr, end_addr, line_length, \ - gen_reg_rtx (Pmode), \ gen_reg_rtx (Pmode), \ gen_reg_rtx (Pmode))); \ } \ @@ -1128,7 +1127,6 @@ extern int may_call_alloca; emit_move_insn (line_length, GEN_INT (MIN_CACHELINE_SIZE)); \ emit_insn (gen_dcacheflush (start_addr, end_addr, line_length)); \ emit_insn (gen_icacheflush (start_addr, end_addr, line_length, \ - gen_reg_rtx (Pmode), \ gen_reg_rtx (Pmode), \ gen_reg_rtx (Pmode))); \ } \ diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index 4f060e3191e..f13a7a84a88 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -8858,8 +8858,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ;; Operand 0 contains the start address. ;; Operand 1 contains the end address. ;; Operand 2 contains the line length to use. -;; Operand 3 contains the start address (clobbered). -;; Operands 4 and 5 (icacheflush) are clobbered scratch registers. +;; Operands 3 and 4 (icacheflush) are clobbered scratch registers. (define_insn "dcacheflush" [(const_int 1) (unspec_volatile [(mem:BLK (scratch))] 0) @@ -8884,16 +8883,16 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" (use (match_operand 0 "pmode_register_operand" "r")) (use (match_operand 1 "pmode_register_operand" "r")) (use (match_operand 2 "pmode_register_operand" "r")) - (clobber (match_scratch 3 "=&0")) + (clobber (match_operand 3 "pmode_register_operand" "=&r")) (clobber (match_operand 4 "pmode_register_operand" "=&r")) - (clobber (match_operand 5 "pmode_register_operand" "=&r"))] + (clobber (match_scratch 5 "=&0"))] "" "* { if (TARGET_64BIT) - return \"mfsp %%sr0,%5\;ldsid (%3),%4\;mtsp %4,%%sr0\;cmpb,*<<=,n %3,%1,.\;fic,m %2(%%sr0,%3)\;sync\;mtsp %5,%%sr0\;nop\;nop\;nop\;nop\;nop\;nop\"; + return \"mfsp %%sr0,%4\;ldsid (%5),%3\;mtsp %3,%%sr0\;cmpb,*<<=,n %5,%1,.\;fic,m %2(%%sr0,%5)\;sync\;mtsp %4,%%sr0\;nop\;nop\;nop\;nop\;nop\;nop\"; else - return \"mfsp %%sr0,%5\;ldsid (%3),%4\;mtsp %4,%%sr0\;cmpb,<<=,n %3,%1,.\;fic,m %2(%%sr0,%3)\;sync\;mtsp %5,%%sr0\;nop\;nop\;nop\;nop\;nop\;nop\"; + return \"mfsp %%sr0,%4\;ldsid (%5),%3\;mtsp %3,%%sr0\;cmpb,<<=,n %5,%1,.\;fic,m %2(%%sr0,%5)\;sync\;mtsp %4,%%sr0\;nop\;nop\;nop\;nop\;nop\;nop\"; }" [(set_attr "type" "multi") (set_attr "length" "52")]) -- 2.30.2