From 7abc36cc997553532214a77cdb555bdaada8dfb3 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Thu, 20 Dec 2018 16:32:46 +0000 Subject: [PATCH] [AArch64][SVE] Fix IFN_COND_FMLA movprfx alternative This patch fixes a cut-&-pasto in the (match_dup 4) version of "cond_". (It's a shame that there's so much cut-&-paste in these patterns, but it's hard to avoid without more infrastructure.) 2018-12-20 Richard Sandiford gcc/ * config/aarch64/aarch64-sve.md (*cond__4): Use sve_fmla_op rather than sve_fmad_op for the movprfx alternative. gcc/testsuite/ * gcc.target/aarch64/sve/fmla_2.c: New test. * gcc.target/aarch64/sve/fmla_2_run.c: Likewise From-SVN: r267303 --- gcc/ChangeLog | 5 ++++ gcc/config/aarch64/aarch64-sve.md | 2 +- gcc/testsuite/ChangeLog | 5 ++++ gcc/testsuite/gcc.target/aarch64/sve/fmla_2.c | 19 +++++++++++++ .../gcc.target/aarch64/sve/fmla_2_run.c | 28 +++++++++++++++++++ 5 files changed, 58 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/fmla_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/fmla_2_run.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4a7fb435d20..7d9c5c60325 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2018-12-20 Richard Sandiford + + * config/aarch64/aarch64-sve.md (*cond__4): Use + sve_fmla_op rather than sve_fmad_op for the movprfx alternative. + 2018-12-20 Martin Jambor PR ipa/88214 diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index 8569a8e1ea7..e47e3bab71c 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -3021,7 +3021,7 @@ "TARGET_SVE" "@ \t%0., %1/m, %2., %3. - movprfx\t%0, %4\;\t%0., %1/m, %2., %3." + movprfx\t%0, %4\;\t%0., %1/m, %2., %3." [(set_attr "movprfx" "*,yes")] ) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2a78f9722a9..da6182cd269 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-12-20 Richard Sandiford + + * gcc.target/aarch64/sve/fmla_2.c: New test. + * gcc.target/aarch64/sve/fmla_2_run.c: Likewise + 2018-12-20 Martin Sebor PR tree-optimization/84053 diff --git a/gcc/testsuite/gcc.target/aarch64/sve/fmla_2.c b/gcc/testsuite/gcc.target/aarch64/sve/fmla_2.c new file mode 100644 index 00000000000..5c04bcdb3f5 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/fmla_2.c @@ -0,0 +1,19 @@ +/* { dg-options "-O3" } */ + +#include + +#define N 55 + +void __attribute__ ((noipa)) +f (double *restrict a, double *restrict b, double *restrict c, + double *restrict d, double *restrict e, int64_t *restrict cond) +{ + for (int i = 0; i < N; ++i) + { + a[i] = cond[i] ? __builtin_fma (c[i], d[i], e[i]) : e[i]; + b[i] = cond[i] ? __builtin_fma (c[i], e[i], d[i]) : d[i]; + } +} + +/* { dg-final { scan-assembler-times {\tfmla\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */ +/* { dg-final { scan-assembler-not {\tfmad\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/fmla_2_run.c b/gcc/testsuite/gcc.target/aarch64/sve/fmla_2_run.c new file mode 100644 index 00000000000..6d9a2a3ca98 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/fmla_2_run.c @@ -0,0 +1,28 @@ +/* { dg-do run { target aarch64_sve_hw } } */ +/* { dg-options "-O3" } */ + +#include "fmla_2.c" + +int __attribute__ ((optimize (1))) +main (void) +{ + double a[N], b[N], c[N], d[N], e[N]; + int64_t cond[N]; + + for (int i = 0; i < N; ++i) + { + c[i] = i + i % 5; + d[i] = i + i % 7; + e[i] = i + i % 9; + cond[i] = i % 3; + } + + f (a, b, c, d, e, cond); + + for (int i = 0; i < N; ++i) + if (a[i] != (cond[i] ? __builtin_fma (c[i], d[i], e[i]) : e[i]) + || b[i] != (cond[i] ? __builtin_fma (c[i], e[i], d[i]) : d[i])) + __builtin_abort (); + + return 0; +} -- 2.30.2