From 7af51b8f0359131dbb11cf64c54638029aebad84 Mon Sep 17 00:00:00 2001 From: Jordan Justen Date: Sat, 11 Jun 2016 16:44:27 -0700 Subject: [PATCH] i965: Add function to copy a stencil miptree to an R8_UINT miptree v2: * Cleanups suggested by Ian, Matt and Topi Signed-off-by: Jordan Justen Reviewed-by: Ian Romanick Reviewed-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 57 ++++++++++++++++++- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 4 ++ 2 files changed, 60 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index d4f6c34c7e9..c33d8fcbf2c 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -674,7 +674,6 @@ miptree_create(struct brw_context *brw, etc_format = (format != tex_format) ? tex_format : MESA_FORMAT_NONE; - assert((layout_flags & MIPTREE_LAYOUT_DISABLE_AUX) == 0); assert((layout_flags & MIPTREE_LAYOUT_FOR_BO) == 0); mt = intel_miptree_create_layout(brw, target, format, first_level, last_level, width0, @@ -2286,6 +2285,62 @@ intel_miptree_updownsample(struct brw_context *brw, } } +void +intel_update_r8stencil(struct brw_context *brw, + struct intel_mipmap_tree *mt) +{ + assert(brw->gen >= 7); + struct intel_mipmap_tree *src = + mt->format == MESA_FORMAT_S_UINT8 ? mt : mt->stencil_mt; + if (!src || brw->gen >= 8 || !src->r8stencil_needs_update) + return; + + if (!mt->r8stencil_mt) { + const uint32_t r8stencil_flags = + MIPTREE_LAYOUT_ACCELERATED_UPLOAD | MIPTREE_LAYOUT_TILING_Y | + MIPTREE_LAYOUT_DISABLE_AUX; + assert(brw->gen > 6); /* Handle MIPTREE_LAYOUT_FORCE_ALL_SLICE_AT_LOD */ + mt->r8stencil_mt = intel_miptree_create(brw, + src->target, + MESA_FORMAT_R_UINT8, + src->first_level, + src->last_level, + src->logical_width0, + src->logical_height0, + src->logical_depth0, + src->num_samples, + r8stencil_flags); + assert(mt->r8stencil_mt); + } + + struct intel_mipmap_tree *dst = mt->r8stencil_mt; + + for (int level = src->first_level; level <= src->last_level; level++) { + const unsigned depth = src->level[level].depth; + const int layers_per_blit = + (dst->msaa_layout == INTEL_MSAA_LAYOUT_UMS || + dst->msaa_layout == INTEL_MSAA_LAYOUT_CMS) ? + dst->num_samples : 1; + + for (unsigned layer = 0; layer < depth; layer++) { + brw_blorp_blit_miptrees(brw, + src, level, layer, + src->format, SWIZZLE_X, + dst, level, layers_per_blit * layer, + MESA_FORMAT_R_UNORM8, + 0, 0, + src->logical_width0, src->logical_height0, + 0, 0, + dst->logical_width0, dst->logical_height0, + GL_NEAREST, false, false /*mirror x, y*/, + false, false /* decode/encode srgb */); + } + } + + brw_render_cache_set_check_flush(brw, dst->bo); + src->r8stencil_needs_update = false; +} + static void * intel_miptree_map_raw(struct brw_context *brw, struct intel_mipmap_tree *mt) { diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h index 44731261216..e7d4de06a28 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h @@ -974,6 +974,10 @@ intel_miptree_updownsample(struct brw_context *brw, struct intel_mipmap_tree *src, struct intel_mipmap_tree *dst); +void +intel_update_r8stencil(struct brw_context *brw, + struct intel_mipmap_tree *mt); + /** * Horizontal distance from one slice to the next in the two-dimensional * miptree layout. -- 2.30.2