From 7b7917a42410fd02220b3aea2f51eaee94d1e746 Mon Sep 17 00:00:00 2001 From: Bas Nieuwenhuizen Date: Mon, 20 Jul 2020 01:43:18 +0200 Subject: [PATCH] radeonsi: Inhibit clock-gating for perf counters. MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Otherwise most counters return 0. Should be much more user friendly than having to totally disable clock-gating on the kernel cmdline. Reviewed-by: Marek Olšák Part-of: --- src/gallium/drivers/radeonsi/si_perfcounter.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_perfcounter.c b/src/gallium/drivers/radeonsi/si_perfcounter.c index 8825926064d..d2f0db81d2c 100644 --- a/src/gallium/drivers/radeonsi/si_perfcounter.c +++ b/src/gallium/drivers/radeonsi/si_perfcounter.c @@ -919,6 +919,17 @@ static void si_pc_query_destroy(struct si_context *sctx, struct si_query *squery FREE(query); } +static void si_inhibit_clockgating(struct si_context *sctx, bool inhibit) +{ + if (sctx->chip_class >= GFX10) { + radeon_set_uconfig_reg(sctx->gfx_cs, R_037390_RLC_PERFMON_CLK_CNTL, + S_037390_PERFMON_CLOCK_STATE(inhibit)); + } else if (sctx->chip_class >= GFX8) { + radeon_set_uconfig_reg(sctx->gfx_cs, R_0372FC_RLC_PERFMON_CLK_CNTL, + S_0372FC_PERFMON_CLOCK_STATE(inhibit)); + } +} + static void si_pc_query_resume(struct si_context *sctx, struct si_query *squery) /* struct si_query_hw *hwquery, @@ -935,6 +946,8 @@ static void si_pc_query_resume(struct si_context *sctx, struct si_query *squery) if (query->shaders) si_pc_emit_shaders(sctx, query->shaders); + si_inhibit_clockgating(sctx, true); + for (struct si_query_group *group = query->groups; group; group = group->next) { struct si_pc_block *block = group->block; @@ -986,6 +999,8 @@ static void si_pc_query_suspend(struct si_context *sctx, struct si_query *squery } si_pc_emit_instance(sctx, -1, -1); + + si_inhibit_clockgating(sctx, false); } static bool si_pc_query_begin(struct si_context *ctx, struct si_query *squery) -- 2.30.2