From 7bb15c6f21865baeedeb6e3765af8643c082cf47 Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Mon, 6 Aug 2012 20:19:34 +0000 Subject: [PATCH] gas/testsuite/ * gas/i386/x86-64-stack.s: Add cases for push immediate. * gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d: Updated. * gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d: Updated. * gas/testsuite/gas/i386/ilp32/x86-64-stack.d: Updated. * gas/testsuite/gas/i386/x86-64-stack-intel.d: Updated. * gas/testsuite/gas/i386/x86-64-stack-suffix.d: Updated. * gas/testsuite/gas/i386/x86-64-stack.d: Updated. opcodes/ * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG. (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG. (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG. (OP_E_register): Likewise. (OP_REG): For low 8 whole registers, treat REX_W like DFLAG. --- gas/testsuite/ChangeLog | 10 ++- .../gas/i386/ilp32/x86-64-stack-intel.d | 30 ++++++--- .../gas/i386/ilp32/x86-64-stack-suffix.d | 30 ++++++--- gas/testsuite/gas/i386/ilp32/x86-64-stack.d | 30 ++++++--- gas/testsuite/gas/i386/x86-64-stack-intel.d | 30 ++++++--- gas/testsuite/gas/i386/x86-64-stack-suffix.d | 30 ++++++--- gas/testsuite/gas/i386/x86-64-stack.d | 30 ++++++--- gas/testsuite/gas/i386/x86-64-stack.s | 10 +++ opcodes/ChangeLog | 10 +++ opcodes/i386-dis.c | 64 ++++++++++--------- 10 files changed, 183 insertions(+), 91 deletions(-) diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 61ef22a771d..fd73ccecfd8 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,4 +1,12 @@ -2012-08-03 Roland McGrath +2012-08-06 Roland McGrath + + * gas/i386/x86-64-stack.s: Add cases for push immediate. + * gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d: Updated. + * gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d: Updated. + * gas/testsuite/gas/i386/ilp32/x86-64-stack.d: Updated. + * gas/testsuite/gas/i386/x86-64-stack-intel.d: Updated. + * gas/testsuite/gas/i386/x86-64-stack-suffix.d: Updated. + * gas/testsuite/gas/i386/x86-64-stack.d: Updated. * gas/i386/x86-64-stack.s (try): Also try just rex.W (0x48) prefix. * gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d: Updated. diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d b/gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d index 7092a42a251..fbcada2f817 100644 --- a/gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d +++ b/gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d @@ -10,41 +10,51 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 50 push rax [ ]*[a-f0-9]+: 66 50 push ax [ ]*[a-f0-9]+: 48 50 rex.W push rax -[ ]*[a-f0-9]+: 66 48 50 data32 push rax +[ ]*[a-f0-9]+: 66 48 50 data32 rex.W push rax [ ]*[a-f0-9]+: 58 pop rax [ ]*[a-f0-9]+: 66 58 pop ax [ ]*[a-f0-9]+: 48 58 rex.W pop rax -[ ]*[a-f0-9]+: 66 48 58 data32 pop rax +[ ]*[a-f0-9]+: 66 48 58 data32 rex.W pop rax [ ]*[a-f0-9]+: 8f c0 pop rax [ ]*[a-f0-9]+: 66 8f c0 pop ax [ ]*[a-f0-9]+: 48 8f c0 rex.W pop rax -[ ]*[a-f0-9]+: 66 48 8f c0 data32 pop rax +[ ]*[a-f0-9]+: 66 48 8f c0 data32 rex.W pop rax [ ]*[a-f0-9]+: 8f 00 pop QWORD PTR \[rax\] [ ]*[a-f0-9]+: 66 8f 00 pop WORD PTR \[rax\] [ ]*[a-f0-9]+: 48 8f 00 rex.W pop QWORD PTR \[rax\] -[ ]*[a-f0-9]+: 66 48 8f 00 data32 pop QWORD PTR \[rax\] +[ ]*[a-f0-9]+: 66 48 8f 00 data32 rex.W pop QWORD PTR \[rax\] [ ]*[a-f0-9]+: ff d0 call rax [ ]*[a-f0-9]+: 66 ff d0 call ax [ ]*[a-f0-9]+: 48 ff d0 rex.W call rax -[ ]*[a-f0-9]+: 66 48 ff d0 data32 call rax +[ ]*[a-f0-9]+: 66 48 ff d0 data32 rex.W call rax [ ]*[a-f0-9]+: ff 10 call QWORD PTR \[rax\] [ ]*[a-f0-9]+: 66 ff 10 call WORD PTR \[rax\] [ ]*[a-f0-9]+: 48 ff 10 rex.W call QWORD PTR \[rax\] -[ ]*[a-f0-9]+: 66 48 ff 10 data32 call QWORD PTR \[rax\] +[ ]*[a-f0-9]+: 66 48 ff 10 data32 rex.W call QWORD PTR \[rax\] [ ]*[a-f0-9]+: ff e0 jmp rax [ ]*[a-f0-9]+: 66 ff e0 jmp ax [ ]*[a-f0-9]+: 48 ff e0 rex.W jmp rax -[ ]*[a-f0-9]+: 66 48 ff e0 data32 jmp rax +[ ]*[a-f0-9]+: 66 48 ff e0 data32 rex.W jmp rax [ ]*[a-f0-9]+: ff 20 jmp QWORD PTR \[rax\] [ ]*[a-f0-9]+: 66 ff 20 jmp WORD PTR \[rax\] [ ]*[a-f0-9]+: 48 ff 20 rex.W jmp QWORD PTR \[rax\] -[ ]*[a-f0-9]+: 66 48 ff 20 data32 jmp QWORD PTR \[rax\] +[ ]*[a-f0-9]+: 66 48 ff 20 data32 rex.W jmp QWORD PTR \[rax\] [ ]*[a-f0-9]+: ff f0 push rax [ ]*[a-f0-9]+: 66 ff f0 push ax [ ]*[a-f0-9]+: 48 ff f0 rex.W push rax -[ ]*[a-f0-9]+: 66 48 ff f0 data32 push rax +[ ]*[a-f0-9]+: 66 48 ff f0 data32 rex.W push rax [ ]*[a-f0-9]+: ff 30 push QWORD PTR \[rax\] [ ]*[a-f0-9]+: 66 ff 30 push WORD PTR \[rax\] [ ]*[a-f0-9]+: 48 ff 30 rex.W push QWORD PTR \[rax\] -[ ]*[a-f0-9]+: 66 48 ff 30 data32 push QWORD PTR \[rax\] +[ ]*[a-f0-9]+: 66 48 ff 30 data32 rex.W push QWORD PTR \[rax\] +[ ]*[a-f0-9]+: 6a ff push 0xffffffffffffffff +[ ]*[a-f0-9]+: 66 6a ff pushw 0xffff +[ ]*[a-f0-9]+: 48 6a ff rex.W push 0xffffffffffffffff +[ ]*[a-f0-9]+: 66 48 6a ff data32 rex.W push 0xffffffffffffffff +[ ]*[a-f0-9]+: 68 01 02 03 04 push 0x4030201 +[ ]*[a-f0-9]+: 66 68 01 02 pushw 0x201 +[ ]*[a-f0-9]+: 03 04 48 add eax,DWORD PTR \[rax\+rcx\*2\] +[ ]*[a-f0-9]+: 68 01 02 03 04 push 0x4030201 +[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data32 rex.W push 0x4030201 +[ ]*[a-f0-9]+: 90 nop #pass diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d b/gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d index 45101dd3d48..dd2f3da3bc8 100644 --- a/gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d +++ b/gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d @@ -10,41 +10,51 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 50 pushq %rax [ ]*[a-f0-9]+: 66 50 pushw %ax [ ]*[a-f0-9]+: 48 50 rex.W pushq %rax -[ ]*[a-f0-9]+: 66 48 50 data32 pushq %rax +[ ]*[a-f0-9]+: 66 48 50 data32 rex.W pushq %rax [ ]*[a-f0-9]+: 58 popq %rax [ ]*[a-f0-9]+: 66 58 popw %ax [ ]*[a-f0-9]+: 48 58 rex.W popq %rax -[ ]*[a-f0-9]+: 66 48 58 data32 popq %rax +[ ]*[a-f0-9]+: 66 48 58 data32 rex.W popq %rax [ ]*[a-f0-9]+: 8f c0 popq %rax [ ]*[a-f0-9]+: 66 8f c0 popw %ax [ ]*[a-f0-9]+: 48 8f c0 rex.W popq %rax -[ ]*[a-f0-9]+: 66 48 8f c0 data32 popq %rax +[ ]*[a-f0-9]+: 66 48 8f c0 data32 rex.W popq %rax [ ]*[a-f0-9]+: 8f 00 popq \(%rax\) [ ]*[a-f0-9]+: 66 8f 00 popw \(%rax\) [ ]*[a-f0-9]+: 48 8f 00 rex.W popq \(%rax\) -[ ]*[a-f0-9]+: 66 48 8f 00 data32 popq \(%rax\) +[ ]*[a-f0-9]+: 66 48 8f 00 data32 rex.W popq \(%rax\) [ ]*[a-f0-9]+: ff d0 callq \*%rax [ ]*[a-f0-9]+: 66 ff d0 callw \*%ax [ ]*[a-f0-9]+: 48 ff d0 rex.W callq \*%rax -[ ]*[a-f0-9]+: 66 48 ff d0 data32 callq \*%rax +[ ]*[a-f0-9]+: 66 48 ff d0 data32 rex.W callq \*%rax [ ]*[a-f0-9]+: ff 10 callq \*\(%rax\) [ ]*[a-f0-9]+: 66 ff 10 callw \*\(%rax\) [ ]*[a-f0-9]+: 48 ff 10 rex.W callq \*\(%rax\) -[ ]*[a-f0-9]+: 66 48 ff 10 data32 callq \*\(%rax\) +[ ]*[a-f0-9]+: 66 48 ff 10 data32 rex.W callq \*\(%rax\) [ ]*[a-f0-9]+: ff e0 jmpq \*%rax [ ]*[a-f0-9]+: 66 ff e0 jmpw \*%ax [ ]*[a-f0-9]+: 48 ff e0 rex.W jmpq \*%rax -[ ]*[a-f0-9]+: 66 48 ff e0 data32 jmpq \*%rax +[ ]*[a-f0-9]+: 66 48 ff e0 data32 rex.W jmpq \*%rax [ ]*[a-f0-9]+: ff 20 jmpq \*\(%rax\) [ ]*[a-f0-9]+: 66 ff 20 jmpw \*\(%rax\) [ ]*[a-f0-9]+: 48 ff 20 rex.W jmpq \*\(%rax\) -[ ]*[a-f0-9]+: 66 48 ff 20 data32 jmpq \*\(%rax\) +[ ]*[a-f0-9]+: 66 48 ff 20 data32 rex.W jmpq \*\(%rax\) [ ]*[a-f0-9]+: ff f0 pushq %rax [ ]*[a-f0-9]+: 66 ff f0 pushw %ax [ ]*[a-f0-9]+: 48 ff f0 rex.W pushq %rax -[ ]*[a-f0-9]+: 66 48 ff f0 data32 pushq %rax +[ ]*[a-f0-9]+: 66 48 ff f0 data32 rex.W pushq %rax [ ]*[a-f0-9]+: ff 30 pushq \(%rax\) [ ]*[a-f0-9]+: 66 ff 30 pushw \(%rax\) [ ]*[a-f0-9]+: 48 ff 30 rex.W pushq \(%rax\) -[ ]*[a-f0-9]+: 66 48 ff 30 data32 pushq \(%rax\) +[ ]*[a-f0-9]+: 66 48 ff 30 data32 rex.W pushq \(%rax\) +[ ]*[a-f0-9]+: 6a ff pushq \$0xffffffffffffffff +[ ]*[a-f0-9]+: 66 6a ff pushw \$0xffff +[ ]*[a-f0-9]+: 48 6a ff rex.W pushq \$0xffffffffffffffff +[ ]*[a-f0-9]+: 66 48 6a ff data32 rex.W pushq \$0xffffffffffffffff +[ ]*[a-f0-9]+: 68 01 02 03 04 pushq \$0x4030201 +[ ]*[a-f0-9]+: 66 68 01 02 pushw \$0x201 +[ ]*[a-f0-9]+: 03 04 48 addl \(%rax,%rcx,2\),%eax +[ ]*[a-f0-9]+: 68 01 02 03 04 pushq \$0x4030201 +[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data32 rex.W pushq \$0x4030201 +[ ]*[a-f0-9]+: 90 nop #pass diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-stack.d b/gas/testsuite/gas/i386/ilp32/x86-64-stack.d index 4976597c295..9f4553ab98d 100644 --- a/gas/testsuite/gas/i386/ilp32/x86-64-stack.d +++ b/gas/testsuite/gas/i386/ilp32/x86-64-stack.d @@ -10,41 +10,51 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 50 push %rax [ ]*[a-f0-9]+: 66 50 push %ax [ ]*[a-f0-9]+: 48 50 rex.W push %rax -[ ]*[a-f0-9]+: 66 48 50 data32 push %rax +[ ]*[a-f0-9]+: 66 48 50 data32 rex.W push %rax [ ]*[a-f0-9]+: 58 pop %rax [ ]*[a-f0-9]+: 66 58 pop %ax [ ]*[a-f0-9]+: 48 58 rex.W pop %rax -[ ]*[a-f0-9]+: 66 48 58 data32 pop %rax +[ ]*[a-f0-9]+: 66 48 58 data32 rex.W pop %rax [ ]*[a-f0-9]+: 8f c0 pop %rax [ ]*[a-f0-9]+: 66 8f c0 pop %ax [ ]*[a-f0-9]+: 48 8f c0 rex.W pop %rax -[ ]*[a-f0-9]+: 66 48 8f c0 data32 pop %rax +[ ]*[a-f0-9]+: 66 48 8f c0 data32 rex.W pop %rax [ ]*[a-f0-9]+: 8f 00 popq \(%rax\) [ ]*[a-f0-9]+: 66 8f 00 popw \(%rax\) [ ]*[a-f0-9]+: 48 8f 00 rex.W popq \(%rax\) -[ ]*[a-f0-9]+: 66 48 8f 00 data32 popq \(%rax\) +[ ]*[a-f0-9]+: 66 48 8f 00 data32 rex.W popq \(%rax\) [ ]*[a-f0-9]+: ff d0 callq \*%rax [ ]*[a-f0-9]+: 66 ff d0 callw \*%ax [ ]*[a-f0-9]+: 48 ff d0 rex.W callq \*%rax -[ ]*[a-f0-9]+: 66 48 ff d0 data32 callq \*%rax +[ ]*[a-f0-9]+: 66 48 ff d0 data32 rex.W callq \*%rax [ ]*[a-f0-9]+: ff 10 callq \*\(%rax\) [ ]*[a-f0-9]+: 66 ff 10 callw \*\(%rax\) [ ]*[a-f0-9]+: 48 ff 10 rex.W callq \*\(%rax\) -[ ]*[a-f0-9]+: 66 48 ff 10 data32 callq \*\(%rax\) +[ ]*[a-f0-9]+: 66 48 ff 10 data32 rex.W callq \*\(%rax\) [ ]*[a-f0-9]+: ff e0 jmpq \*%rax [ ]*[a-f0-9]+: 66 ff e0 jmpw \*%ax [ ]*[a-f0-9]+: 48 ff e0 rex.W jmpq \*%rax -[ ]*[a-f0-9]+: 66 48 ff e0 data32 jmpq \*%rax +[ ]*[a-f0-9]+: 66 48 ff e0 data32 rex.W jmpq \*%rax [ ]*[a-f0-9]+: ff 20 jmpq \*\(%rax\) [ ]*[a-f0-9]+: 66 ff 20 jmpw \*\(%rax\) [ ]*[a-f0-9]+: 48 ff 20 rex.W jmpq \*\(%rax\) -[ ]*[a-f0-9]+: 66 48 ff 20 data32 jmpq \*\(%rax\) +[ ]*[a-f0-9]+: 66 48 ff 20 data32 rex.W jmpq \*\(%rax\) [ ]*[a-f0-9]+: ff f0 push %rax [ ]*[a-f0-9]+: 66 ff f0 push %ax [ ]*[a-f0-9]+: 48 ff f0 rex.W push %rax -[ ]*[a-f0-9]+: 66 48 ff f0 data32 push %rax +[ ]*[a-f0-9]+: 66 48 ff f0 data32 rex.W push %rax [ ]*[a-f0-9]+: ff 30 pushq \(%rax\) [ ]*[a-f0-9]+: 66 ff 30 pushw \(%rax\) [ ]*[a-f0-9]+: 48 ff 30 rex.W pushq \(%rax\) -[ ]*[a-f0-9]+: 66 48 ff 30 data32 pushq \(%rax\) +[ ]*[a-f0-9]+: 66 48 ff 30 data32 rex.W pushq \(%rax\) +[ ]*[a-f0-9]+: 6a ff pushq \$0xffffffffffffffff +[ ]*[a-f0-9]+: 66 6a ff pushw \$0xffff +[ ]*[a-f0-9]+: 48 6a ff rex.W pushq \$0xffffffffffffffff +[ ]*[a-f0-9]+: 66 48 6a ff data32 rex.W pushq \$0xffffffffffffffff +[ ]*[a-f0-9]+: 68 01 02 03 04 pushq \$0x4030201 +[ ]*[a-f0-9]+: 66 68 01 02 pushw \$0x201 +[ ]*[a-f0-9]+: 03 04 48 add \(%rax,%rcx,2\),%eax +[ ]*[a-f0-9]+: 68 01 02 03 04 pushq \$0x4030201 +[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data32 rex.W pushq \$0x4030201 +[ ]*[a-f0-9]+: 90 nop #pass diff --git a/gas/testsuite/gas/i386/x86-64-stack-intel.d b/gas/testsuite/gas/i386/x86-64-stack-intel.d index 4c54af77597..cb9ee899879 100644 --- a/gas/testsuite/gas/i386/x86-64-stack-intel.d +++ b/gas/testsuite/gas/i386/x86-64-stack-intel.d @@ -10,41 +10,51 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 50 push rax [ ]*[a-f0-9]+: 66 50 push ax [ ]*[a-f0-9]+: 48 50 rex.W push rax -[ ]*[a-f0-9]+: 66 48 50 data32 push rax +[ ]*[a-f0-9]+: 66 48 50 data32 rex.W push rax [ ]*[a-f0-9]+: 58 pop rax [ ]*[a-f0-9]+: 66 58 pop ax [ ]*[a-f0-9]+: 48 58 rex.W pop rax -[ ]*[a-f0-9]+: 66 48 58 data32 pop rax +[ ]*[a-f0-9]+: 66 48 58 data32 rex.W pop rax [ ]*[a-f0-9]+: 8f c0 pop rax [ ]*[a-f0-9]+: 66 8f c0 pop ax [ ]*[a-f0-9]+: 48 8f c0 rex.W pop rax -[ ]*[a-f0-9]+: 66 48 8f c0 data32 pop rax +[ ]*[a-f0-9]+: 66 48 8f c0 data32 rex.W pop rax [ ]*[a-f0-9]+: 8f 00 pop QWORD PTR \[rax\] [ ]*[a-f0-9]+: 66 8f 00 pop WORD PTR \[rax\] [ ]*[a-f0-9]+: 48 8f 00 rex.W pop QWORD PTR \[rax\] -[ ]*[a-f0-9]+: 66 48 8f 00 data32 pop QWORD PTR \[rax\] +[ ]*[a-f0-9]+: 66 48 8f 00 data32 rex.W pop QWORD PTR \[rax\] [ ]*[a-f0-9]+: ff d0 call rax [ ]*[a-f0-9]+: 66 ff d0 call ax [ ]*[a-f0-9]+: 48 ff d0 rex.W call rax -[ ]*[a-f0-9]+: 66 48 ff d0 data32 call rax +[ ]*[a-f0-9]+: 66 48 ff d0 data32 rex.W call rax [ ]*[a-f0-9]+: ff 10 call QWORD PTR \[rax\] [ ]*[a-f0-9]+: 66 ff 10 call WORD PTR \[rax\] [ ]*[a-f0-9]+: 48 ff 10 rex.W call QWORD PTR \[rax\] -[ ]*[a-f0-9]+: 66 48 ff 10 data32 call QWORD PTR \[rax\] +[ ]*[a-f0-9]+: 66 48 ff 10 data32 rex.W call QWORD PTR \[rax\] [ ]*[a-f0-9]+: ff e0 jmp rax [ ]*[a-f0-9]+: 66 ff e0 jmp ax [ ]*[a-f0-9]+: 48 ff e0 rex.W jmp rax -[ ]*[a-f0-9]+: 66 48 ff e0 data32 jmp rax +[ ]*[a-f0-9]+: 66 48 ff e0 data32 rex.W jmp rax [ ]*[a-f0-9]+: ff 20 jmp QWORD PTR \[rax\] [ ]*[a-f0-9]+: 66 ff 20 jmp WORD PTR \[rax\] [ ]*[a-f0-9]+: 48 ff 20 rex.W jmp QWORD PTR \[rax\] -[ ]*[a-f0-9]+: 66 48 ff 20 data32 jmp QWORD PTR \[rax\] +[ ]*[a-f0-9]+: 66 48 ff 20 data32 rex.W jmp QWORD PTR \[rax\] [ ]*[a-f0-9]+: ff f0 push rax [ ]*[a-f0-9]+: 66 ff f0 push ax [ ]*[a-f0-9]+: 48 ff f0 rex.W push rax -[ ]*[a-f0-9]+: 66 48 ff f0 data32 push rax +[ ]*[a-f0-9]+: 66 48 ff f0 data32 rex.W push rax [ ]*[a-f0-9]+: ff 30 push QWORD PTR \[rax\] [ ]*[a-f0-9]+: 66 ff 30 push WORD PTR \[rax\] [ ]*[a-f0-9]+: 48 ff 30 rex.W push QWORD PTR \[rax\] -[ ]*[a-f0-9]+: 66 48 ff 30 data32 push QWORD PTR \[rax\] +[ ]*[a-f0-9]+: 66 48 ff 30 data32 rex.W push QWORD PTR \[rax\] +[ ]*[a-f0-9]+: 6a ff push 0xffffffffffffffff +[ ]*[a-f0-9]+: 66 6a ff pushw 0xffff +[ ]*[a-f0-9]+: 48 6a ff rex.W push 0xffffffffffffffff +[ ]*[a-f0-9]+: 66 48 6a ff data32 rex.W push 0xffffffffffffffff +[ ]*[a-f0-9]+: 68 01 02 03 04 push 0x4030201 +[ ]*[a-f0-9]+: 66 68 01 02 pushw 0x201 +[ ]*[a-f0-9]+: 03 04 48 add eax,DWORD PTR \[rax\+rcx\*2\] +[ ]*[a-f0-9]+: 68 01 02 03 04 push 0x4030201 +[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data32 rex.W push 0x4030201 +[ ]*[a-f0-9]+: 90 nop #pass diff --git a/gas/testsuite/gas/i386/x86-64-stack-suffix.d b/gas/testsuite/gas/i386/x86-64-stack-suffix.d index 07bf79b777b..a0b94d0556c 100644 --- a/gas/testsuite/gas/i386/x86-64-stack-suffix.d +++ b/gas/testsuite/gas/i386/x86-64-stack-suffix.d @@ -10,41 +10,51 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 50 pushq %rax [ ]*[a-f0-9]+: 66 50 pushw %ax [ ]*[a-f0-9]+: 48 50 rex.W pushq %rax -[ ]*[a-f0-9]+: 66 48 50 data32 pushq %rax +[ ]*[a-f0-9]+: 66 48 50 data32 rex.W pushq %rax [ ]*[a-f0-9]+: 58 popq %rax [ ]*[a-f0-9]+: 66 58 popw %ax [ ]*[a-f0-9]+: 48 58 rex.W popq %rax -[ ]*[a-f0-9]+: 66 48 58 data32 popq %rax +[ ]*[a-f0-9]+: 66 48 58 data32 rex.W popq %rax [ ]*[a-f0-9]+: 8f c0 popq %rax [ ]*[a-f0-9]+: 66 8f c0 popw %ax [ ]*[a-f0-9]+: 48 8f c0 rex.W popq %rax -[ ]*[a-f0-9]+: 66 48 8f c0 data32 popq %rax +[ ]*[a-f0-9]+: 66 48 8f c0 data32 rex.W popq %rax [ ]*[a-f0-9]+: 8f 00 popq \(%rax\) [ ]*[a-f0-9]+: 66 8f 00 popw \(%rax\) [ ]*[a-f0-9]+: 48 8f 00 rex.W popq \(%rax\) -[ ]*[a-f0-9]+: 66 48 8f 00 data32 popq \(%rax\) +[ ]*[a-f0-9]+: 66 48 8f 00 data32 rex.W popq \(%rax\) [ ]*[a-f0-9]+: ff d0 callq \*%rax [ ]*[a-f0-9]+: 66 ff d0 callw \*%ax [ ]*[a-f0-9]+: 48 ff d0 rex.W callq \*%rax -[ ]*[a-f0-9]+: 66 48 ff d0 data32 callq \*%rax +[ ]*[a-f0-9]+: 66 48 ff d0 data32 rex.W callq \*%rax [ ]*[a-f0-9]+: ff 10 callq \*\(%rax\) [ ]*[a-f0-9]+: 66 ff 10 callw \*\(%rax\) [ ]*[a-f0-9]+: 48 ff 10 rex.W callq \*\(%rax\) -[ ]*[a-f0-9]+: 66 48 ff 10 data32 callq \*\(%rax\) +[ ]*[a-f0-9]+: 66 48 ff 10 data32 rex.W callq \*\(%rax\) [ ]*[a-f0-9]+: ff e0 jmpq \*%rax [ ]*[a-f0-9]+: 66 ff e0 jmpw \*%ax [ ]*[a-f0-9]+: 48 ff e0 rex.W jmpq \*%rax -[ ]*[a-f0-9]+: 66 48 ff e0 data32 jmpq \*%rax +[ ]*[a-f0-9]+: 66 48 ff e0 data32 rex.W jmpq \*%rax [ ]*[a-f0-9]+: ff 20 jmpq \*\(%rax\) [ ]*[a-f0-9]+: 66 ff 20 jmpw \*\(%rax\) [ ]*[a-f0-9]+: 48 ff 20 rex.W jmpq \*\(%rax\) -[ ]*[a-f0-9]+: 66 48 ff 20 data32 jmpq \*\(%rax\) +[ ]*[a-f0-9]+: 66 48 ff 20 data32 rex.W jmpq \*\(%rax\) [ ]*[a-f0-9]+: ff f0 pushq %rax [ ]*[a-f0-9]+: 66 ff f0 pushw %ax [ ]*[a-f0-9]+: 48 ff f0 rex.W pushq %rax -[ ]*[a-f0-9]+: 66 48 ff f0 data32 pushq %rax +[ ]*[a-f0-9]+: 66 48 ff f0 data32 rex.W pushq %rax [ ]*[a-f0-9]+: ff 30 pushq \(%rax\) [ ]*[a-f0-9]+: 66 ff 30 pushw \(%rax\) [ ]*[a-f0-9]+: 48 ff 30 rex.W pushq \(%rax\) -[ ]*[a-f0-9]+: 66 48 ff 30 data32 pushq \(%rax\) +[ ]*[a-f0-9]+: 66 48 ff 30 data32 rex.W pushq \(%rax\) +[ ]*[a-f0-9]+: 6a ff pushq \$0xffffffffffffffff +[ ]*[a-f0-9]+: 66 6a ff pushw \$0xffff +[ ]*[a-f0-9]+: 48 6a ff rex.W pushq \$0xffffffffffffffff +[ ]*[a-f0-9]+: 66 48 6a ff data32 rex.W pushq \$0xffffffffffffffff +[ ]*[a-f0-9]+: 68 01 02 03 04 pushq \$0x4030201 +[ ]*[a-f0-9]+: 66 68 01 02 pushw \$0x201 +[ ]*[a-f0-9]+: 03 04 48 addl \(%rax,%rcx,2\),%eax +[ ]*[a-f0-9]+: 68 01 02 03 04 pushq \$0x4030201 +[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data32 rex.W pushq \$0x4030201 +[ ]*[a-f0-9]+: 90 nop #pass diff --git a/gas/testsuite/gas/i386/x86-64-stack.d b/gas/testsuite/gas/i386/x86-64-stack.d index 0ab339d9edc..76f71514e12 100644 --- a/gas/testsuite/gas/i386/x86-64-stack.d +++ b/gas/testsuite/gas/i386/x86-64-stack.d @@ -9,41 +9,51 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 50 push %rax [ ]*[a-f0-9]+: 66 50 push %ax [ ]*[a-f0-9]+: 48 50 rex.W push %rax -[ ]*[a-f0-9]+: 66 48 50 data32 push %rax +[ ]*[a-f0-9]+: 66 48 50 data32 rex.W push %rax [ ]*[a-f0-9]+: 58 pop %rax [ ]*[a-f0-9]+: 66 58 pop %ax [ ]*[a-f0-9]+: 48 58 rex.W pop %rax -[ ]*[a-f0-9]+: 66 48 58 data32 pop %rax +[ ]*[a-f0-9]+: 66 48 58 data32 rex.W pop %rax [ ]*[a-f0-9]+: 8f c0 pop %rax [ ]*[a-f0-9]+: 66 8f c0 pop %ax [ ]*[a-f0-9]+: 48 8f c0 rex.W pop %rax -[ ]*[a-f0-9]+: 66 48 8f c0 data32 pop %rax +[ ]*[a-f0-9]+: 66 48 8f c0 data32 rex.W pop %rax [ ]*[a-f0-9]+: 8f 00 popq \(%rax\) [ ]*[a-f0-9]+: 66 8f 00 popw \(%rax\) [ ]*[a-f0-9]+: 48 8f 00 rex.W popq \(%rax\) -[ ]*[a-f0-9]+: 66 48 8f 00 data32 popq \(%rax\) +[ ]*[a-f0-9]+: 66 48 8f 00 data32 rex.W popq \(%rax\) [ ]*[a-f0-9]+: ff d0 callq \*%rax [ ]*[a-f0-9]+: 66 ff d0 callw \*%ax [ ]*[a-f0-9]+: 48 ff d0 rex.W callq \*%rax -[ ]*[a-f0-9]+: 66 48 ff d0 data32 callq \*%rax +[ ]*[a-f0-9]+: 66 48 ff d0 data32 rex.W callq \*%rax [ ]*[a-f0-9]+: ff 10 callq \*\(%rax\) [ ]*[a-f0-9]+: 66 ff 10 callw \*\(%rax\) [ ]*[a-f0-9]+: 48 ff 10 rex.W callq \*\(%rax\) -[ ]*[a-f0-9]+: 66 48 ff 10 data32 callq \*\(%rax\) +[ ]*[a-f0-9]+: 66 48 ff 10 data32 rex.W callq \*\(%rax\) [ ]*[a-f0-9]+: ff e0 jmpq \*%rax [ ]*[a-f0-9]+: 66 ff e0 jmpw \*%ax [ ]*[a-f0-9]+: 48 ff e0 rex.W jmpq \*%rax -[ ]*[a-f0-9]+: 66 48 ff e0 data32 jmpq \*%rax +[ ]*[a-f0-9]+: 66 48 ff e0 data32 rex.W jmpq \*%rax [ ]*[a-f0-9]+: ff 20 jmpq \*\(%rax\) [ ]*[a-f0-9]+: 66 ff 20 jmpw \*\(%rax\) [ ]*[a-f0-9]+: 48 ff 20 rex.W jmpq \*\(%rax\) -[ ]*[a-f0-9]+: 66 48 ff 20 data32 jmpq \*\(%rax\) +[ ]*[a-f0-9]+: 66 48 ff 20 data32 rex.W jmpq \*\(%rax\) [ ]*[a-f0-9]+: ff f0 push %rax [ ]*[a-f0-9]+: 66 ff f0 push %ax [ ]*[a-f0-9]+: 48 ff f0 rex.W push %rax -[ ]*[a-f0-9]+: 66 48 ff f0 data32 push %rax +[ ]*[a-f0-9]+: 66 48 ff f0 data32 rex.W push %rax [ ]*[a-f0-9]+: ff 30 pushq \(%rax\) [ ]*[a-f0-9]+: 66 ff 30 pushw \(%rax\) [ ]*[a-f0-9]+: 48 ff 30 rex.W pushq \(%rax\) -[ ]*[a-f0-9]+: 66 48 ff 30 data32 pushq \(%rax\) +[ ]*[a-f0-9]+: 66 48 ff 30 data32 rex.W pushq \(%rax\) +[ ]*[a-f0-9]+: 6a ff pushq \$0xffffffffffffffff +[ ]*[a-f0-9]+: 66 6a ff pushw \$0xffff +[ ]*[a-f0-9]+: 48 6a ff rex.W pushq \$0xffffffffffffffff +[ ]*[a-f0-9]+: 66 48 6a ff data32 rex.W pushq \$0xffffffffffffffff +[ ]*[a-f0-9]+: 68 01 02 03 04 pushq \$0x4030201 +[ ]*[a-f0-9]+: 66 68 01 02 pushw \$0x201 +[ ]*[a-f0-9]+: 03 04 48 add \(%rax,%rcx,2\),%eax +[ ]*[a-f0-9]+: 68 01 02 03 04 pushq \$0x4030201 +[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data32 rex.W pushq \$0x4030201 +[ ]*[a-f0-9]+: 90 nop #pass diff --git a/gas/testsuite/gas/i386/x86-64-stack.s b/gas/testsuite/gas/i386/x86-64-stack.s index d114887d659..2da658b5f9c 100644 --- a/gas/testsuite/gas/i386/x86-64-stack.s +++ b/gas/testsuite/gas/i386/x86-64-stack.s @@ -22,3 +22,13 @@ _start: try 0xff, 0xf0 try 0xff, 0x30 + + # push with a 1-byte immediate + try 0x6a, 0xff + + # push with a 4-byte immediate + try 0x68, 0x01, 0x02, 0x03, 0x04 + + # This is just to synchronize the disassembly. + # Any new cases must come before this line! + nop diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 68ba84287d8..c90599bc658 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,13 @@ +2012-08-06 Roland McGrath + Victor Khimenko + H.J. Lu + + * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG. + (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG. + (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG. + (OP_E_register): Likewise. + (OP_REG): For low 8 whole registers, treat REX_W like DFLAG. + 2012-08-02 Jan-Benedict Glaw * configure.in: Formatting. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 685e968b912..43d7ac32e89 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -1,6 +1,6 @@ /* Print i386 instructions for GDB, the GNU debugger. Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 + 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc. This file is part of the GNU opcodes library. @@ -257,7 +257,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define sIb { OP_sI, b_mode } /* sign extened byte */ #define sIbT { OP_sI, b_T_mode } /* sign extened byte like 'T' */ #define Iv { OP_I, v_mode } -#define sIv { OP_sI, v_mode } +#define sIv { OP_sI, v_mode } #define Iq { OP_I, q_mode } #define Iv64 { OP_I64, v_mode } #define Iw { OP_I, w_mode } @@ -2890,9 +2890,9 @@ static const struct dis386 prefix_table[][4] = { /* PREFIX_0F2E */ { - { "ucomiss",{ XM, EXd } }, + { "ucomiss",{ XM, EXd } }, { Bad_Opcode }, - { "ucomisd",{ XM, EXq } }, + { "ucomisd",{ XM, EXq } }, }, /* PREFIX_0F2F */ @@ -3483,7 +3483,7 @@ static const struct dis386 prefix_table[][4] = { { "movbeS", { Gv, { MOVBE_Fixup, v_mode } } }, { Bad_Opcode }, { "movbeS", { Gv, { MOVBE_Fixup, v_mode } } }, - { "crc32", { Gdq, { CRC32_Fixup, b_mode } } }, + { "crc32", { Gdq, { CRC32_Fixup, b_mode } } }, }, /* PREFIX_0F38F1 */ @@ -3491,7 +3491,7 @@ static const struct dis386 prefix_table[][4] = { { "movbeS", { { MOVBE_Fixup, v_mode }, Gv } }, { Bad_Opcode }, { "movbeS", { { MOVBE_Fixup, v_mode }, Gv } }, - { "crc32", { Gdq, { CRC32_Fixup, v_mode } } }, + { "crc32", { Gdq, { CRC32_Fixup, v_mode } } }, }, /* PREFIX_0F38F6 */ @@ -9162,11 +9162,11 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0F2E_P_0 */ - { "vucomiss", { XMScalar, EXdScalar } }, + { "vucomiss", { XMScalar, EXdScalar } }, }, { /* VEX_W_0F2E_P_2 */ - { "vucomisd", { XMScalar, EXqScalar } }, + { "vucomisd", { XMScalar, EXqScalar } }, }, { /* VEX_W_0F2F_P_0 */ @@ -10242,7 +10242,7 @@ static const struct dis386 mod_table[][2] = { }, { /* MOD_0F24 */ - { Bad_Opcode }, + { Bad_Opcode }, { "movL", { Rd, Td } }, }, { @@ -10987,7 +10987,7 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info) break; } } - else + else { vindex = 0; used_prefixes |= (prefixes & PREFIX_REPZ); @@ -12275,7 +12275,7 @@ case_L: case 'T': if (!intel_syntax && address_mode == mode_64bit - && (sizeflag & DFLAG)) + && ((sizeflag & DFLAG) || (rex & REX_W))) { *obufp++ = 'q'; break; @@ -12313,7 +12313,8 @@ case_L: case 'U': if (intel_syntax) break; - if (address_mode == mode_64bit && (sizeflag & DFLAG)) + if (address_mode == mode_64bit + && ((sizeflag & DFLAG) || (rex & REX_W))) { if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS)) *obufp++ = 'q'; @@ -12385,7 +12386,8 @@ case_Q: { if (intel_syntax) break; - if (address_mode == mode_64bit && (sizeflag & DFLAG)) + if (address_mode == mode_64bit + && ((sizeflag & DFLAG) || (rex & REX_W))) { if (sizeflag & SUFFIX_ALWAYS) *obufp++ = 'q'; @@ -12721,7 +12723,7 @@ intel_operand_size (int bytemode, int sizeflag) oappend ("WORD PTR "); break; case stack_v_mode: - if (address_mode == mode_64bit && (sizeflag & DFLAG)) + if (address_mode == mode_64bit && ((sizeflag & DFLAG) || (rex & REX_W))) { oappend ("QWORD PTR "); break; @@ -12998,7 +13000,7 @@ OP_E_register (int bytemode, int sizeflag) names = address_mode == mode_64bit ? names64 : names32; break; case stack_v_mode: - if (address_mode == mode_64bit && (sizeflag & DFLAG)) + if (address_mode == mode_64bit && ((sizeflag & DFLAG) || (rex & REX_W))) { names = names64; break; @@ -13016,7 +13018,7 @@ OP_E_register (int bytemode, int sizeflag) names = names64; else { - if ((sizeflag & DFLAG) + if ((sizeflag & DFLAG) || (bytemode != v_mode && bytemode != v_swap_mode)) names = names32; @@ -13083,13 +13085,13 @@ OP_E_memory (int bytemode, int sizeflag) switch (vex.length) { case 128: - indexes64 = indexes32 = names_xmm; + indexes64 = indexes32 = names_xmm; break; case 256: if (!vex.w || bytemode == vex_vsib_q_w_dq_mode) - indexes64 = indexes32 = names_ymm; + indexes64 = indexes32 = names_ymm; else - indexes64 = indexes32 = names_xmm; + indexes64 = indexes32 = names_xmm; break; default: abort (); @@ -13182,11 +13184,11 @@ OP_E_memory (int bytemode, int sizeflag) *obufp = '\0'; } if (haveindex) - oappend (address_mode == mode_64bit + oappend (address_mode == mode_64bit && (sizeflag & AFLAG) ? indexes64[vindex] : indexes32[vindex]); else - oappend (address_mode == mode_64bit + oappend (address_mode == mode_64bit && (sizeflag & AFLAG) ? index64 : index32); @@ -13495,7 +13497,8 @@ OP_REG (int code, int sizeflag) break; case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg: case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg: - if (address_mode == mode_64bit && (sizeflag & DFLAG)) + if (address_mode == mode_64bit + && ((sizeflag & DFLAG) || (rex & REX_W))) { s = names64[code - rAX_reg + add]; break; @@ -13710,9 +13713,10 @@ OP_sI (int bytemode, int sizeflag) if (bytemode == b_T_mode) { if (address_mode != mode_64bit - || !(sizeflag & DFLAG)) + || !((sizeflag & DFLAG) || (rex & REX_W))) { - if (sizeflag & DFLAG) + /* The operand-size prefix is overridden by a REX prefix. */ + if ((sizeflag & DFLAG) || (rex & REX_W)) op &= 0xffffffff; else op &= 0xffff; @@ -13730,7 +13734,8 @@ OP_sI (int bytemode, int sizeflag) } break; case v_mode: - if (sizeflag & DFLAG) + /* The operand-size prefix is overridden by a REX prefix. */ + if ((sizeflag & DFLAG) || (rex & REX_W)) op = get32s (); else op = get16 (); @@ -14159,7 +14164,7 @@ OP_EX (int bytemode, int sizeflag) if ((sizeflag & SUFFIX_ALWAYS) && (bytemode == x_swap_mode || bytemode == d_swap_mode - || bytemode == d_scalar_swap_mode + || bytemode == d_scalar_swap_mode || bytemode == q_swap_mode || bytemode == q_scalar_swap_mode)) swap_operand (); @@ -14174,7 +14179,7 @@ OP_EX (int bytemode, int sizeflag) && bytemode != xmm_mq_mode && bytemode != xmmq_mode && bytemode != d_scalar_mode - && bytemode != d_scalar_swap_mode + && bytemode != d_scalar_swap_mode && bytemode != q_scalar_mode && bytemode != q_scalar_swap_mode && bytemode != vex_scalar_w_dq_mode) @@ -14593,7 +14598,7 @@ CRC32_Fixup (int bytemode, int sizeflag) USED_REX (REX_W); if (rex & REX_W) *p++ = 'q'; - else + else { if (sizeflag & DFLAG) *p++ = 'l'; @@ -15145,7 +15150,7 @@ PCLMUL_Fixup (int bytemode ATTRIBUTE_UNUSED, break; default: break; - } + } if (pclmul_type < ARRAY_SIZE (pclmul_op)) { char suffix [4]; @@ -15240,4 +15245,3 @@ OP_LWP_E (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) oappend (names[vex.register_specifier]); } - -- 2.30.2