From 7bc2eabe25d3b40fdb8e2e26508dd89f47906c3c Mon Sep 17 00:00:00 2001 From: Catherine Moore Date: Wed, 28 Oct 2015 14:09:09 -0400 Subject: [PATCH] oddspreg-3.c: Disable for MIPS16. 2015-10-28 Catherine Moore * gcc.target/mips/oddspreg-3.c: Disable for MIPS16. * gcc.target/mips/oddspreg-6.c: Likewise. * gcc.target/mips/oddspreg-1.c: Likewise. * gcc.target/mips/oddspreg-2.c: Likewise. From-SVN: r229496 --- gcc/testsuite/ChangeLog | 7 +++++++ gcc/testsuite/gcc.target/mips/oddspreg-1.c | 2 +- gcc/testsuite/gcc.target/mips/oddspreg-2.c | 2 +- gcc/testsuite/gcc.target/mips/oddspreg-3.c | 2 +- gcc/testsuite/gcc.target/mips/oddspreg-6.c | 2 +- 5 files changed, 11 insertions(+), 4 deletions(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index cc04c43bfef..5ca99b01eee 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2015-10-28 Catherine Moore + + * gcc.target/mips/oddspreg-3.c: Disable for MIPS16. + * gcc.target/mips/oddspreg-6.c: Likewise. + * gcc.target/mips/oddspreg-1.c: Likewise. + * gcc.target/mips/oddspreg-2.c: Likewise. + 2015-10-05 Senthil Kumar Selvaraj PR target/67839 diff --git a/gcc/testsuite/gcc.target/mips/oddspreg-1.c b/gcc/testsuite/gcc.target/mips/oddspreg-1.c index a9c69573693..d44563d0860 100644 --- a/gcc/testsuite/gcc.target/mips/oddspreg-1.c +++ b/gcc/testsuite/gcc.target/mips/oddspreg-1.c @@ -5,7 +5,7 @@ #error "Incorrect number of single-precision registers reported" #endif -void +NOMIPS16 void foo () { register float foo asm ("$f1"); diff --git a/gcc/testsuite/gcc.target/mips/oddspreg-2.c b/gcc/testsuite/gcc.target/mips/oddspreg-2.c index e2e0a2660bb..efeb0af1b0d 100644 --- a/gcc/testsuite/gcc.target/mips/oddspreg-2.c +++ b/gcc/testsuite/gcc.target/mips/oddspreg-2.c @@ -2,7 +2,7 @@ /* { dg-skip-if "needs asm output" { *-*-* } { "-fno-fat-lto-objects" } { "" } } */ /* { dg-options "-mabi=32 -mno-odd-spreg -mhard-float" } */ -void +NOMIPS16 void foo () { register float foo asm ("$f1"); /* { dg-error "isn't suitable for" } */ diff --git a/gcc/testsuite/gcc.target/mips/oddspreg-3.c b/gcc/testsuite/gcc.target/mips/oddspreg-3.c index f287eb66e92..8a0d85cc7cd 100644 --- a/gcc/testsuite/gcc.target/mips/oddspreg-3.c +++ b/gcc/testsuite/gcc.target/mips/oddspreg-3.c @@ -2,7 +2,7 @@ /* { dg-skip-if "needs asm output" { *-*-* } { "-fno-fat-lto-objects" } { "" } } */ /* { dg-options "-mabi=32 -mfp32 -march=loongson3a -mhard-float" } */ -void +NOMIPS16 void foo () { register float foo asm ("$f1"); /* { dg-error "isn't suitable for" } */ diff --git a/gcc/testsuite/gcc.target/mips/oddspreg-6.c b/gcc/testsuite/gcc.target/mips/oddspreg-6.c index 955dea90140..eb376c6b330 100644 --- a/gcc/testsuite/gcc.target/mips/oddspreg-6.c +++ b/gcc/testsuite/gcc.target/mips/oddspreg-6.c @@ -2,7 +2,7 @@ /* { dg-skip-if "needs asm output" { *-*-* } { "-fno-fat-lto-objects" } { "" } } */ /* { dg-options "-mabi=32 -mfpxx -mhard-float" } */ -void +NOMIPS16 void foo () { register float foo asm ("$f1"); /* { dg-error "isn't suitable for" } */ -- 2.30.2