From 7bc987abe0dc863b091bf77f5b02138ebe79e559 Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Tue, 3 May 2016 12:24:51 -0700 Subject: [PATCH] i965/fs: Move handling of samples_identical into the switch statement This is where we handle texop_texture_samples so it makes things more consistent. --- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 40 +++++++++++------------- 1 file changed, 19 insertions(+), 21 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 9115e23ceeb..905f5c15ce6 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp @@ -3552,27 +3552,6 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr) srcs[TEX_LOGICAL_SRC_LOD] = brw_imm_ud(0u); } - if (instr->op == nir_texop_samples_identical) { - fs_reg dst = retype(get_nir_dest(instr->dest), BRW_REGISTER_TYPE_D); - - /* If mcs is an immediate value, it means there is no MCS. In that case - * just return false. - */ - if (srcs[TEX_LOGICAL_SRC_MCS].file == BRW_IMMEDIATE_VALUE) { - bld.MOV(dst, brw_imm_ud(0u)); - } else if ((key_tex->msaa_16 & (1 << sampler))) { - fs_reg tmp = vgrf(glsl_type::uint_type); - bld.OR(tmp, srcs[TEX_LOGICAL_SRC_MCS], - offset(srcs[TEX_LOGICAL_SRC_MCS], bld, 1)); - bld.CMP(dst, tmp, brw_imm_ud(0u), BRW_CONDITIONAL_EQ); - } else { - bld.CMP(dst, srcs[TEX_LOGICAL_SRC_MCS], brw_imm_ud(0u), - BRW_CONDITIONAL_EQ); - } - - return; - } - enum opcode opcode; switch (instr->op) { case nir_texop_tex: @@ -3627,6 +3606,25 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr) bld.MOV(dst, tmp); return; } + case nir_texop_samples_identical: { + fs_reg dst = retype(get_nir_dest(instr->dest), BRW_REGISTER_TYPE_D); + + /* If mcs is an immediate value, it means there is no MCS. In that case + * just return false. + */ + if (srcs[TEX_LOGICAL_SRC_MCS].file == BRW_IMMEDIATE_VALUE) { + bld.MOV(dst, brw_imm_ud(0u)); + } else if ((key_tex->msaa_16 & (1 << sampler))) { + fs_reg tmp = vgrf(glsl_type::uint_type); + bld.OR(tmp, srcs[TEX_LOGICAL_SRC_MCS], + offset(srcs[TEX_LOGICAL_SRC_MCS], bld, 1)); + bld.CMP(dst, tmp, brw_imm_ud(0u), BRW_CONDITIONAL_EQ); + } else { + bld.CMP(dst, srcs[TEX_LOGICAL_SRC_MCS], brw_imm_ud(0u), + BRW_CONDITIONAL_EQ); + } + return; + } default: unreachable("unknown texture opcode"); } -- 2.30.2