From 7be100ac9af52b1ab5e2c34b45aba0d66304d55a Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Thu, 28 Apr 2016 14:40:51 -0700 Subject: [PATCH] i965/gen7_wm: Move where we set the fast clear op This better matches gen8 state setup Acked-by: Topi Pohjolainen Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen7_wm_state.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c index 17dea99a03d..8d2e2c32bb4 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c @@ -214,6 +214,8 @@ gen7_upload_ps_state(struct brw_context *brw, if (prog_data->num_varying_inputs != 0) dw4 |= GEN7_PS_ATTRIBUTE_ENABLE; + dw4 |= fast_clear_op; + if (prog_data->prog_offset_16 || prog_data->no_8) { dw4 |= GEN7_PS_16_DISPATCH_ENABLE; @@ -243,8 +245,6 @@ gen7_upload_ps_state(struct brw_context *brw, ksp0 = stage_state->prog_offset; } - dw4 |= fast_clear_op; - BEGIN_BATCH(8); OUT_BATCH(_3DSTATE_PS << 16 | (8 - 2)); OUT_BATCH(ksp0); -- 2.30.2