From 7c080ade9d8198958a1a37854d5cc56f7b76b9f4 Mon Sep 17 00:00:00 2001 From: Jan Hubicka Date: Thu, 30 Nov 2017 10:36:36 +0100 Subject: [PATCH] re PR target/81616 (Update -mtune=generic for the current Intel and AMD processors) PR target/81616 * x86-tnue-costs.h (generic_cost): Revise for modern CPUs * gcc.target/i386/l_fma_double_1.c: Update count of fma instructions. * gcc.target/i386/l_fma_double_2.c: Update count of fma instructions. * gcc.target/i386/l_fma_double_3.c: Update count of fma instructions. * gcc.target/i386/l_fma_double_4.c: Update count of fma instructions. * gcc.target/i386/l_fma_double_5.c: Update count of fma instructions. * gcc.target/i386/l_fma_double_6.c: Update count of fma instructions. * gcc.target/i386/l_fma_float_1.c: Update count of fma instructions. * gcc.target/i386/l_fma_float_2.c: Update count of fma instructions. * gcc.target/i386/l_fma_float_3.c: Update count of fma instructions. * gcc.target/i386/l_fma_float_4.c: Update count of fma instructions. * gcc.target/i386/l_fma_float_5.c: Update count of fma instructions. * gcc.target/i386/l_fma_float_6.c: Update count of fma instructions. From-SVN: r255268 --- gcc/ChangeLog | 5 ++++ gcc/config/i386/x86-tune-costs.h | 24 +++++++++---------- gcc/testsuite/ChangeLog | 16 +++++++++++++ .../gcc.target/i386/l_fma_double_1.c | 8 +++---- .../gcc.target/i386/l_fma_double_2.c | 8 +++---- .../gcc.target/i386/l_fma_double_3.c | 8 +++---- .../gcc.target/i386/l_fma_double_4.c | 8 +++---- .../gcc.target/i386/l_fma_double_5.c | 8 +++---- .../gcc.target/i386/l_fma_double_6.c | 8 +++---- gcc/testsuite/gcc.target/i386/l_fma_float_1.c | 8 +++---- gcc/testsuite/gcc.target/i386/l_fma_float_2.c | 8 +++---- gcc/testsuite/gcc.target/i386/l_fma_float_3.c | 8 +++---- gcc/testsuite/gcc.target/i386/l_fma_float_4.c | 8 +++---- gcc/testsuite/gcc.target/i386/l_fma_float_5.c | 8 +++---- gcc/testsuite/gcc.target/i386/l_fma_float_6.c | 8 +++---- 15 files changed, 81 insertions(+), 60 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6630c47869e..424c7e7dd1f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2017-11-30 Jan Hubicka + + PR target/81616 + * x86-tnue-costs.h (generic_cost): Revise for modern CPUs + 2017-11-30 Richard Biener PR tree-optimization/83202 diff --git a/gcc/config/i386/x86-tune-costs.h b/gcc/config/i386/x86-tune-costs.h index 75a59063806..312467d9788 100644 --- a/gcc/config/i386/x86-tune-costs.h +++ b/gcc/config/i386/x86-tune-costs.h @@ -2243,11 +2243,11 @@ struct processor_costs generic_cost = { COSTS_N_INSNS (4), /* HI */ COSTS_N_INSNS (3), /* SI */ COSTS_N_INSNS (4), /* DI */ - COSTS_N_INSNS (2)}, /* other */ + COSTS_N_INSNS (4)}, /* other */ 0, /* cost of multiply per each bit set */ - {COSTS_N_INSNS (18), /* cost of a divide/mod for QI */ - COSTS_N_INSNS (26), /* HI */ - COSTS_N_INSNS (42), /* SI */ + {COSTS_N_INSNS (16), /* cost of a divide/mod for QI */ + COSTS_N_INSNS (22), /* HI */ + COSTS_N_INSNS (30), /* SI */ COSTS_N_INSNS (74), /* DI */ COSTS_N_INSNS (74)}, /* other */ COSTS_N_INSNS (1), /* cost of movsx */ @@ -2275,13 +2275,13 @@ struct processor_costs generic_cost = { 2, 3, 4, /* cost of moving XMM,YMM,ZMM register */ {6, 6, 6, 10, 15}, /* cost of loading SSE registers in 32,64,128,256 and 512-bit */ - {10, 10, 10, 15, 20}, /* cost of unaligned loads. */ + {6, 6, 6, 10, 15}, /* cost of unaligned loads. */ {6, 6, 6, 10, 15}, /* cost of storing SSE registers in 32,64,128,256 and 512-bit */ - {10, 10, 10, 15, 20}, /* cost of unaligned storess. */ - 20, 20, /* SSE->integer and integer->SSE moves */ - 6, 6, /* Gather load static, per_elt. */ - 6, 6, /* Gather store static, per_elt. */ + {6, 6, 6, 10, 15}, /* cost of unaligned storess. */ + 6, 6, /* SSE->integer and integer->SSE moves */ + 18, 6, /* Gather load static, per_elt. */ + 18, 6, /* Gather store static, per_elt. */ 32, /* size of l1 cache. */ 512, /* size of l2 cache. */ 64, /* size of prefetch block */ @@ -2290,11 +2290,11 @@ struct processor_costs generic_cost = { value is increased to perhaps more appropriate value of 5. */ 3, /* Branch cost */ COSTS_N_INSNS (3), /* cost of FADD and FSUB insns. */ - COSTS_N_INSNS (3), /* cost of FMUL instruction. */ + COSTS_N_INSNS (5), /* cost of FMUL instruction. */ COSTS_N_INSNS (20), /* cost of FDIV instruction. */ COSTS_N_INSNS (1), /* cost of FABS instruction. */ COSTS_N_INSNS (1), /* cost of FCHS instruction. */ - COSTS_N_INSNS (40), /* cost of FSQRT instruction. */ + COSTS_N_INSNS (20), /* cost of FSQRT instruction. */ COSTS_N_INSNS (1), /* cost of cheap SSE instruction. */ COSTS_N_INSNS (3), /* cost of ADDSS/SD SUBSS/SD insns. */ @@ -2306,7 +2306,7 @@ struct processor_costs generic_cost = { COSTS_N_INSNS (32), /* cost of DIVSD instruction. */ COSTS_N_INSNS (30), /* cost of SQRTSS instruction. */ COSTS_N_INSNS (58), /* cost of SQRTSD instruction. */ - 1, 2, 1, 1, /* reassoc int, fp, vec_int, vec_fp. */ + 1, 4, 3, 3, /* reassoc int, fp, vec_int, vec_fp. */ generic_memcpy, generic_memset, COSTS_N_INSNS (3), /* cond_taken_branch_cost. */ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 1b8cb2cddd9..a7f3c6fde4f 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,19 @@ +2017-11-30 Jan Hubicka + + PR target/81616 + * gcc.target/i386/l_fma_double_1.c: Update count of fma instructions. + * gcc.target/i386/l_fma_double_2.c: Update count of fma instructions. + * gcc.target/i386/l_fma_double_3.c: Update count of fma instructions. + * gcc.target/i386/l_fma_double_4.c: Update count of fma instructions. + * gcc.target/i386/l_fma_double_5.c: Update count of fma instructions. + * gcc.target/i386/l_fma_double_6.c: Update count of fma instructions. + * gcc.target/i386/l_fma_float_1.c: Update count of fma instructions. + * gcc.target/i386/l_fma_float_2.c: Update count of fma instructions. + * gcc.target/i386/l_fma_float_3.c: Update count of fma instructions. + * gcc.target/i386/l_fma_float_4.c: Update count of fma instructions. + * gcc.target/i386/l_fma_float_5.c: Update count of fma instructions. + * gcc.target/i386/l_fma_float_6.c: Update count of fma instructions. + 2017-11-30 Richard Biener PR tree-optimization/83202 diff --git a/gcc/testsuite/gcc.target/i386/l_fma_double_1.c b/gcc/testsuite/gcc.target/i386/l_fma_double_1.c index 94e512b9602..e5bcdabcf79 100644 --- a/gcc/testsuite/gcc.target/i386/l_fma_double_1.c +++ b/gcc/testsuite/gcc.target/i386/l_fma_double_1.c @@ -13,7 +13,7 @@ typedef double adouble __attribute__((aligned(sizeof (double)))); /* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */ /* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */ /* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */ -/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56 } } */ +/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 32 } } */ diff --git a/gcc/testsuite/gcc.target/i386/l_fma_double_2.c b/gcc/testsuite/gcc.target/i386/l_fma_double_2.c index ffceab48f48..dbd078abc81 100644 --- a/gcc/testsuite/gcc.target/i386/l_fma_double_2.c +++ b/gcc/testsuite/gcc.target/i386/l_fma_double_2.c @@ -13,7 +13,7 @@ typedef double adouble __attribute__((aligned(sizeof (double)))); /* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */ /* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */ /* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */ -/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56 } } */ +/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 32 } } */ diff --git a/gcc/testsuite/gcc.target/i386/l_fma_double_3.c b/gcc/testsuite/gcc.target/i386/l_fma_double_3.c index cdb4d33bee4..d0844f208e5 100644 --- a/gcc/testsuite/gcc.target/i386/l_fma_double_3.c +++ b/gcc/testsuite/gcc.target/i386/l_fma_double_3.c @@ -13,7 +13,7 @@ typedef double adouble __attribute__((aligned(sizeof (double)))); /* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */ /* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */ /* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */ -/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56 } } */ +/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 32 } } */ diff --git a/gcc/testsuite/gcc.target/i386/l_fma_double_4.c b/gcc/testsuite/gcc.target/i386/l_fma_double_4.c index dda487e9804..b9498a0ff13 100644 --- a/gcc/testsuite/gcc.target/i386/l_fma_double_4.c +++ b/gcc/testsuite/gcc.target/i386/l_fma_double_4.c @@ -13,7 +13,7 @@ typedef double adouble __attribute__((aligned(sizeof (double)))); /* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */ /* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */ /* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */ -/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56 } } */ +/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 32 } } */ diff --git a/gcc/testsuite/gcc.target/i386/l_fma_double_5.c b/gcc/testsuite/gcc.target/i386/l_fma_double_5.c index 98909aeeb84..0292ba040a3 100644 --- a/gcc/testsuite/gcc.target/i386/l_fma_double_5.c +++ b/gcc/testsuite/gcc.target/i386/l_fma_double_5.c @@ -13,7 +13,7 @@ typedef double adouble __attribute__((aligned(sizeof (double)))); /* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */ /* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */ /* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */ -/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56 } } */ +/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 32 } } */ diff --git a/gcc/testsuite/gcc.target/i386/l_fma_double_6.c b/gcc/testsuite/gcc.target/i386/l_fma_double_6.c index 538065a3102..a716006eda8 100644 --- a/gcc/testsuite/gcc.target/i386/l_fma_double_6.c +++ b/gcc/testsuite/gcc.target/i386/l_fma_double_6.c @@ -13,7 +13,7 @@ typedef double adouble __attribute__((aligned(sizeof (double)))); /* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */ /* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */ /* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */ -/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */ -/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56 } } */ +/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 32 } } */ +/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 32 } } */ diff --git a/gcc/testsuite/gcc.target/i386/l_fma_float_1.c b/gcc/testsuite/gcc.target/i386/l_fma_float_1.c index ff109817d5d..b386b83e39a 100644 --- a/gcc/testsuite/gcc.target/i386/l_fma_float_1.c +++ b/gcc/testsuite/gcc.target/i386/l_fma_float_1.c @@ -12,7 +12,7 @@ /* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */ /* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */ /* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */ -/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */ +/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 64 } } */ diff --git a/gcc/testsuite/gcc.target/i386/l_fma_float_2.c b/gcc/testsuite/gcc.target/i386/l_fma_float_2.c index 38c6b528304..81193b2d8b1 100644 --- a/gcc/testsuite/gcc.target/i386/l_fma_float_2.c +++ b/gcc/testsuite/gcc.target/i386/l_fma_float_2.c @@ -12,7 +12,7 @@ /* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */ /* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */ /* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */ -/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */ +/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 64 } } */ diff --git a/gcc/testsuite/gcc.target/i386/l_fma_float_3.c b/gcc/testsuite/gcc.target/i386/l_fma_float_3.c index 177ba352262..d86cb904357 100644 --- a/gcc/testsuite/gcc.target/i386/l_fma_float_3.c +++ b/gcc/testsuite/gcc.target/i386/l_fma_float_3.c @@ -12,7 +12,7 @@ /* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */ /* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */ /* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */ -/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */ +/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 64 } } */ diff --git a/gcc/testsuite/gcc.target/i386/l_fma_float_4.c b/gcc/testsuite/gcc.target/i386/l_fma_float_4.c index 8ee68d1af1c..68ca8388d70 100644 --- a/gcc/testsuite/gcc.target/i386/l_fma_float_4.c +++ b/gcc/testsuite/gcc.target/i386/l_fma_float_4.c @@ -12,7 +12,7 @@ /* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */ /* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */ /* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */ -/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */ +/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 64 } } */ diff --git a/gcc/testsuite/gcc.target/i386/l_fma_float_5.c b/gcc/testsuite/gcc.target/i386/l_fma_float_5.c index 23288d0da8e..4db4749c024 100644 --- a/gcc/testsuite/gcc.target/i386/l_fma_float_5.c +++ b/gcc/testsuite/gcc.target/i386/l_fma_float_5.c @@ -12,7 +12,7 @@ /* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */ /* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */ /* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */ -/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */ +/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 64 } } */ diff --git a/gcc/testsuite/gcc.target/i386/l_fma_float_6.c b/gcc/testsuite/gcc.target/i386/l_fma_float_6.c index 07a5fbae317..0b86e6256bd 100644 --- a/gcc/testsuite/gcc.target/i386/l_fma_float_6.c +++ b/gcc/testsuite/gcc.target/i386/l_fma_float_6.c @@ -12,7 +12,7 @@ /* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */ /* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */ /* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */ -/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */ -/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */ +/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 64 } } */ +/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 64 } } */ -- 2.30.2