From 7c1d6bc4c3de5c5798b30b81ad82e12c5cd6e870 Mon Sep 17 00:00:00 2001 From: Dmitry Selyutin Date: Sat, 14 May 2022 11:38:04 +0000 Subject: [PATCH] ppc-opc: support fcoss and fcoss. instructions --- gas/testsuite/gas/ppc/fcoss.d | 41 +++++++++++++++++++++++++++++++++++ gas/testsuite/gas/ppc/fcoss.s | 32 +++++++++++++++++++++++++++ gas/testsuite/gas/ppc/ppc.exp | 1 + opcodes/ppc-opc.c | 3 +++ 4 files changed, 77 insertions(+) create mode 100644 gas/testsuite/gas/ppc/fcoss.d create mode 100644 gas/testsuite/gas/ppc/fcoss.s diff --git a/gas/testsuite/gas/ppc/fcoss.d b/gas/testsuite/gas/ppc/fcoss.d new file mode 100644 index 00000000000..fb74ae95b9a --- /dev/null +++ b/gas/testsuite/gas/ppc/fcoss.d @@ -0,0 +1,41 @@ +#as: -mfuture +#objdump: -dr -Mfuture + +.*: file format .* + + +Disassembly of section \.text: + +0+ <\.text>: + 0: ec 00 04 5c fcoss f0,f0 + 4: ec 00 04 5d fcoss. f0,f0 + 8: ec 00 54 5c fcoss f0,f10 + c: ec 00 54 5d fcoss. f0,f10 + 10: ec 00 ac 5c fcoss f0,f21 + 14: ec 00 ac 5d fcoss. f0,f21 + 18: ec 00 fc 5c fcoss f0,f31 + 1c: ec 00 fc 5d fcoss. f0,f31 + 20: ed 40 04 5c fcoss f10,f0 + 24: ed 40 04 5d fcoss. f10,f0 + 28: ed 40 54 5c fcoss f10,f10 + 2c: ed 40 54 5d fcoss. f10,f10 + 30: ed 40 ac 5c fcoss f10,f21 + 34: ed 40 ac 5d fcoss. f10,f21 + 38: ed 40 fc 5c fcoss f10,f31 + 3c: ed 40 fc 5d fcoss. f10,f31 + 40: ee a0 04 5c fcoss f21,f0 + 44: ee a0 04 5d fcoss. f21,f0 + 48: ee a0 54 5c fcoss f21,f10 + 4c: ee a0 54 5d fcoss. f21,f10 + 50: ee a0 ac 5c fcoss f21,f21 + 54: ee a0 ac 5d fcoss. f21,f21 + 58: ee a0 fc 5c fcoss f21,f31 + 5c: ee a0 fc 5d fcoss. f21,f31 + 60: ef e0 04 5c fcoss f31,f0 + 64: ef e0 04 5d fcoss. f31,f0 + 68: ef e0 54 5c fcoss f31,f10 + 6c: ef e0 54 5d fcoss. f31,f10 + 70: ef e0 ac 5c fcoss f31,f21 + 74: ef e0 ac 5d fcoss. f31,f21 + 78: ef e0 fc 5c fcoss f31,f31 + 7c: ef e0 fc 5d fcoss. f31,f31 diff --git a/gas/testsuite/gas/ppc/fcoss.s b/gas/testsuite/gas/ppc/fcoss.s new file mode 100644 index 00000000000..8cddccb8aca --- /dev/null +++ b/gas/testsuite/gas/ppc/fcoss.s @@ -0,0 +1,32 @@ +fcoss 0,0 +fcoss. 0,0 +fcoss 0,10 +fcoss. 0,10 +fcoss 0,21 +fcoss. 0,21 +fcoss 0,31 +fcoss. 0,31 +fcoss 10,0 +fcoss. 10,0 +fcoss 10,10 +fcoss. 10,10 +fcoss 10,21 +fcoss. 10,21 +fcoss 10,31 +fcoss. 10,31 +fcoss 21,0 +fcoss. 21,0 +fcoss 21,10 +fcoss. 21,10 +fcoss 21,21 +fcoss. 21,21 +fcoss 21,31 +fcoss. 21,31 +fcoss 31,0 +fcoss. 31,0 +fcoss 31,10 +fcoss. 31,10 +fcoss 31,21 +fcoss. 31,21 +fcoss 31,31 +fcoss. 31,31 diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp index e46511bb27b..5f315efa0d6 100644 --- a/gas/testsuite/gas/ppc/ppc.exp +++ b/gas/testsuite/gas/ppc/ppc.exp @@ -155,3 +155,4 @@ run_dump_test "pr27676" run_dump_test "raw" run_dump_test "fsins" +run_dump_test "fcoss" diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index 874e76b2fa8..14393b8ecd6 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -8917,6 +8917,9 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"ddiv", XRC(59,546,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}}, {"ddiv.", XRC(59,546,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}}, +{"fcoss", XRC(59,558,0), XRA_MASK, DRAFT, PPCVLE, {FRT, FRB}}, +{"fcoss.", XRC(59,558,1), XRA_MASK, DRAFT, PPCVLE, {FRT, FRB}}, + {"xvf16ger2pn", XX3(59,146), XX3_MASK|3<<21, POWER10, PPCVLE, {ACC, XA6a, XB6a}}, {"xvf32gerpn", XX3(59,154), XX3_MASK|3<<21, POWER10, PPCVLE, {ACC, XA6a, XB6a}}, -- 2.30.2