From 7cc0b8cbf00ccac5e49feaf00182e10db4773084 Mon Sep 17 00:00:00 2001 From: whitequark Date: Tue, 2 Jul 2019 18:37:02 +0000 Subject: [PATCH] hdl.mem: fix naming of registers inside unnamed memories. Before this commit, `None` would leak into the vcd file with pysim. --- nmigen/hdl/mem.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/nmigen/hdl/mem.py b/nmigen/hdl/mem.py index 2111ecc..45836cb 100644 --- a/nmigen/hdl/mem.py +++ b/nmigen/hdl/mem.py @@ -27,7 +27,8 @@ class Memory: self._array = Array() if simulate: for addr in range(self.depth): - self._array.append(Signal(self.width, name="{}({})".format(name, addr))) + self._array.append(Signal(self.width, name="{}({})" + .format(name or "memory", addr))) self.init = init -- 2.30.2