From 7cec918a948d26915f32fbc281b4f55fd022ed93 Mon Sep 17 00:00:00 2001 From: lkcl Date: Wed, 25 May 2022 14:07:45 +0100 Subject: [PATCH] --- openpower/sv/int_fp_mv.mdwn | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn index 60773e5d4..80544dc38 100644 --- a/openpower/sv/int_fp_mv.mdwn +++ b/openpower/sv/int_fp_mv.mdwn @@ -104,7 +104,7 @@ v3.1 Prefixed (`pfmvis` and `pfishmv`). If so it is recommended that ## Load BF16 Immediate -`fmvis FRT, FI` +`fmvis FRS, FI` Reinterprets `FI << 16` as a 32-bit float, which is then converted to a 64-bit float and written to `FRT`. This is equivalent to reinterpreting @@ -143,13 +143,13 @@ allowing clearing FPRs. | 0-5 | 6-10 | 11-15 | 16-25 | 26-30 | 31 | Form | |--------|------|-------|-------|-------|-----|-----| -| Major | FRT | d1 | d0 | XO | d2 | DX-Form | +| Major | FRS | d1 | d0 | XO | d2 | DX-Form | Pseudocode: bf16 = d0 || d1 || d2 fp32 = bf16 || [0]*16 - FRT = Single_to_Double(fp32) + FRS = Single_to_Double(fp32) ## Floating Extend Immediate @@ -171,7 +171,7 @@ lower 16-bits. Pseudocode: fp32 = FRS[48:63] || d0 || d1 || d2 - FRT = Single_to_Double(fp32) + FRS = Single_to_Double(fp32) *This instruction performs a Read-Modify-Write. FRS is read, the additional 16 bit immediate inserted, and the result also written to FRS* -- 2.30.2