From 7d37a07da37ba0020d0f53551ec0b10f7e88fccd Mon Sep 17 00:00:00 2001 From: lkcl Date: Tue, 14 Mar 2023 14:13:47 +0000 Subject: [PATCH] --- openpower/sv/rfc/ls007.mdwn | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/openpower/sv/rfc/ls007.mdwn b/openpower/sv/rfc/ls007.mdwn index 39ca53006..9526daa07 100644 --- a/openpower/sv/rfc/ls007.mdwn +++ b/openpower/sv/rfc/ls007.mdwn @@ -52,7 +52,7 @@ Instructions added **Keywords**: ``` -GPR, CR-Field, bit-manipulation, ternary, binary, dynamic, look-up-table +GPR, CR-Field, bit-manipulation, ternary, binary, dynamic, look-up-table (LUT), FPGA ``` **Motivation** @@ -64,14 +64,22 @@ GPR, CR-Field, bit-manipulation, ternary, binary, dynamic, look-up-table bitwise MUX `(A & B) | (~A & C)`. * `binlog` is like `ternlogi` except it supports any arbitrary 2-input 1-output bitwise operation, where the operation can be selected dynamically - at runtime. This operates similarly to LUTs in a FPGA. + at runtime. This operates similarly to a Programmable LUT in a FPGA. * `crternlogi` is like `ternlogi` except it works with CRs instead of GPRs. -* `crbinlog` is like `binlog` except it works with CRs instead of GPRs. +* `crbinlog` is like `binlog` except it works with CRs instead of GPRs. Likewise it + is similar to a Programmable LUT in an FPGA. **Notes and Observations**: * `ternlogi` is like the existing `xxeval` instruction, except operates on GPRs instead of VSRs and doesn't require VSX/VMX. +* `crternlogi` is similar to the group of CR Operations (crand, cror etc) which have + been identified as a Binary Lookup Group, except an 8-bit + immediate is used instead of a 4-bit one, and up to 4 bits of a CR Field may + be computed at once, saving 3 CR operations. +* `crbinlut` is similar to the Binary Lookup Group of CR Operations except that the + 4-bit lookup table comes from a CR Field instead of from an Immediate. Also + like `crternlogi` up to 4 bits may be computed at once. **Changes** -- 2.30.2