From 7dc4fe6fb40ff0cbc2be9c79fe6e75514620bc26 Mon Sep 17 00:00:00 2001 From: Rhys Kidd Date: Mon, 20 Jul 2020 13:07:48 +1000 Subject: [PATCH] nvc0: add documentation for nve4+ (Kepler) COPY class Has been utilised within nouveau in place of the former M2MF class, which was dropped for Kepler in PGRAPH in favour of: - a new P2MF object that only does simple upload; and - PCOPY took over responsibility of M2MF's other DMA functions. Autogenerated headers from envytools commit 32659e654170cb03038ccf2cb165decd3a2409d6 NVIDIA documentation released at: https://github.com/NVIDIA/open-gpu-doc/blob/master/classes/dma-copy/cla0b5.h Signed-off-by: Rhys Kidd Reviewed-by: Karol Herbst Part-of: --- src/gallium/drivers/nouveau/Makefile.sources | 1 + src/gallium/drivers/nouveau/meson.build | 1 + src/gallium/drivers/nouveau/nv_object.xml.h | 1 + .../drivers/nouveau/nvc0/nvc0_context.h | 1 + .../drivers/nouveau/nvc0/nvc0_screen.c | 2 +- .../drivers/nouveau/nvc0/nvc0_transfer.c | 31 +- .../drivers/nouveau/nvc0/nve4_copy.xml.h | 276 ++++++++++++++++++ 7 files changed, 298 insertions(+), 15 deletions(-) create mode 100644 src/gallium/drivers/nouveau/nvc0/nve4_copy.xml.h diff --git a/src/gallium/drivers/nouveau/Makefile.sources b/src/gallium/drivers/nouveau/Makefile.sources index ff25f3963a6..45c443aac43 100644 --- a/src/gallium/drivers/nouveau/Makefile.sources +++ b/src/gallium/drivers/nouveau/Makefile.sources @@ -209,4 +209,5 @@ NVC0_C_SOURCES := \ nvc0/nve4_compute.c \ nvc0/nve4_compute.h \ nvc0/nve4_compute.xml.h \ + nvc0/nve4_copy.xml.h \ nvc0/nve4_p2mf.xml.h diff --git a/src/gallium/drivers/nouveau/meson.build b/src/gallium/drivers/nouveau/meson.build index d0cfbe76478..5a2d28a8394 100644 --- a/src/gallium/drivers/nouveau/meson.build +++ b/src/gallium/drivers/nouveau/meson.build @@ -219,6 +219,7 @@ files_libnouveau = files( 'nvc0/nve4_compute.c', 'nvc0/nve4_compute.h', 'nvc0/nve4_compute.xml.h', + 'nvc0/nve4_copy.xml.h', 'nvc0/nve4_p2mf.xml.h', ) diff --git a/src/gallium/drivers/nouveau/nv_object.xml.h b/src/gallium/drivers/nouveau/nv_object.xml.h index fac195d4846..20d5fd37a1e 100644 --- a/src/gallium/drivers/nouveau/nv_object.xml.h +++ b/src/gallium/drivers/nouveau/nv_object.xml.h @@ -214,6 +214,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NV84_CRYPT_CLASS 0x000074c1 #define BLOB_NVC0_PCOPY1_CLASS 0x000090b8 #define BLOB_NVC0_PCOPY0_CLASS 0x000090b5 +#define NVE4_COPY_CLASS 0x0000a0b5 #define NVE4_P2MF_CLASS 0x0000a040 #define NVF0_P2MF_CLASS 0x0000a140 #define NV31_MPEG_CLASS 0x00003174 diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h index dacb48411ba..e2697d76b13 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h @@ -27,6 +27,7 @@ #include "nvc0/nvc0_3d.xml.h" #include "nv50/nv50_2d.xml.h" #include "nvc0/nvc0_m2mf.xml.h" +#include "nvc0/nve4_copy.xml.h" #include "nvc0/nve4_p2mf.xml.h" #include "nvc0/nvc0_compute.xml.h" #include "nvc0/nvc0_macros.h" diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c index 05eb1a1053d..1ea24fd8a7e 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c @@ -1132,7 +1132,7 @@ nvc0_screen_create(struct nouveau_device *dev) PUSH_DATA (push, screen->m2mf->oclass); if (screen->m2mf->oclass == NVE4_P2MF_CLASS) { BEGIN_NVC0(push, SUBC_COPY(NV01_SUBCHAN_OBJECT), 1); - PUSH_DATA (push, 0xa0b5); + PUSH_DATA (push, NVE4_COPY_CLASS); } ret = nouveau_object_new(chan, 0xbeef902d, NVC0_2D_CLASS, NULL, 0, diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c b/src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c index 74ce56a5c55..cdfd1d670e7 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c @@ -140,9 +140,9 @@ nve4_m2mf_transfer_rect(struct nvc0_context *nvc0, nouveau_pushbuf_bufctx(push, bctx); nouveau_pushbuf_validate(push); - exec = 0x400 /* REMAP_ENABLE */ | 0x200 /* 2D_ENABLE */ | 0x6 /* UNK */; + exec = NVE4_COPY_EXEC_SWIZZLE_ENABLE | NVE4_COPY_EXEC_2D_ENABLE | NVE4_COPY_EXEC_FLUSH | NVE4_COPY_EXEC_COPY_MODE_NON_PIPELINED; - BEGIN_NVC0(push, SUBC_COPY(0x0708), 1); + BEGIN_NVC0(push, NVE4_COPY(SWIZZLE), 1); PUSH_DATA (push, (cpbs[dst->cpp].nc - 1) << 24 | (cpbs[src->cpp].nc - 1) << 20 | (cpbs[src->cpp].cs - 1) << 16 | @@ -152,8 +152,8 @@ nve4_m2mf_transfer_rect(struct nvc0_context *nvc0, 0 << 0 /* DST_X = SRC_X */); if (nouveau_bo_memtype(dst->bo)) { - BEGIN_NVC0(push, SUBC_COPY(0x070c), 6); - PUSH_DATA (push, 0x1000 | dst->tile_mode); + BEGIN_NVC0(push, NVE4_COPY(DST_BLOCK_DIMENSIONS), 6); + PUSH_DATA (push, dst->tile_mode | NVE4_COPY_SRC_BLOCK_DIMENSIONS_GOB_HEIGHT_FERMI_8); PUSH_DATA (push, dst->width); PUSH_DATA (push, dst->height); PUSH_DATA (push, dst->depth); @@ -162,12 +162,12 @@ nve4_m2mf_transfer_rect(struct nvc0_context *nvc0, } else { assert(!dst->z); dst_base += dst->y * dst->pitch + dst->x * dst->cpp; - exec |= 0x100; /* DST_MODE_2D_LINEAR */ + exec |= NVE4_COPY_EXEC_DST_LAYOUT_BLOCKLINEAR; } if (nouveau_bo_memtype(src->bo)) { - BEGIN_NVC0(push, SUBC_COPY(0x0728), 6); - PUSH_DATA (push, 0x1000 | src->tile_mode); + BEGIN_NVC0(push, NVE4_COPY(SRC_BLOCK_DIMENSIONS), 6); + PUSH_DATA (push, src->tile_mode | NVE4_COPY_SRC_BLOCK_DIMENSIONS_GOB_HEIGHT_FERMI_8); PUSH_DATA (push, src->width); PUSH_DATA (push, src->height); PUSH_DATA (push, src->depth); @@ -176,10 +176,10 @@ nve4_m2mf_transfer_rect(struct nvc0_context *nvc0, } else { assert(!src->z); src_base += src->y * src->pitch + src->x * src->cpp; - exec |= 0x080; /* SRC_MODE_2D_LINEAR */ + exec |= NVE4_COPY_EXEC_SRC_LAYOUT_BLOCKLINEAR; } - BEGIN_NVC0(push, SUBC_COPY(0x0400), 8); + BEGIN_NVC0(push, NVE4_COPY(SRC_ADDRESS_HIGH), 8); PUSH_DATAh(push, src->bo->offset + src_base); PUSH_DATA (push, src->bo->offset + src_base); PUSH_DATAh(push, dst->bo->offset + dst_base); @@ -189,7 +189,7 @@ nve4_m2mf_transfer_rect(struct nvc0_context *nvc0, PUSH_DATA (push, nblocksx); PUSH_DATA (push, nblocksy); - BEGIN_NVC0(push, SUBC_COPY(0x0300), 1); + BEGIN_NVC0(push, NVE4_COPY(EXEC), 1); PUSH_DATA (push, exec); nouveau_bufctx_reset(bctx, 0); @@ -329,15 +329,18 @@ nve4_m2mf_copy_linear(struct nouveau_context *nv, nouveau_pushbuf_bufctx(push, bctx); nouveau_pushbuf_validate(push); - BEGIN_NVC0(push, SUBC_COPY(0x0400), 4); + BEGIN_NVC0(push, NVE4_COPY(SRC_ADDRESS_HIGH), 4); PUSH_DATAh(push, src->offset + srcoff); PUSH_DATA (push, src->offset + srcoff); PUSH_DATAh(push, dst->offset + dstoff); PUSH_DATA (push, dst->offset + dstoff); - BEGIN_NVC0(push, SUBC_COPY(0x0418), 1); + BEGIN_NVC0(push, NVE4_COPY(X_COUNT), 1); PUSH_DATA (push, size); - BEGIN_NVC0(push, SUBC_COPY(0x0300), 1); - PUSH_DATA (push, 0x186); + BEGIN_NVC0(push, NVE4_COPY(EXEC), 1); + PUSH_DATA (push, NVE4_COPY_EXEC_COPY_MODE_NON_PIPELINED | + NVE4_COPY_EXEC_FLUSH | + NVE4_COPY_EXEC_SRC_LAYOUT_BLOCKLINEAR | + NVE4_COPY_EXEC_DST_LAYOUT_BLOCKLINEAR); nouveau_bufctx_reset(bctx, 0); } diff --git a/src/gallium/drivers/nouveau/nvc0/nve4_copy.xml.h b/src/gallium/drivers/nouveau/nvc0/nve4_copy.xml.h new file mode 100644 index 00000000000..8c888628858 --- /dev/null +++ b/src/gallium/drivers/nouveau/nvc0/nve4_copy.xml.h @@ -0,0 +1,276 @@ +#ifndef NVE4_COPY_XML +#define NVE4_COPY_XML + +/* Autogenerated file, DO NOT EDIT manually! + +This file was generated by the rules-ng-ng headergen tool in this git repository: +https://github.com/envytools/envytools/ +git clone https://github.com/envytools/envytools.git + +The rules-ng-ng source files this header was generated from are: +- envytools/rnndb/fifo/gk104_copy.xml ( 4903 bytes, from 2020-07-19 06:15:26) +- envytools/rnndb/copyright.xml ( 6431 bytes, from 2020-07-11 09:17:41) +- envytools/rnndb-generated/nvchipsets.xml ( 3335 bytes, from 2020-06-09 15:36:30) +- envytools/rnndb/fifo/nv_object.xml ( 16105 bytes, from 2020-07-11 09:17:37) +- envytools/rnndb/g80_defs.xml ( 21768 bytes, from 2018-06-10 18:06:54) +- envytools/rnndb/nv_defs.xml ( 5522 bytes, from 2020-07-19 05:54:01) + +Copyright (C) 2006-2020 by the following authors: +- Artur Huillet (ahuillet) +- Ben Skeggs (darktama, darktama_) +- B. R. (koala_br) +- Carlos Martin (carlosmn) +- Christoph Bumiller (calim, chrisbmr) +- Dawid Gajownik (gajownik) +- Dmitry Baryshkov +- Dmitry Eremin-Solenikov (lumag) +- EdB (edb_) +- Erik Waling (erikwaling) +- Francisco Jerez (curro) +- Ilia Mirkin (imirkin) +- jb17bsome (jb17bsome) +- Jeremy Kolb (kjeremy) +- Laurent Carlier (lordheavy) +- Luca Barbieri (lb, lb1) +- Maarten Maathuis (stillunknown) +- Marcelina Kościelnicka (mwk) +- Mark Carey (careym) +- Matthieu Castet (mat-c) +- nvidiaman (nvidiaman) +- Patrice Mandin (pmandin, pmdata) +- Pekka Paalanen (pq, ppaalanen) +- Peter Popov (ironpeter) +- Richard Hughes (hughsient) +- Rudi Cilibrasi (cilibrar) +- Serge Martin +- Simon Raffeiner +- Stephane Loeuillet (leroutier) +- Stephane Marchesin (marcheu) +- sturmflut (sturmflut) +- Sylvain Munaut +- Victor Stinner (haypo) +- Wladmir van der Laan (miathan6) +- Younes Manton (ymanton) + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial +portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE +LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + + + +#define NVE4_COPY_NOP 0x00000100 + +#define NVE4_COPY_PM_TRIGGER 0x00000140 + +#define NVE4_COPY_QUERY_ADDRESS_HIGH 0x00000240 + +#define NVE4_COPY_QUERY_ADDRESS_LOW 0x00000244 + +#define NVE4_COPY_QUERY_COUNTER 0x00000248 + +#define NVE4_COPY_COND_ADDRESS_HIGH 0x00000254 + +#define NVE4_COPY_COND_ADDRESS_LOW 0x00000258 + +#define NVE4_COPY_COND_MODE 0x0000025c +#define NVE4_COPY_COND_MODE_NEVER 0x00000000 +#define NVE4_COPY_COND_MODE_ALWAYS 0x00000001 +#define NVE4_COPY_COND_MODE_RES_NON_ZERO 0x00000002 +#define NVE4_COPY_COND_MODE_EQUAL 0x00000003 +#define NVE4_COPY_COND_MODE_NOT_EQUAL 0x00000004 + +#define NVE4_COPY_SRC_PHYS_MODE 0x00000260 +#define NVE4_COPY_SRC_PHYS_MODE_TARGET__MASK 0x00000003 +#define NVE4_COPY_SRC_PHYS_MODE_TARGET__SHIFT 0 +#define NVE4_COPY_SRC_PHYS_MODE_TARGET_LOCAL_FB 0x00000000 +#define NVE4_COPY_SRC_PHYS_MODE_TARGET_COHERENT_SYSMEM 0x00000001 +#define NVE4_COPY_SRC_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM 0x00000002 + +#define NVE4_COPY_DST_PHYS_MODE 0x00000264 +#define NVE4_COPY_DST_PHYS_MODE_TARGET__MASK 0x00000003 +#define NVE4_COPY_DST_PHYS_MODE_TARGET__SHIFT 0 +#define NVE4_COPY_DST_PHYS_MODE_TARGET_LOCAL_FB 0x00000000 +#define NVE4_COPY_DST_PHYS_MODE_TARGET_COHERENT_SYSMEM 0x00000001 +#define NVE4_COPY_DST_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM 0x00000002 + +#define NVE4_COPY_EXEC 0x00000300 +#define NVE4_COPY_EXEC_COPY_MODE__MASK 0x00000003 +#define NVE4_COPY_EXEC_COPY_MODE__SHIFT 0 +#define NVE4_COPY_EXEC_COPY_MODE_NONE 0x00000000 +#define NVE4_COPY_EXEC_COPY_MODE_PIPELINED 0x00000001 +#define NVE4_COPY_EXEC_COPY_MODE_NON_PIPELINED 0x00000002 +#define NVE4_COPY_EXEC_FLUSH 0x00000004 +#define NVE4_COPY_EXEC_QUERY__MASK 0x00000018 +#define NVE4_COPY_EXEC_QUERY__SHIFT 3 +#define NVE4_COPY_EXEC_QUERY_NONE 0x00000000 +#define NVE4_COPY_EXEC_QUERY_SHORT 0x00000008 +#define NVE4_COPY_EXEC_QUERY_LONG 0x00000010 +#define NVE4_COPY_EXEC_INTR__MASK 0x00000060 +#define NVE4_COPY_EXEC_INTR__SHIFT 5 +#define NVE4_COPY_EXEC_INTR_NONE 0x00000000 +#define NVE4_COPY_EXEC_INTR_BLOCK 0x00000020 +#define NVE4_COPY_EXEC_INTR_NONBLOCK 0x00000040 +#define NVE4_COPY_EXEC_SRC_LAYOUT__MASK 0x00000080 +#define NVE4_COPY_EXEC_SRC_LAYOUT__SHIFT 7 +#define NVE4_COPY_EXEC_SRC_LAYOUT_PITCH 0x00000000 +#define NVE4_COPY_EXEC_SRC_LAYOUT_BLOCKLINEAR 0x00000080 +#define NVE4_COPY_EXEC_DST_LAYOUT__MASK 0x00000100 +#define NVE4_COPY_EXEC_DST_LAYOUT__SHIFT 8 +#define NVE4_COPY_EXEC_DST_LAYOUT_PITCH 0x00000000 +#define NVE4_COPY_EXEC_DST_LAYOUT_BLOCKLINEAR 0x00000100 +#define NVE4_COPY_EXEC_2D_ENABLE 0x00000200 +#define NVE4_COPY_EXEC_SWIZZLE_ENABLE 0x00000400 +#define NVE4_COPY_EXEC_BYPASS_L2__MASK 0x00000800 +#define NVE4_COPY_EXEC_BYPASS_L2__SHIFT 11 +#define NVE4_COPY_EXEC_BYPASS_L2_USE_PTE_SETTING 0x00000000 +#define NVE4_COPY_EXEC_BYPASS_L2_FORCE_VOLATILE 0x00000800 +#define NVE4_COPY_EXEC_SRC_TYPE__MASK 0x00001000 +#define NVE4_COPY_EXEC_SRC_TYPE__SHIFT 12 +#define NVE4_COPY_EXEC_SRC_TYPE_VIRTUAL 0x00000000 +#define NVE4_COPY_EXEC_SRC_TYPE_PHYSICAL 0x00001000 +#define NVE4_COPY_EXEC_DST_TYPE__MASK 0x00002000 +#define NVE4_COPY_EXEC_DST_TYPE__SHIFT 13 +#define NVE4_COPY_EXEC_DST_TYPE_VIRTUAL 0x00000000 +#define NVE4_COPY_EXEC_DST_TYPE_PHYSICAL 0x00002000 +#define NVE4_COPY_EXEC_SEMAPHORE_REDUCTION__MASK 0x0003c000 +#define NVE4_COPY_EXEC_SEMAPHORE_REDUCTION__SHIFT 14 +#define NVE4_COPY_EXEC_SEMAPHORE_REDUCTION_SIGN 0x00040000 +#define NVE4_COPY_EXEC_SEMAPHORE_REDUCTION 0x00080000 + +#define NVE4_COPY_SRC_ADDRESS_HIGH 0x00000400 + +#define NVE4_COPY_SRC_ADDRESS_LOW 0x00000404 + +#define NVE4_COPY_DST_ADDRESS_HIGH 0x00000408 + +#define NVE4_COPY_DST_ADDRESS_LOW 0x0000040c + +#define NVE4_COPY_SRC_PITCH 0x00000410 + +#define NVE4_COPY_DST_PITCH 0x00000414 + +#define NVE4_COPY_X_COUNT 0x00000418 + +#define NVE4_COPY_Y_COUNT 0x0000041c + +#define NVE4_COPY_CONST0 0x00000700 + +#define NVE4_COPY_CONST1 0x00000704 + +#define NVE4_COPY_SWIZZLE 0x00000708 +#define NVE4_COPY_SWIZZLE_COMPONENT0__MASK 0x0000000f +#define NVE4_COPY_SWIZZLE_COMPONENT0__SHIFT 0 +#define NVE4_COPY_SWIZZLE_COMPONENT0_SRC0 0x00000000 +#define NVE4_COPY_SWIZZLE_COMPONENT0_SRC1 0x00000001 +#define NVE4_COPY_SWIZZLE_COMPONENT0_SRC2 0x00000002 +#define NVE4_COPY_SWIZZLE_COMPONENT0_SRC3 0x00000003 +#define NVE4_COPY_SWIZZLE_COMPONENT0_CONST0 0x00000004 +#define NVE4_COPY_SWIZZLE_COMPONENT0_CONST1 0x00000005 +#define NVE4_COPY_SWIZZLE_COMPONENT0_ZERO 0x00000006 +#define NVE4_COPY_SWIZZLE_COMPONENT1__MASK 0x000000f0 +#define NVE4_COPY_SWIZZLE_COMPONENT1__SHIFT 4 +#define NVE4_COPY_SWIZZLE_COMPONENT1_SRC0 0x00000000 +#define NVE4_COPY_SWIZZLE_COMPONENT1_SRC1 0x00000010 +#define NVE4_COPY_SWIZZLE_COMPONENT1_SRC2 0x00000020 +#define NVE4_COPY_SWIZZLE_COMPONENT1_SRC3 0x00000030 +#define NVE4_COPY_SWIZZLE_COMPONENT1_CONST0 0x00000040 +#define NVE4_COPY_SWIZZLE_COMPONENT1_CONST1 0x00000050 +#define NVE4_COPY_SWIZZLE_COMPONENT1_ZERO 0x00000060 +#define NVE4_COPY_SWIZZLE_COMPONENT2__MASK 0x00000f00 +#define NVE4_COPY_SWIZZLE_COMPONENT2__SHIFT 8 +#define NVE4_COPY_SWIZZLE_COMPONENT2_SRC0 0x00000000 +#define NVE4_COPY_SWIZZLE_COMPONENT2_SRC1 0x00000100 +#define NVE4_COPY_SWIZZLE_COMPONENT2_SRC2 0x00000200 +#define NVE4_COPY_SWIZZLE_COMPONENT2_SRC3 0x00000300 +#define NVE4_COPY_SWIZZLE_COMPONENT2_CONST0 0x00000400 +#define NVE4_COPY_SWIZZLE_COMPONENT2_CONST1 0x00000500 +#define NVE4_COPY_SWIZZLE_COMPONENT2_ZERO 0x00000600 +#define NVE4_COPY_SWIZZLE_COMPONENT3__MASK 0x0000f000 +#define NVE4_COPY_SWIZZLE_COMPONENT3__SHIFT 12 +#define NVE4_COPY_SWIZZLE_COMPONENT3_SRC0 0x00000000 +#define NVE4_COPY_SWIZZLE_COMPONENT3_SRC1 0x00001000 +#define NVE4_COPY_SWIZZLE_COMPONENT3_SRC2 0x00002000 +#define NVE4_COPY_SWIZZLE_COMPONENT3_SRC3 0x00003000 +#define NVE4_COPY_SWIZZLE_COMPONENT3_CONST0 0x00004000 +#define NVE4_COPY_SWIZZLE_COMPONENT3_CONST1 0x00005000 +#define NVE4_COPY_SWIZZLE_COMPONENT3_ZERO 0x00006000 +#define NVE4_COPY_SWIZZLE_COMPONENT_SIZE_M1__MASK 0x00030000 +#define NVE4_COPY_SWIZZLE_COMPONENT_SIZE_M1__SHIFT 16 +#define NVE4_COPY_SWIZZLE_SRC_NUM_COMPONENTS_M1__MASK 0x00700000 +#define NVE4_COPY_SWIZZLE_SRC_NUM_COMPONENTS_M1__SHIFT 20 +#define NVE4_COPY_SWIZZLE_DST_NUM_COMPONENTS_M1__MASK 0x07000000 +#define NVE4_COPY_SWIZZLE_DST_NUM_COMPONENTS_M1__SHIFT 24 + +#define NVE4_COPY_DST_BLOCK_DIMENSIONS 0x0000070c +#define NVE4_COPY_DST_BLOCK_DIMENSIONS_GOB_HEIGHT__MASK 0x0000f000 +#define NVE4_COPY_DST_BLOCK_DIMENSIONS_GOB_HEIGHT__SHIFT 12 +#define NVE4_COPY_DST_BLOCK_DIMENSIONS_GOB_HEIGHT_TESLA_4 0x00000000 +#define NVE4_COPY_DST_BLOCK_DIMENSIONS_GOB_HEIGHT_FERMI_8 0x00001000 +#define NVE4_COPY_DST_BLOCK_DIMENSIONS_DEPTH__MASK 0x00000f00 +#define NVE4_COPY_DST_BLOCK_DIMENSIONS_DEPTH__SHIFT 8 +#define NVE4_COPY_DST_BLOCK_DIMENSIONS_HEIGHT__MASK 0x000000f0 +#define NVE4_COPY_DST_BLOCK_DIMENSIONS_HEIGHT__SHIFT 4 +#define NVE4_COPY_DST_BLOCK_DIMENSIONS_WIDTH__MASK 0x0000000f +#define NVE4_COPY_DST_BLOCK_DIMENSIONS_WIDTH__SHIFT 0 + +#define NVE4_COPY_DST_SIZE_X 0x00000710 + +#define NVE4_COPY_DST_SIZE_Y 0x00000714 + +#define NVE4_COPY_DST_SIZE_Z 0x00000718 + +#define NVE4_COPY_DST_POS_Z 0x0000071c + +#define NVE4_COPY_DST_POS_XY 0x00000720 +#define NVE4_COPY_DST_POS_XY_X__MASK 0x0000ffff +#define NVE4_COPY_DST_POS_XY_X__SHIFT 0 +#define NVE4_COPY_DST_POS_XY_Y__MASK 0xffff0000 +#define NVE4_COPY_DST_POS_XY_Y__SHIFT 16 + +#define NVE4_COPY_SRC_BLOCK_DIMENSIONS 0x00000728 +#define NVE4_COPY_SRC_BLOCK_DIMENSIONS_GOB_HEIGHT__MASK 0x0000f000 +#define NVE4_COPY_SRC_BLOCK_DIMENSIONS_GOB_HEIGHT__SHIFT 12 +#define NVE4_COPY_SRC_BLOCK_DIMENSIONS_GOB_HEIGHT_TESLA_4 0x00000000 +#define NVE4_COPY_SRC_BLOCK_DIMENSIONS_GOB_HEIGHT_FERMI_8 0x00001000 +#define NVE4_COPY_SRC_BLOCK_DIMENSIONS_DEPTH__MASK 0x00000f00 +#define NVE4_COPY_SRC_BLOCK_DIMENSIONS_DEPTH__SHIFT 8 +#define NVE4_COPY_SRC_BLOCK_DIMENSIONS_HEIGHT__MASK 0x000000f0 +#define NVE4_COPY_SRC_BLOCK_DIMENSIONS_HEIGHT__SHIFT 4 +#define NVE4_COPY_SRC_BLOCK_DIMENSIONS_WIDTH__MASK 0x0000000f +#define NVE4_COPY_SRC_BLOCK_DIMENSIONS_WIDTH__SHIFT 0 + +#define NVE4_COPY_SRC_SIZE_X 0x0000072c + +#define NVE4_COPY_SRC_SIZE_Y 0x00000730 + +#define NVE4_COPY_SRC_SIZE_Z 0x00000734 + +#define NVE4_COPY_SRC_POS_Z 0x00000738 + +#define NVE4_COPY_SRC_POS_XY 0x0000073c +#define NVE4_COPY_SRC_POS_XY_X__MASK 0x0000ffff +#define NVE4_COPY_SRC_POS_XY_X__SHIFT 0 +#define NVE4_COPY_SRC_POS_XY_Y__MASK 0xffff0000 +#define NVE4_COPY_SRC_POS_XY_Y__SHIFT 16 + +#define NVE4_COPY_WRCACHE_FLUSH 0x00001114 + + +#endif /* NVE4_COPY_XML */ -- 2.30.2