From 7ddcdef1b4e71be7a1b80209514566fd09ce2c2f Mon Sep 17 00:00:00 2001 From: lkcl Date: Fri, 9 Jun 2023 00:59:14 +0100 Subject: [PATCH] --- openpower/sv/po9_encoding/discussion.mdwn | 46 +++++++++++++++++++---- 1 file changed, 39 insertions(+), 7 deletions(-) diff --git a/openpower/sv/po9_encoding/discussion.mdwn b/openpower/sv/po9_encoding/discussion.mdwn index 4e8555b64..1dadc0c3a 100644 --- a/openpower/sv/po9_encoding/discussion.mdwn +++ b/openpower/sv/po9_encoding/discussion.mdwn @@ -1,5 +1,7 @@ # alternative 32-64 encoding (1) +conflict to resolve: EXT90x and EXT232. they are indistinguishable. + ``` |0-5| 6-27 28 29|30-31|32|33-35|36-37| 38-59 | 60-63 | Description | |---|-----|-----|-----|--|-----|-----|-------|-------|------------------| @@ -47,6 +49,8 @@ Instruction allocation restrictions: # alternative 32-64 encoding (2) +requires reducing SVP64Single to 23 bits. luckily there are 2 spare + the complexity of attempting to fit 32-bit instructions into PO9 is very high. encoding (1) attempts to fit `setvl` etc. into 32-bit but it is very tight. the entire EXT900 area would be @@ -61,19 +65,47 @@ the purpose of having it. * `svstep(2)` - Unvectorizable, EXT0xx, `SVSTATE,SVSHAPE0-3`, 5-bit XO * `svstep(2)` - Unvectorizable, EXT1xx, ditto +``` +|0-5| 6-28|29 30 31|32|33-36|37 | 38-60 | 61-63 | Description | +|---|-----|--------|--|-----|---|-------|-------|------------------| +|PO9| rm0 | 1 0 0 | 0 0000 rm1| xxxx | 000 | SVP64:EXT900 | +|PO9|!ZERO| 1 0 0 | 0 1000 1 | xxxx | 000 | SSingle:EXT900 | +|PO9| xxx | 1 0 0 | 0 !zero0 | xxxx | !zero1| 55-bit RESERVED | +|PO9| xxx | 0 0 0 | 32-bit EXT900 | +|PO9|!ZERO| 1 0 0 | 1 | DWi | SSingle:EXT232-263 | +|PO9| 000 | 1 0 0 | 1 | DWi | Scalar EXT232-263 | +|PO9| nnnn | 1 0 | 1 | DWi | SVP64:EXT232-263 | +|PO9| 0000 | 0 1 | Defined Word-instruction | 32-bit Unvec in 64b| +|PO9|!ZERO | 0 1 | Defined Word-instruction | SSingle:EXT000-063 | +|PO9| nnnn | 1 1 | Defined Word-instruction | SVP64:EXT000-063 | +``` +Length detection: + +``` + if PO1 return 64 + elif not PO9 return 32 + elif Word[29:31] = 0b000 return 32 + else return 64 +``` +# alternative 32-64 encoding (3) + +aim of this idea is to attempt simplification of area identificatiin + + ``` |0-5| 6-28|29 30 31|32|33-36|37 | 38-60 | 61-63 | Description | |---|-----|--------|--|-----|---|-------|-------|------------------| -|PO9| rm0 | 0 0 0 | 0 0000 rm1| xxxx | 000 | SVP64:EXT900 | -|PO9| rm0 | 0 0 0 | 1 0000 rm1| xxxx | 000 | SSingle:EXT900 | -|PO9| xxx | 0 0 0 | x !zero0 | xxxx | !zero1 | 55-bit RESERVED | -|PO9| xxx | 1 0 0 | 32-bit EXT900 | -|PO9| !ZERO | 0 0 | 1 | DWi | SSingle:EXT232-263 | -|PO9| 0000 | 0 0 | 1 | DWi | Scalar EXT232-263 | +|PO9| rm0 | 1 0 0 | 0 0000 rm1| xxxx | 000 | SVP64:EXT900 | +|PO9|!ZERO| 1 0 0 | 0 1000 1 | xxxx | 000 | SSingle:EXT900 | +|PO9| xxx | 1 0 0 | 0 !zero0 | xxxx | !zero1| 55-bit RESERVED | +|PO9| xxx | 0 0 0 | 32-bit EXT900 | +|PO9|!ZERO| 1 0 0 | 1 | DWi | SSingle:EXT232-263 | +|PO9| 000 | 1 0 0 | 1 | DWi | Scalar EXT232-263 | |PO9| nnnn | 1 0 | 1 | DWi | SVP64:EXT232-263 | |PO9| 0000 | 0 1 | Defined Word-instruction | 32-bit Unvec in 64b| -|PO9| !ZERO | 0 1 | Defined Word-instruction | SSingle:EXT000-063 | +|PO9|!ZERO | 0 1 | Defined Word-instruction | SSingle:EXT000-063 | |PO9| nnnn | 1 1 | Defined Word-instruction | SVP64:EXT000-063 | ``` + -- 2.30.2