From 7df76b802e634c6e20446de04a60aea149fbc459 Mon Sep 17 00:00:00 2001 From: Richard Earnshaw Date: Mon, 15 Dec 2008 17:24:13 +0000 Subject: [PATCH] opcodes: * arm-dis.c (coprocessor_opcodes): Disassemble VFP instructions using unified syntax. gas/testsuite: * gas/arm/group-reloc-ldc.d: Disassembly of VFP instructions now uses unified syntax. * gas/arm/vfp-non-overlap.d: Likewise. * gas/arm/vfp-neon-syntax.d: Likewise. * gas/arm/vfp-neon-syntax_t2.d: Likewise. * gas/arm/vfp1.d: Likewise. * gas/arm/vfp1_t2.d: Likewise. * gas/arm/vfp1xD.d: Likewise. * gas/arm/vfp1xD_t2.d: Likewise. * gas/arm/vfp2.d: Likewise. * gas/arm/vfp2_t2.d: Likewise. * gas/arm/vfpv3-32drs.d: Likewise. * gas/arm/vfpv3-const-conv.d: Likewise. ld/testsuite: * ld-arm/vfp11-fix-scalar.d: Disassembly of VFP instructions now uses unified syntax. * ld-arm/vfp11-fix-vector.d: Likewise. --- gas/testsuite/ChangeLog | 16 + gas/testsuite/gas/arm/group-reloc-ldc.d | 48 +- gas/testsuite/gas/arm/vfp-neon-overlap.d | 8 +- gas/testsuite/gas/arm/vfp-neon-syntax.d | 322 +++++++------- gas/testsuite/gas/arm/vfp-neon-syntax_t2.d | 354 +++++++-------- gas/testsuite/gas/arm/vfp1.d | 210 ++++----- gas/testsuite/gas/arm/vfp1_t2.d | 210 ++++----- gas/testsuite/gas/arm/vfp1xD.d | 484 ++++++++++----------- gas/testsuite/gas/arm/vfp1xD_t2.d | 484 ++++++++++----------- gas/testsuite/gas/arm/vfp2.d | 8 +- gas/testsuite/gas/arm/vfp2_t2.d | 8 +- gas/testsuite/gas/arm/vfpv3-32drs.d | 110 ++--- gas/testsuite/gas/arm/vfpv3-const-conv.d | 44 +- ld/testsuite/ChangeLog | 6 + ld/testsuite/ld-arm/vfp11-fix-scalar.d | 4 +- ld/testsuite/ld-arm/vfp11-fix-vector.d | 4 +- opcodes/ChangeLog | 5 + opcodes/arm-dis.c | 183 ++++---- 18 files changed, 1266 insertions(+), 1242 deletions(-) diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 333530192aa..37711799309 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,19 @@ +2008-12-15 Richard Earnshaw + + * gas/arm/group-reloc-ldc.d: Disassembly of VFP instructions now uses + unified syntax. + * gas/arm/vfp-non-overlap.d: Likewise. + * gas/arm/vfp-neon-syntax.d: Likewise. + * gas/arm/vfp-neon-syntax_t2.d: Likewise. + * gas/arm/vfp1.d: Likewise. + * gas/arm/vfp1_t2.d: Likewise. + * gas/arm/vfp1xD.d: Likewise. + * gas/arm/vfp1xD_t2.d: Likewise. + * gas/arm/vfp2.d: Likewise. + * gas/arm/vfp2_t2.d: Likewise. + * gas/arm/vfpv3-32drs.d: Likewise. + * gas/arm/vfpv3-const-conv.d: Likewise. + 2008-12-04 Ben Elliston * gas/ppc/booke.s: Remove booke64 instructions. diff --git a/gas/testsuite/gas/arm/group-reloc-ldc.d b/gas/testsuite/gas/arm/group-reloc-ldc.d index b1b3964547e..f1e4a16df5b 100644 --- a/gas/testsuite/gas/arm/group-reloc-ldc.d +++ b/gas/testsuite/gas/arm/group-reloc-ldc.d @@ -389,53 +389,53 @@ Disassembly of section .text: 2f8: R_ARM_LDC_SB_G1 f 0[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\] 2fc: R_ARM_LDC_SB_G2 f -0[0-9a-f]+ <[^>]+> ed900a85 flds s0, \[r0, #532\] +0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\] 300: R_ARM_LDC_PC_G0 f -0[0-9a-f]+ <[^>]+> ed900a85 flds s0, \[r0, #532\] +0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\] 304: R_ARM_LDC_PC_G1 f -0[0-9a-f]+ <[^>]+> ed900a85 flds s0, \[r0, #532\] +0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\] 308: R_ARM_LDC_PC_G2 f -0[0-9a-f]+ <[^>]+> ed900a85 flds s0, \[r0, #532\] +0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\] 30c: R_ARM_LDC_SB_G0 f -0[0-9a-f]+ <[^>]+> ed900a85 flds s0, \[r0, #532\] +0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\] 310: R_ARM_LDC_SB_G1 f -0[0-9a-f]+ <[^>]+> ed900a85 flds s0, \[r0, #532\] +0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\] 314: R_ARM_LDC_SB_G2 f -0[0-9a-f]+ <[^>]+> ed800a85 fsts s0, \[r0, #532\] +0[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\] 318: R_ARM_LDC_PC_G0 f -0[0-9a-f]+ <[^>]+> ed800a85 fsts s0, \[r0, #532\] +0[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\] 31c: R_ARM_LDC_PC_G1 f -0[0-9a-f]+ <[^>]+> ed800a85 fsts s0, \[r0, #532\] +0[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\] 320: R_ARM_LDC_PC_G2 f -0[0-9a-f]+ <[^>]+> ed800a85 fsts s0, \[r0, #532\] +0[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\] 324: R_ARM_LDC_SB_G0 f -0[0-9a-f]+ <[^>]+> ed800a85 fsts s0, \[r0, #532\] +0[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\] 328: R_ARM_LDC_SB_G1 f -0[0-9a-f]+ <[^>]+> ed800a85 fsts s0, \[r0, #532\] +0[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\] 32c: R_ARM_LDC_SB_G2 f -0[0-9a-f]+ <[^>]+> ed100a85 flds s0, \[r0, #-532\] +0[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\] 330: R_ARM_LDC_PC_G0 f -0[0-9a-f]+ <[^>]+> ed100a85 flds s0, \[r0, #-532\] +0[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\] 334: R_ARM_LDC_PC_G1 f -0[0-9a-f]+ <[^>]+> ed100a85 flds s0, \[r0, #-532\] +0[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\] 338: R_ARM_LDC_PC_G2 f -0[0-9a-f]+ <[^>]+> ed100a85 flds s0, \[r0, #-532\] +0[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\] 33c: R_ARM_LDC_SB_G0 f -0[0-9a-f]+ <[^>]+> ed100a85 flds s0, \[r0, #-532\] +0[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\] 340: R_ARM_LDC_SB_G1 f -0[0-9a-f]+ <[^>]+> ed100a85 flds s0, \[r0, #-532\] +0[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\] 344: R_ARM_LDC_SB_G2 f -0[0-9a-f]+ <[^>]+> ed000a85 fsts s0, \[r0, #-532\] +0[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\] 348: R_ARM_LDC_PC_G0 f -0[0-9a-f]+ <[^>]+> ed000a85 fsts s0, \[r0, #-532\] +0[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\] 34c: R_ARM_LDC_PC_G1 f -0[0-9a-f]+ <[^>]+> ed000a85 fsts s0, \[r0, #-532\] +0[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\] 350: R_ARM_LDC_PC_G2 f -0[0-9a-f]+ <[^>]+> ed000a85 fsts s0, \[r0, #-532\] +0[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\] 354: R_ARM_LDC_SB_G0 f -0[0-9a-f]+ <[^>]+> ed000a85 fsts s0, \[r0, #-532\] +0[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\] 358: R_ARM_LDC_SB_G1 f -0[0-9a-f]+ <[^>]+> ed000a85 fsts s0, \[r0, #-532\] +0[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\] 35c: R_ARM_LDC_SB_G2 f 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\] 360: R_ARM_LDC_PC_G0 f diff --git a/gas/testsuite/gas/arm/vfp-neon-overlap.d b/gas/testsuite/gas/arm/vfp-neon-overlap.d index b7815640089..6c328d3f1e5 100644 --- a/gas/testsuite/gas/arm/vfp-neon-overlap.d +++ b/gas/testsuite/gas/arm/vfp-neon-overlap.d @@ -9,10 +9,10 @@ Disassembly of section .text: 0[0-9a-f]+ <[^>]+> ec410b10 vmov d0, r0, r1 0[0-9a-f]+ <[^>]+> ec510b10 vmov r0, r1, d0 0[0-9a-f]+ <[^>]+> ec510b10 vmov r0, r1, d0 -0[0-9a-f]+ <[^>]+> ec900b09 fldmiax r0, {d0-d3} -0[0-9a-f]+ <[^>]+> ed300b09 fldmdbx r0!, {d0-d3} -0[0-9a-f]+ <[^>]+> ec800b09 fstmiax r0, {d0-d3} -0[0-9a-f]+ <[^>]+> ed200b09 fstmdbx r0!, {d0-d3} +0[0-9a-f]+ <[^>]+> ec900b09 fldmiax r0, {d0-d3}( ;@ Deprecated|) +0[0-9a-f]+ <[^>]+> ed300b09 fldmdbx r0!, {d0-d3}( ;@ Deprecated|) +0[0-9a-f]+ <[^>]+> ec800b09 fstmiax r0, {d0-d3}( ;@ Deprecated|) +0[0-9a-f]+ <[^>]+> ed200b09 fstmdbx r0!, {d0-d3}( ;@ Deprecated|) 0[0-9a-f]+ <[^>]+> ed900b00 vldr d0, \[r0\] 0[0-9a-f]+ <[^>]+> ed900b00 vldr d0, \[r0\] 0[0-9a-f]+ <[^>]+> ed800b00 vstr d0, \[r0\] diff --git a/gas/testsuite/gas/arm/vfp-neon-syntax.d b/gas/testsuite/gas/arm/vfp-neon-syntax.d index 8d9743527bc..d0231229c1c 100644 --- a/gas/testsuite/gas/arm/vfp-neon-syntax.d +++ b/gas/testsuite/gas/arm/vfp-neon-syntax.d @@ -5,183 +5,183 @@ .*: +file format .*arm.* Disassembly of section .text: -0[0-9a-f]+ <[^>]+> eeb00a60 fcpys s0, s1 -0[0-9a-f]+ <[^>]+> eeb00b41 fcpyd d0, d1 -0[0-9a-f]+ <[^>]+> eeb50a00 fconsts s0, #80 -0[0-9a-f]+ <[^>]+> eeb70b00 fconstd d0, #112 -0[0-9a-f]+ <[^>]+> ee100a90 fmrs r0, s1 -0[0-9a-f]+ <[^>]+> ee001a10 fmsr s0, r1 -0[0-9a-f]+ <[^>]+> ec510a11 fmrrs r0, r1, {s2, s3} -0[0-9a-f]+ <[^>]+> ec442a10 fmsrr {s0, s1}, r2, r4 -0[0-9a-f]+ <[^>]+> 0eb00a60 fcpyseq s0, s1 -0[0-9a-f]+ <[^>]+> 0eb00b41 fcpydeq d0, d1 -0[0-9a-f]+ <[^>]+> 0eb50a00 fconstseq s0, #80 -0[0-9a-f]+ <[^>]+> 0eb70b00 fconstdeq d0, #112 -0[0-9a-f]+ <[^>]+> 0e100a90 fmrseq r0, s1 -0[0-9a-f]+ <[^>]+> 0e001a10 fmsreq s0, r1 -0[0-9a-f]+ <[^>]+> 0c510a11 fmrrseq r0, r1, {s2, s3} -0[0-9a-f]+ <[^>]+> 0c442a10 fmsrreq {s0, s1}, r2, r4 -0[0-9a-f]+ <[^>]+> eeb10ae0 fsqrts s0, s1 -0[0-9a-f]+ <[^>]+> eeb10bc1 fsqrtd d0, d1 -0[0-9a-f]+ <[^>]+> 0eb10ae0 fsqrtseq s0, s1 -0[0-9a-f]+ <[^>]+> 0eb10bc1 fsqrtdeq d0, d1 -0[0-9a-f]+ <[^>]+> eeb00ae0 fabss s0, s1 -0[0-9a-f]+ <[^>]+> eeb00bc1 fabsd d0, d1 -0[0-9a-f]+ <[^>]+> 0eb00ae0 fabsseq s0, s1 -0[0-9a-f]+ <[^>]+> 0eb00bc1 fabsdeq d0, d1 -0[0-9a-f]+ <[^>]+> eeb10a60 fnegs s0, s1 -0[0-9a-f]+ <[^>]+> eeb10b41 fnegd d0, d1 -0[0-9a-f]+ <[^>]+> 0eb10a60 fnegseq s0, s1 -0[0-9a-f]+ <[^>]+> 0eb10b41 fnegdeq d0, d1 -0[0-9a-f]+ <[^>]+> eeb40a60 fcmps s0, s1 -0[0-9a-f]+ <[^>]+> eeb40b41 fcmpd d0, d1 -0[0-9a-f]+ <[^>]+> 0eb40a60 fcmpseq s0, s1 -0[0-9a-f]+ <[^>]+> 0eb40b41 fcmpdeq d0, d1 -0[0-9a-f]+ <[^>]+> eeb40ae0 fcmpes s0, s1 -0[0-9a-f]+ <[^>]+> eeb40bc1 fcmped d0, d1 -0[0-9a-f]+ <[^>]+> 0eb40ae0 fcmpeseq s0, s1 -0[0-9a-f]+ <[^>]+> 0eb40bc1 fcmpedeq d0, d1 -0[0-9a-f]+ <[^>]+> ee200ac1 fnmuls s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee210b42 fnmuld d0, d1, d2 -0[0-9a-f]+ <[^>]+> 0e200ac1 fnmulseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> 0e210b42 fnmuldeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> ee000ac1 fnmacs s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee010b42 fnmacd d0, d1, d2 -0[0-9a-f]+ <[^>]+> 0e000ac1 fnmacseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> 0e010b42 fnmacdeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> ee100ac1 fnmscs s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee110b42 fnmscd d0, d1, d2 -0[0-9a-f]+ <[^>]+> 0e100ac1 fnmscseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> 0e110b42 fnmscdeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> ee200a81 fmuls s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee210b02 fmuld d0, d1, d2 -0[0-9a-f]+ <[^>]+> 0e200a81 fmulseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> 0e210b02 fmuldeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> ee000a81 fmacs s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee010b02 fmacd d0, d1, d2 -0[0-9a-f]+ <[^>]+> 0e000a81 fmacseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> 0e010b02 fmacdeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> ee100a81 fmscs s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee110b02 fmscd d0, d1, d2 -0[0-9a-f]+ <[^>]+> 0e100a81 fmscseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> 0e110b02 fmscdeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> ee300a81 fadds s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee310b02 faddd d0, d1, d2 -0[0-9a-f]+ <[^>]+> 0e300a81 faddseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> 0e310b02 fadddeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> ee300ac1 fsubs s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee310b42 fsubd d0, d1, d2 -0[0-9a-f]+ <[^>]+> 0e300ac1 fsubseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> 0e310b42 fsubdeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> ee800a81 fdivs s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee810b02 fdivd d0, d1, d2 -0[0-9a-f]+ <[^>]+> 0e800a81 fdivseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> 0e810b02 fdivdeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> eeb50a40 fcmpzs s0 -0[0-9a-f]+ <[^>]+> eeb50b40 fcmpzd d0 -0[0-9a-f]+ <[^>]+> 0eb50a40 fcmpzseq s0 -0[0-9a-f]+ <[^>]+> 0eb50b40 fcmpzdeq d0 -0[0-9a-f]+ <[^>]+> eeb50ac0 fcmpezs s0 -0[0-9a-f]+ <[^>]+> eeb50bc0 fcmpezd d0 -0[0-9a-f]+ <[^>]+> 0eb50ac0 fcmpezseq s0 -0[0-9a-f]+ <[^>]+> 0eb50bc0 fcmpezdeq d0 -0[0-9a-f]+ <[^>]+> eebd0ae0 ftosizs s0, s1 -0[0-9a-f]+ <[^>]+> eebc0ae0 ftouizs s0, s1 -0[0-9a-f]+ <[^>]+> eebd0bc1 ftosizd s0, d1 -0[0-9a-f]+ <[^>]+> eebc0bc1 ftouizd s0, d1 -0[0-9a-f]+ <[^>]+> 0ebd0ae0 ftosizseq s0, s1 -0[0-9a-f]+ <[^>]+> 0ebc0ae0 ftouizseq s0, s1 -0[0-9a-f]+ <[^>]+> 0ebd0bc1 ftosizdeq s0, d1 -0[0-9a-f]+ <[^>]+> 0ebc0bc1 ftouizdeq s0, d1 -0[0-9a-f]+ <[^>]+> eebd0a60 ftosis s0, s1 -0[0-9a-f]+ <[^>]+> eebc0a60 ftouis s0, s1 -0[0-9a-f]+ <[^>]+> eeb80ae0 fsitos s0, s1 -0[0-9a-f]+ <[^>]+> eeb80a60 fuitos s0, s1 -0[0-9a-f]+ <[^>]+> eeb70bc1 fcvtsd s0, d1 -0[0-9a-f]+ <[^>]+> eeb70ae0 fcvtds d0, s1 -0[0-9a-f]+ <[^>]+> eebd0b41 ftosid s0, d1 -0[0-9a-f]+ <[^>]+> eebc0b41 ftouid s0, d1 -0[0-9a-f]+ <[^>]+> eeb80be0 fsitod d0, s1 -0[0-9a-f]+ <[^>]+> eeb80b60 fuitod d0, s1 -0[0-9a-f]+ <[^>]+> 0ebd0a60 ftosiseq s0, s1 -0[0-9a-f]+ <[^>]+> 0ebc0a60 ftouiseq s0, s1 -0[0-9a-f]+ <[^>]+> 0eb80ae0 fsitoseq s0, s1 -0[0-9a-f]+ <[^>]+> 0eb80a60 fuitoseq s0, s1 -0[0-9a-f]+ <[^>]+> 0eb70bc1 fcvtsdeq s0, d1 -0[0-9a-f]+ <[^>]+> 0eb70ae0 fcvtdseq d0, s1 -0[0-9a-f]+ <[^>]+> 0ebd0b41 ftosideq s0, d1 -0[0-9a-f]+ <[^>]+> 0ebc0b41 ftouideq s0, d1 -0[0-9a-f]+ <[^>]+> 0eb80be0 fsitodeq d0, s1 -0[0-9a-f]+ <[^>]+> 0eb80b60 fuitodeq d0, s1 -0[0-9a-f]+ <[^>]+> eebe0aef ftosls s0, #1 -0[0-9a-f]+ <[^>]+> eebf0aef ftouls s0, #1 -0[0-9a-f]+ <[^>]+> eeba0aef fsltos s0, #1 -0[0-9a-f]+ <[^>]+> eebb0aef fultos s0, #1 -0[0-9a-f]+ <[^>]+> eebe0bef ftosld d0, #1 -0[0-9a-f]+ <[^>]+> eebf0bef ftould d0, #1 -0[0-9a-f]+ <[^>]+> eeba0bef fsltod d0, #1 -0[0-9a-f]+ <[^>]+> eebb0bef fultod d0, #1 -0[0-9a-f]+ <[^>]+> eeba0a67 fshtos s0, #1 -0[0-9a-f]+ <[^>]+> eebb0a67 fuhtos s0, #1 -0[0-9a-f]+ <[^>]+> eeba0b67 fshtod d0, #1 -0[0-9a-f]+ <[^>]+> eebb0b67 fuhtod d0, #1 -0[0-9a-f]+ <[^>]+> eebe0a67 ftoshs s0, #1 -0[0-9a-f]+ <[^>]+> eebf0a67 ftouhs s0, #1 -0[0-9a-f]+ <[^>]+> eebe0b67 ftoshd d0, #1 -0[0-9a-f]+ <[^>]+> eebf0b67 ftouhd d0, #1 -0[0-9a-f]+ <[^>]+> 0ebe0aef ftoslseq s0, #1 -0[0-9a-f]+ <[^>]+> 0ebf0aef ftoulseq s0, #1 -0[0-9a-f]+ <[^>]+> 0eba0aef fsltoseq s0, #1 -0[0-9a-f]+ <[^>]+> 0ebb0aef fultoseq s0, #1 -0[0-9a-f]+ <[^>]+> 0ebe0bef ftosldeq d0, #1 -0[0-9a-f]+ <[^>]+> 0ebf0bef ftouldeq d0, #1 -0[0-9a-f]+ <[^>]+> 0eba0bef fsltodeq d0, #1 -0[0-9a-f]+ <[^>]+> 0ebb0bef fultodeq d0, #1 -0[0-9a-f]+ <[^>]+> 0eba0a67 fshtoseq s0, #1 -0[0-9a-f]+ <[^>]+> 0ebb0a67 fuhtoseq s0, #1 -0[0-9a-f]+ <[^>]+> 0eba0b67 fshtodeq d0, #1 -0[0-9a-f]+ <[^>]+> 0ebb0b67 fuhtodeq d0, #1 -0[0-9a-f]+ <[^>]+> 0ebe0a67 ftoshseq s0, #1 -0[0-9a-f]+ <[^>]+> 0ebf0a67 ftouhseq s0, #1 -0[0-9a-f]+ <[^>]+> 0ebe0b67 ftoshdeq d0, #1 -0[0-9a-f]+ <[^>]+> 0ebf0b67 ftouhdeq d0, #1 -0[0-9a-f]+ <[^>]+> ecd01a04 fldmias r0, {s3-s6} -0[0-9a-f]+ <[^>]+> ecd01a04 fldmias r0, {s3-s6} -0[0-9a-f]+ <[^>]+> ecf01a04 fldmias r0!, {s3-s6} -0[0-9a-f]+ <[^>]+> ed701a04 fldmdbs r0!, {s3-s6} +0[0-9a-f]+ <[^>]+> eeb00a60 (vmov\.f32|fcpys) s0, s1 +0[0-9a-f]+ <[^>]+> eeb00b41 (vmov\.f64|fcpyd) d0, d1 +0[0-9a-f]+ <[^>]+> eeb50a00 (vmov\.f32|fconsts) s0, #80 +0[0-9a-f]+ <[^>]+> eeb70b00 (vmov\.f64|fconstd) d0, #112 +0[0-9a-f]+ <[^>]+> ee100a90 (vmov|fmrs) r0, s1 +0[0-9a-f]+ <[^>]+> ee001a10 (vmov|fmsr) s0, r1 +0[0-9a-f]+ <[^>]+> ec510a11 (vmov r0, r1, s2, s3|fmrrs r0, r1, {s2, s3}) +0[0-9a-f]+ <[^>]+> ec442a10 (vmov s0, s1, r2, r4|fmsrr {s0, s1}, r2, r4) +0[0-9a-f]+ <[^>]+> 0eb00a60 (vmoveq\.f32|fcpyseq) s0, s1 +0[0-9a-f]+ <[^>]+> 0eb00b41 (vmoveq\.f64|fcpydeq) d0, d1 +0[0-9a-f]+ <[^>]+> 0eb50a00 (vmoveq\.f32|fconstseq) s0, #80 +0[0-9a-f]+ <[^>]+> 0eb70b00 (vmoveq\.f64|fconstdeq) d0, #112 +0[0-9a-f]+ <[^>]+> 0e100a90 (vmoveq|fmrseq) r0, s1 +0[0-9a-f]+ <[^>]+> 0e001a10 (vmoveq|fmsreq) s0, r1 +0[0-9a-f]+ <[^>]+> 0c510a11 (vmoveq r0, r1, s2, s3|fmrrseq r0, r1, {s2, s3}) +0[0-9a-f]+ <[^>]+> 0c442a10 (vmoveq s0, s1, r2, r4|fmsrreq {s0, s1}, r2, r4) +0[0-9a-f]+ <[^>]+> eeb10ae0 (vsqrt\.f32|fsqrts) s0, s1 +0[0-9a-f]+ <[^>]+> eeb10bc1 (vsqrt\.f64|fsqrtd) d0, d1 +0[0-9a-f]+ <[^>]+> 0eb10ae0 (vsqrteq.f32|fsqrtseq) s0, s1 +0[0-9a-f]+ <[^>]+> 0eb10bc1 (vsqrteq.f64|fsqrtdeq) d0, d1 +0[0-9a-f]+ <[^>]+> eeb00ae0 (vabs\.f32|fabss) s0, s1 +0[0-9a-f]+ <[^>]+> eeb00bc1 (vabs\.f64|fabsd) d0, d1 +0[0-9a-f]+ <[^>]+> 0eb00ae0 (vabseq\.f32|fabsseq) s0, s1 +0[0-9a-f]+ <[^>]+> 0eb00bc1 (vabseq\.f64|fabsdeq) d0, d1 +0[0-9a-f]+ <[^>]+> eeb10a60 (vneg\.f32|fnegs) s0, s1 +0[0-9a-f]+ <[^>]+> eeb10b41 (vneg\.f64|fnegd) d0, d1 +0[0-9a-f]+ <[^>]+> 0eb10a60 (vnegeq\.f32|fnegseq) s0, s1 +0[0-9a-f]+ <[^>]+> 0eb10b41 (vnegeq\.f64|fnegdeq) d0, d1 +0[0-9a-f]+ <[^>]+> eeb40a60 (vcmp\.f32|fcmps) s0, s1 +0[0-9a-f]+ <[^>]+> eeb40b41 (vcmp\.f64|fcmpd) d0, d1 +0[0-9a-f]+ <[^>]+> 0eb40a60 (vcmpeq\.f32|fcmpseq) s0, s1 +0[0-9a-f]+ <[^>]+> 0eb40b41 (vcmpeq\.f64|fcmpdeq) d0, d1 +0[0-9a-f]+ <[^>]+> eeb40ae0 (vcmpe\.f32|fcmpes) s0, s1 +0[0-9a-f]+ <[^>]+> eeb40bc1 (vcmpe\.f64|fcmped) d0, d1 +0[0-9a-f]+ <[^>]+> 0eb40ae0 (vcmpeeq\.f32|fcmpeseq) s0, s1 +0[0-9a-f]+ <[^>]+> 0eb40bc1 (vcmpeeq\.f64|fcmpedeq) d0, d1 +0[0-9a-f]+ <[^>]+> ee200ac1 (vnmul\.f32|fnmuls) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee210b42 (vnmul\.f64|fnmuld) d0, d1, d2 +0[0-9a-f]+ <[^>]+> 0e200ac1 (vnmuleq\.f32|fnmulseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> 0e210b42 (vnmuleq\.f64|fnmuldeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> ee000ac1 (vmls\.f32|fnmacs) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee010b42 (vmls\.f64|fnmacd) d0, d1, d2 +0[0-9a-f]+ <[^>]+> 0e000ac1 (vmlseq\.f32|fnmacseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> 0e010b42 (vmlseq\.f64|fnmacdeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> ee100ac1 (vnmla\.f32|fnmscs) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee110b42 (vnmla\.f64|fnmscd) d0, d1, d2 +0[0-9a-f]+ <[^>]+> 0e100ac1 (vnmlaeq\.f32|fnmscseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> 0e110b42 (vnmlaeq\.f64|fnmscdeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> ee200a81 (vmul\.f32|fmuls) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee210b02 (vmul\.f64|fmuld) d0, d1, d2 +0[0-9a-f]+ <[^>]+> 0e200a81 (vmuleq\.f32|fmulseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> 0e210b02 (vmuleq\.f64|fmuldeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> ee000a81 (vmla\.f32|fmacs) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee010b02 (vmla\.f64|fmacd) d0, d1, d2 +0[0-9a-f]+ <[^>]+> 0e000a81 (vmlaeq\.f32|fmacseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> 0e010b02 (vmlaeq\.f64|fmacdeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> ee100a81 (vnmls\.f32|fmscs) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee110b02 (vnmls\.f64|fmscd) d0, d1, d2 +0[0-9a-f]+ <[^>]+> 0e100a81 (vnmlseq\.f32|fmscseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> 0e110b02 (vnmlseq\.f64|fmscdeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> ee300a81 (vadd\.f32|fadds) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee310b02 (vadd\.f64|faddd) d0, d1, d2 +0[0-9a-f]+ <[^>]+> 0e300a81 (vaddeq\.f32|faddseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> 0e310b02 (vaddeq\.f64|fadddeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> ee300ac1 (vsub\.f32|fsubs) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee310b42 (vsub\.f64|fsubd) d0, d1, d2 +0[0-9a-f]+ <[^>]+> 0e300ac1 (vsubeq\.f32|fsubseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> 0e310b42 (vsubeq\.f64|fsubdeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> ee800a81 (vdiv\.f32|fdivs) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee810b02 (vdiv\.f64|fdivd) d0, d1, d2 +0[0-9a-f]+ <[^>]+> 0e800a81 (vdiveq\.f32|fdivseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> 0e810b02 (vdiveq\.f64|fdivdeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> eeb50a40 (vcmp\.f32 s0, #0.0|fcmpzs s0) +0[0-9a-f]+ <[^>]+> eeb50b40 (vcmp\.f64 d0, #0.0|fcmpzd d0) +0[0-9a-f]+ <[^>]+> 0eb50a40 (vcmpeq\.f32 s0, #0.0|fcmpzseq s0) +0[0-9a-f]+ <[^>]+> 0eb50b40 (vcmpeq\.f64 d0, #0.0|fcmpzdeq d0) +0[0-9a-f]+ <[^>]+> eeb50ac0 (vcmpe\.f32 s0, #0.0|fcmpezs s0) +0[0-9a-f]+ <[^>]+> eeb50bc0 (vcmpe\.f64 d0, #0.0|fcmpezd d0) +0[0-9a-f]+ <[^>]+> 0eb50ac0 (vcmpeeq\.f32 s0, #0.0|fcmpezseq s0) +0[0-9a-f]+ <[^>]+> 0eb50bc0 (vcmpeeq\.f64 d0, #0.0|fcmpezdeq d0) +0[0-9a-f]+ <[^>]+> eebd0ae0 (vcvt\.s32\.f32|ftosizs) s0, s1 +0[0-9a-f]+ <[^>]+> eebc0ae0 (vcvt\.u32\.f32|ftouizs) s0, s1 +0[0-9a-f]+ <[^>]+> eebd0bc1 (vcvt\.s32\.f64|ftosizd) s0, d1 +0[0-9a-f]+ <[^>]+> eebc0bc1 (vcvt\.u32\.f64|ftouizd) s0, d1 +0[0-9a-f]+ <[^>]+> 0ebd0ae0 (vcvteq\.s32\.f32|ftosizseq) s0, s1 +0[0-9a-f]+ <[^>]+> 0ebc0ae0 (vcvteq\.u32\.f32|ftouizseq) s0, s1 +0[0-9a-f]+ <[^>]+> 0ebd0bc1 (vcvteq\.s32\.f64|ftosizdeq) s0, d1 +0[0-9a-f]+ <[^>]+> 0ebc0bc1 (vcvteq\.u32\.f64|ftouizdeq) s0, d1 +0[0-9a-f]+ <[^>]+> eebd0a60 (vcvtr\.s32\.f32|ftosis) s0, s1 +0[0-9a-f]+ <[^>]+> eebc0a60 (vcvtr\.u32\.f32|ftouis) s0, s1 +0[0-9a-f]+ <[^>]+> eeb80ae0 (vcvt\.f32\.s32|fsitos) s0, s1 +0[0-9a-f]+ <[^>]+> eeb80a60 (vcvt\.f32\.u32|fuitos) s0, s1 +0[0-9a-f]+ <[^>]+> eeb70bc1 (vcvt\.f32\.f64|fcvtsd) s0, d1 +0[0-9a-f]+ <[^>]+> eeb70ae0 (vcvt\.f64\.f32|fcvtds) d0, s1 +0[0-9a-f]+ <[^>]+> eebd0b41 (vcvtr\.s32\.f64|ftosid) s0, d1 +0[0-9a-f]+ <[^>]+> eebc0b41 (vcvtr\.u32\.f64|ftouid) s0, d1 +0[0-9a-f]+ <[^>]+> eeb80be0 (vcvt\.f64\.s32|fsitod) d0, s1 +0[0-9a-f]+ <[^>]+> eeb80b60 (vcvt\.f64\.u32|fuitod) d0, s1 +0[0-9a-f]+ <[^>]+> 0ebd0a60 (vcvtreq\.s32\.f32|ftosiseq) s0, s1 +0[0-9a-f]+ <[^>]+> 0ebc0a60 (vcvtreq\.u32\.f32|ftouiseq) s0, s1 +0[0-9a-f]+ <[^>]+> 0eb80ae0 (vcvteq\.f32\.s32|fsitoseq) s0, s1 +0[0-9a-f]+ <[^>]+> 0eb80a60 (vcvteq\.f32\.u32|fuitoseq) s0, s1 +0[0-9a-f]+ <[^>]+> 0eb70bc1 (vcvteq\.f32\.f64|fcvtsdeq) s0, d1 +0[0-9a-f]+ <[^>]+> 0eb70ae0 (vcvteq\.f64\.f32|fcvtdseq) d0, s1 +0[0-9a-f]+ <[^>]+> 0ebd0b41 (vcvtreq\.s32\.f64|ftosideq) s0, d1 +0[0-9a-f]+ <[^>]+> 0ebc0b41 (vcvtreq\.u32\.f64|ftouideq) s0, d1 +0[0-9a-f]+ <[^>]+> 0eb80be0 (vcvteq\.f64\.s32|fsitodeq) d0, s1 +0[0-9a-f]+ <[^>]+> 0eb80b60 (vcvteq\.f64\.u32|fuitodeq) d0, s1 +0[0-9a-f]+ <[^>]+> eebe0aef (vcvt\.s32\.f32 s0, s0, #1|ftosls s0, #1) +0[0-9a-f]+ <[^>]+> eebf0aef (vcvt\.u32\.f32 s0, s0, #1|ftouls s0, #1) +0[0-9a-f]+ <[^>]+> eeba0aef (vcvt\.f32\.s32 s0, s0, #1|fsltos s0, #1) +0[0-9a-f]+ <[^>]+> eebb0aef (vcvt\.f32\.u32 s0, s0, #1|fultos s0, #1) +0[0-9a-f]+ <[^>]+> eebe0bef (vcvt\.s32\.f64 d0, d0, #1|ftosld d0, #1) +0[0-9a-f]+ <[^>]+> eebf0bef (vcvt\.u32\.f64 d0, d0, #1|ftould d0, #1) +0[0-9a-f]+ <[^>]+> eeba0bef (vcvt\.f64\.s32 d0, d0, #1|fsltod d0, #1) +0[0-9a-f]+ <[^>]+> eebb0bef (vcvt\.f64\.u32 d0, d0, #1|fultod d0, #1) +0[0-9a-f]+ <[^>]+> eeba0a67 (vcvt\.f32\.s16 s0, s0, #1|fshtos s0, #1) +0[0-9a-f]+ <[^>]+> eebb0a67 (vcvt\.f32\.u16 s0, s0, #1|fuhtos s0, #1) +0[0-9a-f]+ <[^>]+> eeba0b67 (vcvt\.f64\.s16 d0, d0, #1|fshtod d0, #1) +0[0-9a-f]+ <[^>]+> eebb0b67 (vcvt\.f64\.u16 d0, d0, #1|fuhtod d0, #1) +0[0-9a-f]+ <[^>]+> eebe0a67 (vcvt\.s16\.f32 s0, s0, #1|ftoshs s0, #1) +0[0-9a-f]+ <[^>]+> eebf0a67 (vcvt\.u16\.f32 s0, s0, #1|ftouhs s0, #1) +0[0-9a-f]+ <[^>]+> eebe0b67 (vcvt\.s16\.f64 d0, d0, #1|ftoshd d0, #1) +0[0-9a-f]+ <[^>]+> eebf0b67 (vcvt\.u16\.f64 d0, d0, #1|ftouhd d0, #1) +0[0-9a-f]+ <[^>]+> 0ebe0aef (vcvteq\.s32\.f32 s0, s0, #1|ftoslseq s0, #1) +0[0-9a-f]+ <[^>]+> 0ebf0aef (vcvteq\.u32\.f32 s0, s0, #1|ftoulseq s0, #1) +0[0-9a-f]+ <[^>]+> 0eba0aef (vcvteq\.f32\.s32 s0, s0, #1|fsltoseq s0, #1) +0[0-9a-f]+ <[^>]+> 0ebb0aef (vcvteq\.f32\.u32 s0, s0, #1|fultoseq s0, #1) +0[0-9a-f]+ <[^>]+> 0ebe0bef (vcvteq\.s32\.f64 d0, d0, #1|ftosldeq d0, #1) +0[0-9a-f]+ <[^>]+> 0ebf0bef (vcvteq\.u32\.f64 d0, d0, #1|ftouldeq d0, #1) +0[0-9a-f]+ <[^>]+> 0eba0bef (vcvteq\.f64\.s32 d0, d0, #1|fsltodeq d0, #1) +0[0-9a-f]+ <[^>]+> 0ebb0bef (vcvteq\.f64\.u32 d0, d0, #1|fultodeq d0, #1) +0[0-9a-f]+ <[^>]+> 0eba0a67 (vcvteq\.f32\.s16 s0, s0, #1|fshtoseq s0, #1) +0[0-9a-f]+ <[^>]+> 0ebb0a67 (vcvteq\.f32\.u16 s0, s0, #1|fuhtoseq s0, #1) +0[0-9a-f]+ <[^>]+> 0eba0b67 (vcvteq\.f64\.s16 d0, d0, #1|fshtodeq d0, #1) +0[0-9a-f]+ <[^>]+> 0ebb0b67 (vcvteq\.f64\.u16 d0, d0, #1|fuhtodeq d0, #1) +0[0-9a-f]+ <[^>]+> 0ebe0a67 (vcvteq\.s16\.f32 s0, s0, #1|ftoshseq s0, #1) +0[0-9a-f]+ <[^>]+> 0ebf0a67 (vcvteq\.u16\.f32 s0, s0, #1|ftouhseq s0, #1) +0[0-9a-f]+ <[^>]+> 0ebe0b67 (vcvteq\.s16\.f64 d0, d0, #1|ftoshdeq d0, #1) +0[0-9a-f]+ <[^>]+> 0ebf0b67 (vcvteq\.u16\.f64 d0, d0, #1|ftouhdeq d0, #1) +0[0-9a-f]+ <[^>]+> ecd01a04 (vldmia|fldmias) r0, {s3-s6} +0[0-9a-f]+ <[^>]+> ecd01a04 (vldmia|fldmias) r0, {s3-s6} +0[0-9a-f]+ <[^>]+> ecf01a04 (vldmia|fldmias) r0!, {s3-s6} +0[0-9a-f]+ <[^>]+> ed701a04 (vldmdb|fldmdbs) r0!, {s3-s6} 0[0-9a-f]+ <[^>]+> ec903b08 vldmia r0, {d3-d6} 0[0-9a-f]+ <[^>]+> ec903b08 vldmia r0, {d3-d6} 0[0-9a-f]+ <[^>]+> ecb03b08 vldmia r0!, {d3-d6} 0[0-9a-f]+ <[^>]+> ed303b08 vldmdb r0!, {d3-d6} -0[0-9a-f]+ <[^>]+> 0cd01a04 fldmiaseq r0, {s3-s6} -0[0-9a-f]+ <[^>]+> 0cd01a04 fldmiaseq r0, {s3-s6} -0[0-9a-f]+ <[^>]+> 0cf01a04 fldmiaseq r0!, {s3-s6} -0[0-9a-f]+ <[^>]+> 0d701a04 fldmdbseq r0!, {s3-s6} +0[0-9a-f]+ <[^>]+> 0cd01a04 (vldmiaeq|fldmiaseq) r0, {s3-s6} +0[0-9a-f]+ <[^>]+> 0cd01a04 (vldmiaeq|fldmiaseq) r0, {s3-s6} +0[0-9a-f]+ <[^>]+> 0cf01a04 (vldmiaeq|fldmiaseq) r0!, {s3-s6} +0[0-9a-f]+ <[^>]+> 0d701a04 (vldmdbeq|fldmdbseq) r0!, {s3-s6} 0[0-9a-f]+ <[^>]+> 0c903b08 vldmiaeq r0, {d3-d6} 0[0-9a-f]+ <[^>]+> 0c903b08 vldmiaeq r0, {d3-d6} 0[0-9a-f]+ <[^>]+> 0cb03b08 vldmiaeq r0!, {d3-d6} 0[0-9a-f]+ <[^>]+> 0d303b08 vldmdbeq r0!, {d3-d6} -0[0-9a-f]+ <[^>]+> ecc01a04 fstmias r0, {s3-s6} -0[0-9a-f]+ <[^>]+> ecc01a04 fstmias r0, {s3-s6} -0[0-9a-f]+ <[^>]+> ece01a04 fstmias r0!, {s3-s6} -0[0-9a-f]+ <[^>]+> ed601a04 fstmdbs r0!, {s3-s6} +0[0-9a-f]+ <[^>]+> ecc01a04 (vstmia|fstmias) r0, {s3-s6} +0[0-9a-f]+ <[^>]+> ecc01a04 (vstmia|fstmias) r0, {s3-s6} +0[0-9a-f]+ <[^>]+> ece01a04 (vstmia|fstmias) r0!, {s3-s6} +0[0-9a-f]+ <[^>]+> ed601a04 (vstmdb|fstmdbs) r0!, {s3-s6} 0[0-9a-f]+ <[^>]+> ec803b08 vstmia r0, {d3-d6} 0[0-9a-f]+ <[^>]+> ec803b08 vstmia r0, {d3-d6} 0[0-9a-f]+ <[^>]+> eca03b08 vstmia r0!, {d3-d6} 0[0-9a-f]+ <[^>]+> ed203b08 vstmdb r0!, {d3-d6} -0[0-9a-f]+ <[^>]+> 0cc01a04 fstmiaseq r0, {s3-s6} -0[0-9a-f]+ <[^>]+> 0cc01a04 fstmiaseq r0, {s3-s6} -0[0-9a-f]+ <[^>]+> 0ce01a04 fstmiaseq r0!, {s3-s6} -0[0-9a-f]+ <[^>]+> 0d601a04 fstmdbseq r0!, {s3-s6} +0[0-9a-f]+ <[^>]+> 0cc01a04 (vstmiaeq|fstmiaseq) r0, {s3-s6} +0[0-9a-f]+ <[^>]+> 0cc01a04 (vstmiaeq|fstmiaseq) r0, {s3-s6} +0[0-9a-f]+ <[^>]+> 0ce01a04 (vstmiaeq|fstmiaseq) r0!, {s3-s6} +0[0-9a-f]+ <[^>]+> 0d601a04 (vstmdbeq|fstmdbseq) r0!, {s3-s6} 0[0-9a-f]+ <[^>]+> 0c803b08 vstmiaeq r0, {d3-d6} 0[0-9a-f]+ <[^>]+> 0c803b08 vstmiaeq r0, {d3-d6} 0[0-9a-f]+ <[^>]+> 0ca03b08 vstmiaeq r0!, {d3-d6} 0[0-9a-f]+ <[^>]+> 0d203b08 vstmdbeq r0!, {d3-d6} -0[0-9a-f]+ <[^>]+> ed900a01 flds s0, \[r0, #4\] -0[0-9a-f]+ <[^>]+> ed900b01 vldr d0, \[r0, #4\] -0[0-9a-f]+ <[^>]+> 0d900a01 fldseq s0, \[r0, #4\] +0[0-9a-f]+ <[^>]+> ed900a01 (vldr|flds) s0, \[r0, #4\] +0[0-9a-f]+ <[^>]+> ed900b01 (vldr|vldr) d0, \[r0, #4\] +0[0-9a-f]+ <[^>]+> 0d900a01 (vldreq|fldseq) s0, \[r0, #4\] 0[0-9a-f]+ <[^>]+> 0d900b01 vldreq d0, \[r0, #4\] -0[0-9a-f]+ <[^>]+> ed800a01 fsts s0, \[r0, #4\] +0[0-9a-f]+ <[^>]+> ed800a01 (vstr|fsts) s0, \[r0, #4\] 0[0-9a-f]+ <[^>]+> ed800b01 vstr d0, \[r0, #4\] -0[0-9a-f]+ <[^>]+> 0d800a01 fstseq s0, \[r0, #4\] +0[0-9a-f]+ <[^>]+> 0d800a01 (vstreq|fstseq) s0, \[r0, #4\] 0[0-9a-f]+ <[^>]+> 0d800b01 vstreq d0, \[r0, #4\] diff --git a/gas/testsuite/gas/arm/vfp-neon-syntax_t2.d b/gas/testsuite/gas/arm/vfp-neon-syntax_t2.d index 5c022352858..090676a10d8 100644 --- a/gas/testsuite/gas/arm/vfp-neon-syntax_t2.d +++ b/gas/testsuite/gas/arm/vfp-neon-syntax_t2.d @@ -5,215 +5,215 @@ .*: +file format .*arm.* Disassembly of section \.text: -0[0-9a-f]+ <[^>]+> eeb0 0a60 fcpys s0, s1 -0[0-9a-f]+ <[^>]+> eeb0 0b41 fcpyd d0, d1 -0[0-9a-f]+ <[^>]+> eeb5 0a00 fconsts s0, #80 -0[0-9a-f]+ <[^>]+> eeb7 0b00 fconstd d0, #112 -0[0-9a-f]+ <[^>]+> ee10 0a90 fmrs r0, s1 -0[0-9a-f]+ <[^>]+> ee00 1a10 fmsr s0, r1 -0[0-9a-f]+ <[^>]+> ec51 0a11 fmrrs r0, r1, {s2, s3} -0[0-9a-f]+ <[^>]+> ec44 2a10 fmsrr {s0, s1}, r2, r4 +0[0-9a-f]+ <[^>]+> eeb0 0a60 (vmov\.f32|fcpys) s0, s1 +0[0-9a-f]+ <[^>]+> eeb0 0b41 (vmov\.f64|fcpyd) d0, d1 +0[0-9a-f]+ <[^>]+> eeb5 0a00 (vmov\.f32|fconsts) s0, #80 +0[0-9a-f]+ <[^>]+> eeb7 0b00 (vmov\.f64|fconstd) d0, #112 +0[0-9a-f]+ <[^>]+> ee10 0a90 (vmov|fmrs) r0, s1 +0[0-9a-f]+ <[^>]+> ee00 1a10 (vmov|fmsr) s0, r1 +0[0-9a-f]+ <[^>]+> ec51 0a11 (vmov r0, r1, s2, s3|fmrrs r0, r1, {s2, s3}) +0[0-9a-f]+ <[^>]+> ec44 2a10 (vmov s0, s1, r2, r4|fmsrr {s0, s1}, r2, r4) 0[0-9a-f]+ <[^>]+> bf01 itttt eq -0[0-9a-f]+ <[^>]+> eeb0 0a60 fcpyseq s0, s1 -0[0-9a-f]+ <[^>]+> eeb0 0b41 fcpydeq d0, d1 -0[0-9a-f]+ <[^>]+> eeb5 0a00 fconstseq s0, #80 -0[0-9a-f]+ <[^>]+> eeb7 0b00 fconstdeq d0, #112 +0[0-9a-f]+ <[^>]+> eeb0 0a60 (vmoveq\.f32|fcpyseq) s0, s1 +0[0-9a-f]+ <[^>]+> eeb0 0b41 (vmoveq\.f64|fcpydeq) d0, d1 +0[0-9a-f]+ <[^>]+> eeb5 0a00 (vmoveq\.f32|fconstseq) s0, #80 +0[0-9a-f]+ <[^>]+> eeb7 0b00 (vmoveq\.f64|fconstdeq) d0, #112 0[0-9a-f]+ <[^>]+> bf01 itttt eq -0[0-9a-f]+ <[^>]+> ee10 0a90 fmrseq r0, s1 -0[0-9a-f]+ <[^>]+> ee00 1a10 fmsreq s0, r1 -0[0-9a-f]+ <[^>]+> ec51 0a11 fmrrseq r0, r1, {s2, s3} -0[0-9a-f]+ <[^>]+> ec44 2a10 fmsrreq {s0, s1}, r2, r4 -0[0-9a-f]+ <[^>]+> eeb1 0ae0 fsqrts s0, s1 -0[0-9a-f]+ <[^>]+> eeb1 0bc1 fsqrtd d0, d1 -0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> eeb1 0ae0 fsqrtseq s0, s1 -0[0-9a-f]+ <[^>]+> eeb1 0bc1 fsqrtdeq d0, d1 -0[0-9a-f]+ <[^>]+> eeb0 0ae0 fabss s0, s1 -0[0-9a-f]+ <[^>]+> eeb0 0bc1 fabsd d0, d1 -0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> eeb0 0ae0 fabsseq s0, s1 -0[0-9a-f]+ <[^>]+> eeb0 0bc1 fabsdeq d0, d1 -0[0-9a-f]+ <[^>]+> eeb1 0a60 fnegs s0, s1 -0[0-9a-f]+ <[^>]+> eeb1 0b41 fnegd d0, d1 -0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> eeb1 0a60 fnegseq s0, s1 -0[0-9a-f]+ <[^>]+> eeb1 0b41 fnegdeq d0, d1 -0[0-9a-f]+ <[^>]+> eeb4 0a60 fcmps s0, s1 -0[0-9a-f]+ <[^>]+> eeb4 0b41 fcmpd d0, d1 -0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> eeb4 0a60 fcmpseq s0, s1 -0[0-9a-f]+ <[^>]+> eeb4 0b41 fcmpdeq d0, d1 -0[0-9a-f]+ <[^>]+> eeb4 0ae0 fcmpes s0, s1 -0[0-9a-f]+ <[^>]+> eeb4 0bc1 fcmped d0, d1 -0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> eeb4 0ae0 fcmpeseq s0, s1 -0[0-9a-f]+ <[^>]+> eeb4 0bc1 fcmpedeq d0, d1 -0[0-9a-f]+ <[^>]+> ee20 0ac1 fnmuls s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee21 0b42 fnmuld d0, d1, d2 -0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> ee20 0ac1 fnmulseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee21 0b42 fnmuldeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> ee00 0ac1 fnmacs s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee01 0b42 fnmacd d0, d1, d2 -0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> ee00 0ac1 fnmacseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee01 0b42 fnmacdeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> ee10 0ac1 fnmscs s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee11 0b42 fnmscd d0, d1, d2 -0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> ee10 0ac1 fnmscseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee11 0b42 fnmscdeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> ee20 0a81 fmuls s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee21 0b02 fmuld d0, d1, d2 -0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> ee20 0a81 fmulseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee21 0b02 fmuldeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> ee00 0a81 fmacs s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee01 0b02 fmacd d0, d1, d2 -0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> ee00 0a81 fmacseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee01 0b02 fmacdeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> ee10 0a81 fmscs s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee11 0b02 fmscd d0, d1, d2 -0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> ee10 0a81 fmscseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee11 0b02 fmscdeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> ee30 0a81 fadds s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee31 0b02 faddd d0, d1, d2 -0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> ee30 0a81 faddseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee31 0b02 fadddeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> ee30 0ac1 fsubs s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee31 0b42 fsubd d0, d1, d2 -0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> ee30 0ac1 fsubseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee31 0b42 fsubdeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> ee80 0a81 fdivs s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee81 0b02 fdivd d0, d1, d2 -0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> ee80 0a81 fdivseq s0, s1, s2 -0[0-9a-f]+ <[^>]+> ee81 0b02 fdivdeq d0, d1, d2 -0[0-9a-f]+ <[^>]+> eeb5 0a40 fcmpzs s0 -0[0-9a-f]+ <[^>]+> eeb5 0b40 fcmpzd d0 -0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> eeb5 0a40 fcmpzseq s0 -0[0-9a-f]+ <[^>]+> eeb5 0b40 fcmpzdeq d0 -0[0-9a-f]+ <[^>]+> eeb5 0ac0 fcmpezs s0 -0[0-9a-f]+ <[^>]+> eeb5 0bc0 fcmpezd d0 -0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> eeb5 0ac0 fcmpezseq s0 -0[0-9a-f]+ <[^>]+> eeb5 0bc0 fcmpezdeq d0 -0[0-9a-f]+ <[^>]+> eebd 0ae0 ftosizs s0, s1 -0[0-9a-f]+ <[^>]+> eebc 0ae0 ftouizs s0, s1 -0[0-9a-f]+ <[^>]+> eebd 0bc1 ftosizd s0, d1 -0[0-9a-f]+ <[^>]+> eebc 0bc1 ftouizd s0, d1 +0[0-9a-f]+ <[^>]+> ee10 0a90 (vmoveq|fmrseq) r0, s1 +0[0-9a-f]+ <[^>]+> ee00 1a10 (vmoveq|fmsreq) s0, r1 +0[0-9a-f]+ <[^>]+> ec51 0a11 (vmoveq r0, r1, s2, s3|fmrrseq r0, r1, {s2, s3}) +0[0-9a-f]+ <[^>]+> ec44 2a10 (vmoveq s0, s1, r2, r4|fmsrreq {s0, s1}, r2, r4) +0[0-9a-f]+ <[^>]+> eeb1 0ae0 (vsqrt\.f32|fsqrts) s0, s1 +0[0-9a-f]+ <[^>]+> eeb1 0bc1 (vsqrt\.f64|fsqrtd) d0, d1 +0[0-9a-f]+ <[^>]+> bf04 itt eq +0[0-9a-f]+ <[^>]+> eeb1 0ae0 (vsqrteq\.f32|fsqrtseq) s0, s1 +0[0-9a-f]+ <[^>]+> eeb1 0bc1 (vsqrteq\.f64|fsqrtdeq) d0, d1 +0[0-9a-f]+ <[^>]+> eeb0 0ae0 (vabs\.f32|fabss) s0, s1 +0[0-9a-f]+ <[^>]+> eeb0 0bc1 (vabs\.f64|fabsd) d0, d1 +0[0-9a-f]+ <[^>]+> bf04 itt eq +0[0-9a-f]+ <[^>]+> eeb0 0ae0 (vabseq\.f32|fabsseq) s0, s1 +0[0-9a-f]+ <[^>]+> eeb0 0bc1 (vabseq\.f64|fabsdeq) d0, d1 +0[0-9a-f]+ <[^>]+> eeb1 0a60 (vneg\.f32|fnegs) s0, s1 +0[0-9a-f]+ <[^>]+> eeb1 0b41 (vneg\.f64|fnegd) d0, d1 +0[0-9a-f]+ <[^>]+> bf04 itt eq +0[0-9a-f]+ <[^>]+> eeb1 0a60 (vnegeq\.f32|fnegseq) s0, s1 +0[0-9a-f]+ <[^>]+> eeb1 0b41 (vnegeq\.f64|fnegdeq) d0, d1 +0[0-9a-f]+ <[^>]+> eeb4 0a60 (vcmp\.f32|fcmps) s0, s1 +0[0-9a-f]+ <[^>]+> eeb4 0b41 (vcmp\.f64|fcmpd) d0, d1 +0[0-9a-f]+ <[^>]+> bf04 itt eq +0[0-9a-f]+ <[^>]+> eeb4 0a60 (vcmpeq\.f32|fcmpseq) s0, s1 +0[0-9a-f]+ <[^>]+> eeb4 0b41 (vcmpeq\.f64|fcmpdeq) d0, d1 +0[0-9a-f]+ <[^>]+> eeb4 0ae0 (vcmpe\.f32|fcmpes) s0, s1 +0[0-9a-f]+ <[^>]+> eeb4 0bc1 (vcmpe\.f64|fcmped) d0, d1 +0[0-9a-f]+ <[^>]+> bf04 itt eq +0[0-9a-f]+ <[^>]+> eeb4 0ae0 (vcmpeeq\.f32|fcmpeseq) s0, s1 +0[0-9a-f]+ <[^>]+> eeb4 0bc1 (vcmpeeq\.f64|fcmpedeq) d0, d1 +0[0-9a-f]+ <[^>]+> ee20 0ac1 (vnmul\.f32|fnmuls) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee21 0b42 (vnmul\.f64|fnmuld) d0, d1, d2 +0[0-9a-f]+ <[^>]+> bf04 itt eq +0[0-9a-f]+ <[^>]+> ee20 0ac1 (vnmuleq\.f32|fnmulseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee21 0b42 (vnmuleq\.f64|fnmuldeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> ee00 0ac1 (vmls\.f32|fnmacs) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee01 0b42 (vmls\.f64|fnmacd) d0, d1, d2 +0[0-9a-f]+ <[^>]+> bf04 itt eq +0[0-9a-f]+ <[^>]+> ee00 0ac1 (vmlseq\.f32|fnmacseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee01 0b42 (vmlseq\.f64|fnmacdeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> ee10 0ac1 (vnmla\.f32|fnmscs) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee11 0b42 (vnmla\.f64|fnmscd) d0, d1, d2 +0[0-9a-f]+ <[^>]+> bf04 itt eq +0[0-9a-f]+ <[^>]+> ee10 0ac1 (vnmlaeq\.f32|fnmscseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee11 0b42 (vnmlaeq\.f64|fnmscdeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> ee20 0a81 (vmul\.f32|fmuls) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee21 0b02 (vmul\.f64|fmuld) d0, d1, d2 +0[0-9a-f]+ <[^>]+> bf04 itt eq +0[0-9a-f]+ <[^>]+> ee20 0a81 (vmuleq\.f32|fmulseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee21 0b02 (vmuleq\.f64|fmuldeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> ee00 0a81 (vmla\.f32|fmacs) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee01 0b02 (vmla\.f64|fmacd) d0, d1, d2 +0[0-9a-f]+ <[^>]+> bf04 itt eq +0[0-9a-f]+ <[^>]+> ee00 0a81 (vmlaeq\.f32|fmacseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee01 0b02 (vmlaeq\.f64|fmacdeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> ee10 0a81 (vnmls\.f32|fmscs) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee11 0b02 (vnmls\.f64|fmscd) d0, d1, d2 +0[0-9a-f]+ <[^>]+> bf04 itt eq +0[0-9a-f]+ <[^>]+> ee10 0a81 (vnmlseq\.f32|fmscseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee11 0b02 (vnmlseq\.f64|fmscdeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> ee30 0a81 (vadd\.f32|fadds) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee31 0b02 (vadd\.f64|faddd) d0, d1, d2 +0[0-9a-f]+ <[^>]+> bf04 itt eq +0[0-9a-f]+ <[^>]+> ee30 0a81 (vaddeq\.f32|faddseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee31 0b02 (vaddeq\.f64|fadddeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> ee30 0ac1 (vsub\.f32|fsubs) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee31 0b42 (vsub\.f64|fsubd) d0, d1, d2 +0[0-9a-f]+ <[^>]+> bf04 itt eq +0[0-9a-f]+ <[^>]+> ee30 0ac1 (vsubeq\.f32|fsubseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee31 0b42 (vsubeq\.f64|fsubdeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> ee80 0a81 (vdiv\.f32|fdivs) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee81 0b02 (vdiv\.f64|fdivd) d0, d1, d2 +0[0-9a-f]+ <[^>]+> bf04 itt eq +0[0-9a-f]+ <[^>]+> ee80 0a81 (vdiveq\.f32|fdivseq) s0, s1, s2 +0[0-9a-f]+ <[^>]+> ee81 0b02 (vdiveq\.f64|fdivdeq) d0, d1, d2 +0[0-9a-f]+ <[^>]+> eeb5 0a40 (vcmp\.f32 s0, #0.0|fcmpzs s0) +0[0-9a-f]+ <[^>]+> eeb5 0b40 (vcmp\.f64 d0, #0.0|fcmpzd d0) +0[0-9a-f]+ <[^>]+> bf04 itt eq +0[0-9a-f]+ <[^>]+> eeb5 0a40 (vcmpeq\.f32 s0, #0.0|fcmpzseq s0) +0[0-9a-f]+ <[^>]+> eeb5 0b40 (vcmpeq\.f64 d0, #0.0|fcmpzdeq d0) +0[0-9a-f]+ <[^>]+> eeb5 0ac0 (vcmpe\.f32 s0, #0.0|fcmpezs s0) +0[0-9a-f]+ <[^>]+> eeb5 0bc0 (vcmpe\.f64 d0, #0.0|fcmpezd d0) +0[0-9a-f]+ <[^>]+> bf04 itt eq +0[0-9a-f]+ <[^>]+> eeb5 0ac0 (vcmpeeq\.f32 s0, #0.0|fcmpezseq s0) +0[0-9a-f]+ <[^>]+> eeb5 0bc0 (vcmpeeq\.f64 d0, #0.0|fcmpezdeq d0) +0[0-9a-f]+ <[^>]+> eebd 0ae0 (vcvt\.s32\.f32|ftosizs) s0, s1 +0[0-9a-f]+ <[^>]+> eebc 0ae0 (vcvt\.u32\.f32|ftouizs) s0, s1 +0[0-9a-f]+ <[^>]+> eebd 0bc1 (vcvt\.s32\.f64|ftosizd) s0, d1 +0[0-9a-f]+ <[^>]+> eebc 0bc1 (vcvt\.u32\.f64|ftouizd) s0, d1 0[0-9a-f]+ <[^>]+> bf01 itttt eq -0[0-9a-f]+ <[^>]+> eebd 0ae0 ftosizseq s0, s1 -0[0-9a-f]+ <[^>]+> eebc 0ae0 ftouizseq s0, s1 -0[0-9a-f]+ <[^>]+> eebd 0bc1 ftosizdeq s0, d1 -0[0-9a-f]+ <[^>]+> eebc 0bc1 ftouizdeq s0, d1 -0[0-9a-f]+ <[^>]+> eebd 0a60 ftosis s0, s1 -0[0-9a-f]+ <[^>]+> eebc 0a60 ftouis s0, s1 -0[0-9a-f]+ <[^>]+> eeb8 0ae0 fsitos s0, s1 -0[0-9a-f]+ <[^>]+> eeb8 0a60 fuitos s0, s1 -0[0-9a-f]+ <[^>]+> eeb7 0bc1 fcvtsd s0, d1 -0[0-9a-f]+ <[^>]+> eeb7 0ae0 fcvtds d0, s1 -0[0-9a-f]+ <[^>]+> eebd 0b41 ftosid s0, d1 -0[0-9a-f]+ <[^>]+> eebc 0b41 ftouid s0, d1 -0[0-9a-f]+ <[^>]+> eeb8 0be0 fsitod d0, s1 -0[0-9a-f]+ <[^>]+> eeb8 0b60 fuitod d0, s1 +0[0-9a-f]+ <[^>]+> eebd 0ae0 (vcvteq\.s32\.f32|ftosizseq) s0, s1 +0[0-9a-f]+ <[^>]+> eebc 0ae0 (vcvteq\.u32\.f32|ftouizseq) s0, s1 +0[0-9a-f]+ <[^>]+> eebd 0bc1 (vcvteq\.s32\.f64|ftosizdeq) s0, d1 +0[0-9a-f]+ <[^>]+> eebc 0bc1 (vcvteq\.u32\.f64|ftouizdeq) s0, d1 +0[0-9a-f]+ <[^>]+> eebd 0a60 (vcvtr\.s32\.f32|ftosis) s0, s1 +0[0-9a-f]+ <[^>]+> eebc 0a60 (vcvtr\.u32\.f32|ftouis) s0, s1 +0[0-9a-f]+ <[^>]+> eeb8 0ae0 (vcvt\.f32\.s32|fsitos) s0, s1 +0[0-9a-f]+ <[^>]+> eeb8 0a60 (vcvt\.f32\.u32|fuitos) s0, s1 +0[0-9a-f]+ <[^>]+> eeb7 0bc1 (vcvt\.f32\.f64|fcvtsd) s0, d1 +0[0-9a-f]+ <[^>]+> eeb7 0ae0 (vcvt\.f64\.f32|fcvtds) d0, s1 +0[0-9a-f]+ <[^>]+> eebd 0b41 (vcvtr\.s32\.f64|ftosid) s0, d1 +0[0-9a-f]+ <[^>]+> eebc 0b41 (vcvtr\.u32\.f64|ftouid) s0, d1 +0[0-9a-f]+ <[^>]+> eeb8 0be0 (vcvt\.f64\.s32|fsitod) d0, s1 +0[0-9a-f]+ <[^>]+> eeb8 0b60 (vcvt\.f64\.u32|fuitod) d0, s1 0[0-9a-f]+ <[^>]+> bf01 itttt eq -0[0-9a-f]+ <[^>]+> eebd 0a60 ftosiseq s0, s1 -0[0-9a-f]+ <[^>]+> eebc 0a60 ftouiseq s0, s1 -0[0-9a-f]+ <[^>]+> eeb8 0ae0 fsitoseq s0, s1 -0[0-9a-f]+ <[^>]+> eeb8 0a60 fuitoseq s0, s1 +0[0-9a-f]+ <[^>]+> eebd 0a60 (vcvtreq\.s32\.f32|ftosiseq) s0, s1 +0[0-9a-f]+ <[^>]+> eebc 0a60 (vcvtreq\.u32\.f32|ftouiseq) s0, s1 +0[0-9a-f]+ <[^>]+> eeb8 0ae0 (vcvteq\.f32\.s32|fsitoseq) s0, s1 +0[0-9a-f]+ <[^>]+> eeb8 0a60 (vcvteq\.f32\.u32|fuitoseq) s0, s1 0[0-9a-f]+ <[^>]+> bf01 itttt eq -0[0-9a-f]+ <[^>]+> eeb7 0bc1 fcvtsdeq s0, d1 -0[0-9a-f]+ <[^>]+> eeb7 0ae0 fcvtdseq d0, s1 -0[0-9a-f]+ <[^>]+> eebd 0b41 ftosideq s0, d1 -0[0-9a-f]+ <[^>]+> eebc 0b41 ftouideq s0, d1 -0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> eeb8 0be0 fsitodeq d0, s1 -0[0-9a-f]+ <[^>]+> eeb8 0b60 fuitodeq d0, s1 -0[0-9a-f]+ <[^>]+> eebe 0aef ftosls s0, #1 -0[0-9a-f]+ <[^>]+> eebf 0aef ftouls s0, #1 -0[0-9a-f]+ <[^>]+> eeba 0aef fsltos s0, #1 -0[0-9a-f]+ <[^>]+> eebb 0aef fultos s0, #1 -0[0-9a-f]+ <[^>]+> eebe 0bef ftosld d0, #1 -0[0-9a-f]+ <[^>]+> eebf 0bef ftould d0, #1 -0[0-9a-f]+ <[^>]+> eeba 0bef fsltod d0, #1 -0[0-9a-f]+ <[^>]+> eebb 0bef fultod d0, #1 -0[0-9a-f]+ <[^>]+> eeba 0a67 fshtos s0, #1 -0[0-9a-f]+ <[^>]+> eebb 0a67 fuhtos s0, #1 -0[0-9a-f]+ <[^>]+> eeba 0b67 fshtod d0, #1 -0[0-9a-f]+ <[^>]+> eebb 0b67 fuhtod d0, #1 -0[0-9a-f]+ <[^>]+> eebe 0a67 ftoshs s0, #1 -0[0-9a-f]+ <[^>]+> eebf 0a67 ftouhs s0, #1 -0[0-9a-f]+ <[^>]+> eebe 0b67 ftoshd d0, #1 -0[0-9a-f]+ <[^>]+> eebf 0b67 ftouhd d0, #1 +0[0-9a-f]+ <[^>]+> eeb7 0bc1 (vcvteq\.f32\.f64|fcvtsdeq) s0, d1 +0[0-9a-f]+ <[^>]+> eeb7 0ae0 (vcvteq\.f64\.f32|fcvtdseq) d0, s1 +0[0-9a-f]+ <[^>]+> eebd 0b41 (vcvtreq\.s32\.f64|ftosideq) s0, d1 +0[0-9a-f]+ <[^>]+> eebc 0b41 (vcvtreq\.u32\.f64|ftouideq) s0, d1 +0[0-9a-f]+ <[^>]+> bf04 itt eq +0[0-9a-f]+ <[^>]+> eeb8 0be0 (vcvteq\.f64\.s32|fsitodeq) d0, s1 +0[0-9a-f]+ <[^>]+> eeb8 0b60 (vcvteq\.f64\.u32|fuitodeq) d0, s1 +0[0-9a-f]+ <[^>]+> eebe 0aef (vcvt\.s32\.f32 s0, s0, #1|ftosls s0, #1) +0[0-9a-f]+ <[^>]+> eebf 0aef (vcvt\.u32\.f32 s0, s0, #1|ftouls s0, #1) +0[0-9a-f]+ <[^>]+> eeba 0aef (vcvt\.f32\.s32 s0, s0, #1|fsltos s0, #1) +0[0-9a-f]+ <[^>]+> eebb 0aef (vcvt\.f32\.u32 s0, s0, #1|fultos s0, #1) +0[0-9a-f]+ <[^>]+> eebe 0bef (vcvt\.s32\.f64 d0, d0, #1|ftosld d0, #1) +0[0-9a-f]+ <[^>]+> eebf 0bef (vcvt\.u32\.f64 d0, d0, #1|ftould d0, #1) +0[0-9a-f]+ <[^>]+> eeba 0bef (vcvt\.f64\.s32 d0, d0, #1|fsltod d0, #1) +0[0-9a-f]+ <[^>]+> eebb 0bef (vcvt\.f64\.u32 d0, d0, #1|fultod d0, #1) +0[0-9a-f]+ <[^>]+> eeba 0a67 (vcvt\.f32\.s16 s0, s0, #1|fshtos s0, #1) +0[0-9a-f]+ <[^>]+> eebb 0a67 (vcvt\.f32\.u16 s0, s0, #1|fuhtos s0, #1) +0[0-9a-f]+ <[^>]+> eeba 0b67 (vcvt\.f64\.s16 d0, d0, #1|fshtod d0, #1) +0[0-9a-f]+ <[^>]+> eebb 0b67 (vcvt\.f64\.u16 d0, d0, #1|fuhtod d0, #1) +0[0-9a-f]+ <[^>]+> eebe 0a67 (vcvt\.s16\.f32 s0, s0, #1|ftoshs s0, #1) +0[0-9a-f]+ <[^>]+> eebf 0a67 (vcvt\.u16\.f32 s0, s0, #1|ftouhs s0, #1) +0[0-9a-f]+ <[^>]+> eebe 0b67 (vcvt\.s16\.f64 d0, d0, #1|ftoshd d0, #1) +0[0-9a-f]+ <[^>]+> eebf 0b67 (vcvt\.u16\.f64 d0, d0, #1|ftouhd d0, #1) 0[0-9a-f]+ <[^>]+> bf01 itttt eq -0[0-9a-f]+ <[^>]+> eebe 0aef ftoslseq s0, #1 -0[0-9a-f]+ <[^>]+> eebf 0aef ftoulseq s0, #1 -0[0-9a-f]+ <[^>]+> eeba 0aef fsltoseq s0, #1 -0[0-9a-f]+ <[^>]+> eebb 0aef fultoseq s0, #1 +0[0-9a-f]+ <[^>]+> eebe 0aef (vcvteq\.s32\.f32 s0, s0, #1|ftoslseq s0, #1) +0[0-9a-f]+ <[^>]+> eebf 0aef (vcvteq\.u32\.f32 s0, s0, #1|ftoulseq s0, #1) +0[0-9a-f]+ <[^>]+> eeba 0aef (vcvteq\.f32\.s32 s0, s0, #1|fsltoseq s0, #1) +0[0-9a-f]+ <[^>]+> eebb 0aef (vcvteq\.f32\.u32 s0, s0, #1|fultoseq s0, #1) 0[0-9a-f]+ <[^>]+> bf01 itttt eq -0[0-9a-f]+ <[^>]+> eebe 0bef ftosldeq d0, #1 -0[0-9a-f]+ <[^>]+> eebf 0bef ftouldeq d0, #1 -0[0-9a-f]+ <[^>]+> eeba 0bef fsltodeq d0, #1 -0[0-9a-f]+ <[^>]+> eebb 0bef fultodeq d0, #1 +0[0-9a-f]+ <[^>]+> eebe 0bef (vcvteq\.s32\.f64 d0, d0, #1|ftosldeq d0, #1) +0[0-9a-f]+ <[^>]+> eebf 0bef (vcvteq\.u32\.f64 d0, d0, #1|ftouldeq d0, #1) +0[0-9a-f]+ <[^>]+> eeba 0bef (vcvteq\.f64\.s32 d0, d0, #1|fsltodeq d0, #1) +0[0-9a-f]+ <[^>]+> eebb 0bef (vcvteq\.f64\.u32 d0, d0, #1|fultodeq d0, #1) 0[0-9a-f]+ <[^>]+> bf01 itttt eq -0[0-9a-f]+ <[^>]+> eeba 0a67 fshtoseq s0, #1 -0[0-9a-f]+ <[^>]+> eebb 0a67 fuhtoseq s0, #1 -0[0-9a-f]+ <[^>]+> eeba 0b67 fshtodeq d0, #1 -0[0-9a-f]+ <[^>]+> eebb 0b67 fuhtodeq d0, #1 +0[0-9a-f]+ <[^>]+> eeba 0a67 (vcvteq\.f32\.s16 s0, s0, #1|fshtoseq s0, #1) +0[0-9a-f]+ <[^>]+> eebb 0a67 (vcvteq\.f32\.u16 s0, s0, #1|fuhtoseq s0, #1) +0[0-9a-f]+ <[^>]+> eeba 0b67 (vcvteq\.f64\.s16 d0, d0, #1|fshtodeq d0, #1) +0[0-9a-f]+ <[^>]+> eebb 0b67 (vcvteq\.f64\.u16 d0, d0, #1|fuhtodeq d0, #1) 0[0-9a-f]+ <[^>]+> bf01 itttt eq -0[0-9a-f]+ <[^>]+> eebe 0a67 ftoshseq s0, #1 -0[0-9a-f]+ <[^>]+> eebf 0a67 ftouhseq s0, #1 -0[0-9a-f]+ <[^>]+> eebe 0b67 ftoshdeq d0, #1 -0[0-9a-f]+ <[^>]+> eebf 0b67 ftouhdeq d0, #1 -0[0-9a-f]+ <[^>]+> ecd0 1a04 fldmias r0, {s3-s6} -0[0-9a-f]+ <[^>]+> ecd0 1a04 fldmias r0, {s3-s6} -0[0-9a-f]+ <[^>]+> ecf0 1a04 fldmias r0!, {s3-s6} -0[0-9a-f]+ <[^>]+> ed70 1a04 fldmdbs r0!, {s3-s6} +0[0-9a-f]+ <[^>]+> eebe 0a67 (vcvteq\.s16\.f32 s0, s0, #1|ftoshseq s0, #1) +0[0-9a-f]+ <[^>]+> eebf 0a67 (vcvteq\.u16\.f32 s0, s0, #1|ftouhseq s0, #1) +0[0-9a-f]+ <[^>]+> eebe 0b67 (vcvteq\.s16\.f64 d0, d0, #1|ftoshdeq d0, #1) +0[0-9a-f]+ <[^>]+> eebf 0b67 (vcvteq\.u16\.f64 d0, d0, #1|ftouhdeq d0, #1) +0[0-9a-f]+ <[^>]+> ecd0 1a04 (vldmia|fldmias) r0, {s3-s6} +0[0-9a-f]+ <[^>]+> ecd0 1a04 (vldmia|fldmias) r0, {s3-s6} +0[0-9a-f]+ <[^>]+> ecf0 1a04 (vldmia|fldmias) r0!, {s3-s6} +0[0-9a-f]+ <[^>]+> ed70 1a04 (vldmdb|fldmdbs) r0!, {s3-s6} 0[0-9a-f]+ <[^>]+> ec90 3b08 vldmia r0, {d3-d6} 0[0-9a-f]+ <[^>]+> ec90 3b08 vldmia r0, {d3-d6} 0[0-9a-f]+ <[^>]+> ecb0 3b08 vldmia r0!, {d3-d6} 0[0-9a-f]+ <[^>]+> ed30 3b08 vldmdb r0!, {d3-d6} 0[0-9a-f]+ <[^>]+> bf01 itttt eq -0[0-9a-f]+ <[^>]+> ecd0 1a04 fldmiaseq r0, {s3-s6} -0[0-9a-f]+ <[^>]+> ecd0 1a04 fldmiaseq r0, {s3-s6} -0[0-9a-f]+ <[^>]+> ecf0 1a04 fldmiaseq r0!, {s3-s6} -0[0-9a-f]+ <[^>]+> ed70 1a04 fldmdbseq r0!, {s3-s6} +0[0-9a-f]+ <[^>]+> ecd0 1a04 (vldmiaeq|fldmiaseq) r0, {s3-s6} +0[0-9a-f]+ <[^>]+> ecd0 1a04 (vldmiaeq|fldmiaseq) r0, {s3-s6} +0[0-9a-f]+ <[^>]+> ecf0 1a04 (vldmiaeq|fldmiaseq) r0!, {s3-s6} +0[0-9a-f]+ <[^>]+> ed70 1a04 (vldmdbeq|fldmdbseq) r0!, {s3-s6} 0[0-9a-f]+ <[^>]+> bf01 itttt eq 0[0-9a-f]+ <[^>]+> ec90 3b08 vldmiaeq r0, {d3-d6} 0[0-9a-f]+ <[^>]+> ec90 3b08 vldmiaeq r0, {d3-d6} 0[0-9a-f]+ <[^>]+> ecb0 3b08 vldmiaeq r0!, {d3-d6} 0[0-9a-f]+ <[^>]+> ed30 3b08 vldmdbeq r0!, {d3-d6} -0[0-9a-f]+ <[^>]+> ecc0 1a04 fstmias r0, {s3-s6} -0[0-9a-f]+ <[^>]+> ecc0 1a04 fstmias r0, {s3-s6} -0[0-9a-f]+ <[^>]+> ece0 1a04 fstmias r0!, {s3-s6} -0[0-9a-f]+ <[^>]+> ed60 1a04 fstmdbs r0!, {s3-s6} +0[0-9a-f]+ <[^>]+> ecc0 1a04 (vstmia|fstmias) r0, {s3-s6} +0[0-9a-f]+ <[^>]+> ecc0 1a04 (vstmia|fstmias) r0, {s3-s6} +0[0-9a-f]+ <[^>]+> ece0 1a04 (vstmia|fstmias) r0!, {s3-s6} +0[0-9a-f]+ <[^>]+> ed60 1a04 (vstmdb|fstmdbs) r0!, {s3-s6} 0[0-9a-f]+ <[^>]+> ec80 3b08 vstmia r0, {d3-d6} 0[0-9a-f]+ <[^>]+> ec80 3b08 vstmia r0, {d3-d6} 0[0-9a-f]+ <[^>]+> eca0 3b08 vstmia r0!, {d3-d6} 0[0-9a-f]+ <[^>]+> ed20 3b08 vstmdb r0!, {d3-d6} 0[0-9a-f]+ <[^>]+> bf01 itttt eq -0[0-9a-f]+ <[^>]+> ecc0 1a04 fstmiaseq r0, {s3-s6} -0[0-9a-f]+ <[^>]+> ecc0 1a04 fstmiaseq r0, {s3-s6} -0[0-9a-f]+ <[^>]+> ece0 1a04 fstmiaseq r0!, {s3-s6} -0[0-9a-f]+ <[^>]+> ed60 1a04 fstmdbseq r0!, {s3-s6} +0[0-9a-f]+ <[^>]+> ecc0 1a04 (vstmiaeq|fstmiaseq) r0, {s3-s6} +0[0-9a-f]+ <[^>]+> ecc0 1a04 (vstmiaeq|fstmiaseq) r0, {s3-s6} +0[0-9a-f]+ <[^>]+> ece0 1a04 (vstmiaeq|fstmiaseq) r0!, {s3-s6} +0[0-9a-f]+ <[^>]+> ed60 1a04 (vstmdbeq|fstmdbseq) r0!, {s3-s6} 0[0-9a-f]+ <[^>]+> bf01 itttt eq 0[0-9a-f]+ <[^>]+> ec80 3b08 vstmiaeq r0, {d3-d6} 0[0-9a-f]+ <[^>]+> ec80 3b08 vstmiaeq r0, {d3-d6} 0[0-9a-f]+ <[^>]+> eca0 3b08 vstmiaeq r0!, {d3-d6} 0[0-9a-f]+ <[^>]+> ed20 3b08 vstmdbeq r0!, {d3-d6} -0[0-9a-f]+ <[^>]+> ed90 0a01 flds s0, \[r0, #4\] +0[0-9a-f]+ <[^>]+> ed90 0a01 (vldr|flds) s0, \[r0, #4\] 0[0-9a-f]+ <[^>]+> ed90 0b01 vldr d0, \[r0, #4\] 0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> ed90 0a01 fldseq s0, \[r0, #4\] +0[0-9a-f]+ <[^>]+> ed90 0a01 (vldreq|fldseq) s0, \[r0, #4\] 0[0-9a-f]+ <[^>]+> ed90 0b01 vldreq d0, \[r0, #4\] -0[0-9a-f]+ <[^>]+> ed80 0a01 fsts s0, \[r0, #4\] +0[0-9a-f]+ <[^>]+> ed80 0a01 (vstr|fsts) s0, \[r0, #4\] 0[0-9a-f]+ <[^>]+> ed80 0b01 vstr d0, \[r0, #4\] 0[0-9a-f]+ <[^>]+> bf04 itt eq -0[0-9a-f]+ <[^>]+> ed80 0a01 fstseq s0, \[r0, #4\] +0[0-9a-f]+ <[^>]+> ed80 0a01 (vstreq|fstseq) s0, \[r0, #4\] 0[0-9a-f]+ <[^>]+> ed80 0b01 vstreq d0, \[r0, #4\] diff --git a/gas/testsuite/gas/arm/vfp1.d b/gas/testsuite/gas/arm/vfp1.d index 3894909539b..d23fd8429be 100644 --- a/gas/testsuite/gas/arm/vfp1.d +++ b/gas/testsuite/gas/arm/vfp1.d @@ -7,23 +7,23 @@ .*: +file format .*arm.* Disassembly of section .text: -0+000 <[^>]*> eeb40bc0 fcmped d0, d0 -0+004 <[^>]*> eeb50bc0 fcmpezd d0 -0+008 <[^>]*> eeb40b40 fcmpd d0, d0 -0+00c <[^>]*> eeb50b40 fcmpzd d0 -0+010 <[^>]*> eeb00bc0 fabsd d0, d0 -0+014 <[^>]*> eeb00b40 fcpyd d0, d0 -0+018 <[^>]*> eeb10b40 fnegd d0, d0 -0+01c <[^>]*> eeb10bc0 fsqrtd d0, d0 -0+020 <[^>]*> ee300b00 faddd d0, d0, d0 -0+024 <[^>]*> ee800b00 fdivd d0, d0, d0 -0+028 <[^>]*> ee000b00 fmacd d0, d0, d0 -0+02c <[^>]*> ee100b00 fmscd d0, d0, d0 -0+030 <[^>]*> ee200b00 fmuld d0, d0, d0 -0+034 <[^>]*> ee000b40 fnmacd d0, d0, d0 -0+038 <[^>]*> ee100b40 fnmscd d0, d0, d0 -0+03c <[^>]*> ee200b40 fnmuld d0, d0, d0 -0+040 <[^>]*> ee300b40 fsubd d0, d0, d0 +0+000 <[^>]*> eeb40bc0 (vcmpe\.f64|fcmped) d0, d0 +0+004 <[^>]*> eeb50bc0 (vcmpe\.f64 d0, #0.0|fcmpezd d0) +0+008 <[^>]*> eeb40b40 (vcmp\.f64|fcmpd) d0, d0 +0+00c <[^>]*> eeb50b40 (vcmp\.f64 d0, #0.0|fcmpzd d0) +0+010 <[^>]*> eeb00bc0 (vabs\.f64|fabsd) d0, d0 +0+014 <[^>]*> eeb00b40 (vmov\.f64|fcpyd) d0, d0 +0+018 <[^>]*> eeb10b40 (vneg\.f64|fnegd) d0, d0 +0+01c <[^>]*> eeb10bc0 (vsqrt\.f64|fsqrtd) d0, d0 +0+020 <[^>]*> ee300b00 (vadd\.f64|faddd) d0, d0, d0 +0+024 <[^>]*> ee800b00 (vdiv\.f64|fdivd) d0, d0, d0 +0+028 <[^>]*> ee000b00 (vmla\.f64|fmacd) d0, d0, d0 +0+02c <[^>]*> ee100b00 (vnmls\.f64|fmscd) d0, d0, d0 +0+030 <[^>]*> ee200b00 (vmul\.f64|fmuld) d0, d0, d0 +0+034 <[^>]*> ee000b40 (vmls\.f64|fnmacd) d0, d0, d0 +0+038 <[^>]*> ee100b40 (vnmla\.f64|fnmscd) d0, d0, d0 +0+03c <[^>]*> ee200b40 (vnmul\.f64|fnmuld) d0, d0, d0 +0+040 <[^>]*> ee300b40 (vsub\.f64|fsubd) d0, d0, d0 0+044 <[^>]*> ed900b00 vldr d0, \[r0\] 0+048 <[^>]*> ed800b00 vstr d0, \[r0\] 0+04c <[^>]*> ec900b02 vldmia r0, {d0} @@ -38,57 +38,57 @@ Disassembly of section .text: 0+070 <[^>]*> eca00b02 vstmia r0!, {d0} 0+074 <[^>]*> ed200b02 vstmdb r0!, {d0} 0+078 <[^>]*> ed200b02 vstmdb r0!, {d0} -0+07c <[^>]*> eeb80bc0 fsitod d0, s0 -0+080 <[^>]*> eeb80b40 fuitod d0, s0 -0+084 <[^>]*> eebd0b40 ftosid s0, d0 -0+088 <[^>]*> eebd0bc0 ftosizd s0, d0 -0+08c <[^>]*> eebc0b40 ftouid s0, d0 -0+090 <[^>]*> eebc0bc0 ftouizd s0, d0 -0+094 <[^>]*> eeb70ac0 fcvtds d0, s0 -0+098 <[^>]*> eeb70bc0 fcvtsd s0, d0 +0+07c <[^>]*> eeb80bc0 (vcvt\.f64\.s32|fsitod) d0, s0 +0+080 <[^>]*> eeb80b40 (vcvt\.f64\.u32|fuitod) d0, s0 +0+084 <[^>]*> eebd0b40 (vcvtr\.s32\.f64|ftosid) s0, d0 +0+088 <[^>]*> eebd0bc0 (vcvt\.s32\.f64|ftosizd) s0, d0 +0+08c <[^>]*> eebc0b40 (vcvtr\.u32\.f64|ftouid) s0, d0 +0+090 <[^>]*> eebc0bc0 (vcvt\.u32\.f64|ftouizd) s0, d0 +0+094 <[^>]*> eeb70ac0 (vcvt\.f64\.f32|fcvtds) d0, s0 +0+098 <[^>]*> eeb70bc0 (vcvt\.f32\.f64|fcvtsd) s0, d0 0+09c <[^>]*> ee300b10 vmov\.32 r0, d0\[1\] 0+0a0 <[^>]*> ee100b10 vmov\.32 r0, d0\[0\] 0+0a4 <[^>]*> ee200b10 vmov\.32 d0\[1\], r0 0+0a8 <[^>]*> ee000b10 vmov\.32 d0\[0\], r0 -0+0ac <[^>]*> eeb51b40 fcmpzd d1 -0+0b0 <[^>]*> eeb52b40 fcmpzd d2 -0+0b4 <[^>]*> eeb5fb40 fcmpzd d15 -0+0b8 <[^>]*> eeb40b41 fcmpd d0, d1 -0+0bc <[^>]*> eeb40b42 fcmpd d0, d2 -0+0c0 <[^>]*> eeb40b4f fcmpd d0, d15 -0+0c4 <[^>]*> eeb41b40 fcmpd d1, d0 -0+0c8 <[^>]*> eeb42b40 fcmpd d2, d0 -0+0cc <[^>]*> eeb4fb40 fcmpd d15, d0 -0+0d0 <[^>]*> eeb45b4c fcmpd d5, d12 -0+0d4 <[^>]*> eeb10b41 fnegd d0, d1 -0+0d8 <[^>]*> eeb10b42 fnegd d0, d2 -0+0dc <[^>]*> eeb10b4f fnegd d0, d15 -0+0e0 <[^>]*> eeb11b40 fnegd d1, d0 -0+0e4 <[^>]*> eeb12b40 fnegd d2, d0 -0+0e8 <[^>]*> eeb1fb40 fnegd d15, d0 -0+0ec <[^>]*> eeb1cb45 fnegd d12, d5 -0+0f0 <[^>]*> ee300b01 faddd d0, d0, d1 -0+0f4 <[^>]*> ee300b02 faddd d0, d0, d2 -0+0f8 <[^>]*> ee300b0f faddd d0, d0, d15 -0+0fc <[^>]*> ee310b00 faddd d0, d1, d0 -0+100 <[^>]*> ee320b00 faddd d0, d2, d0 -0+104 <[^>]*> ee3f0b00 faddd d0, d15, d0 -0+108 <[^>]*> ee301b00 faddd d1, d0, d0 -0+10c <[^>]*> ee302b00 faddd d2, d0, d0 -0+110 <[^>]*> ee30fb00 faddd d15, d0, d0 -0+114 <[^>]*> ee39cb05 faddd d12, d9, d5 -0+118 <[^>]*> eeb70ae0 fcvtds d0, s1 -0+11c <[^>]*> eeb70ac1 fcvtds d0, s2 -0+120 <[^>]*> eeb70aef fcvtds d0, s31 -0+124 <[^>]*> eeb71ac0 fcvtds d1, s0 -0+128 <[^>]*> eeb72ac0 fcvtds d2, s0 -0+12c <[^>]*> eeb7fac0 fcvtds d15, s0 -0+130 <[^>]*> eef70bc0 fcvtsd s1, d0 -0+134 <[^>]*> eeb71bc0 fcvtsd s2, d0 -0+138 <[^>]*> eef7fbc0 fcvtsd s31, d0 -0+13c <[^>]*> eeb70bc1 fcvtsd s0, d1 -0+140 <[^>]*> eeb70bc2 fcvtsd s0, d2 -0+144 <[^>]*> eeb70bcf fcvtsd s0, d15 +0+0ac <[^>]*> eeb51b40 (vcmp\.f64 d1, #0.0|fcmpzd d1) +0+0b0 <[^>]*> eeb52b40 (vcmp\.f64 d2, #0.0|fcmpzd d2) +0+0b4 <[^>]*> eeb5fb40 (vcmp\.f64 d15, #0.0|fcmpzd d15) +0+0b8 <[^>]*> eeb40b41 (vcmp\.f64|fcmpd) d0, d1 +0+0bc <[^>]*> eeb40b42 (vcmp\.f64|fcmpd) d0, d2 +0+0c0 <[^>]*> eeb40b4f (vcmp\.f64|fcmpd) d0, d15 +0+0c4 <[^>]*> eeb41b40 (vcmp\.f64|fcmpd) d1, d0 +0+0c8 <[^>]*> eeb42b40 (vcmp\.f64|fcmpd) d2, d0 +0+0cc <[^>]*> eeb4fb40 (vcmp\.f64|fcmpd) d15, d0 +0+0d0 <[^>]*> eeb45b4c (vcmp\.f64|fcmpd) d5, d12 +0+0d4 <[^>]*> eeb10b41 (vneg\.f64|fnegd) d0, d1 +0+0d8 <[^>]*> eeb10b42 (vneg\.f64|fnegd) d0, d2 +0+0dc <[^>]*> eeb10b4f (vneg\.f64|fnegd) d0, d15 +0+0e0 <[^>]*> eeb11b40 (vneg\.f64|fnegd) d1, d0 +0+0e4 <[^>]*> eeb12b40 (vneg\.f64|fnegd) d2, d0 +0+0e8 <[^>]*> eeb1fb40 (vneg\.f64|fnegd) d15, d0 +0+0ec <[^>]*> eeb1cb45 (vneg\.f64|fnegd) d12, d5 +0+0f0 <[^>]*> ee300b01 (vadd\.f64|faddd) d0, d0, d1 +0+0f4 <[^>]*> ee300b02 (vadd\.f64|faddd) d0, d0, d2 +0+0f8 <[^>]*> ee300b0f (vadd\.f64|faddd) d0, d0, d15 +0+0fc <[^>]*> ee310b00 (vadd\.f64|faddd) d0, d1, d0 +0+100 <[^>]*> ee320b00 (vadd\.f64|faddd) d0, d2, d0 +0+104 <[^>]*> ee3f0b00 (vadd\.f64|faddd) d0, d15, d0 +0+108 <[^>]*> ee301b00 (vadd\.f64|faddd) d1, d0, d0 +0+10c <[^>]*> ee302b00 (vadd\.f64|faddd) d2, d0, d0 +0+110 <[^>]*> ee30fb00 (vadd\.f64|faddd) d15, d0, d0 +0+114 <[^>]*> ee39cb05 (vadd\.f64|faddd) d12, d9, d5 +0+118 <[^>]*> eeb70ae0 (vcvt\.f64\.f32|fcvtds) d0, s1 +0+11c <[^>]*> eeb70ac1 (vcvt\.f64\.f32|fcvtds) d0, s2 +0+120 <[^>]*> eeb70aef (vcvt\.f64\.f32|fcvtds) d0, s31 +0+124 <[^>]*> eeb71ac0 (vcvt\.f64\.f32|fcvtds) d1, s0 +0+128 <[^>]*> eeb72ac0 (vcvt\.f64\.f32|fcvtds) d2, s0 +0+12c <[^>]*> eeb7fac0 (vcvt\.f64\.f32|fcvtds) d15, s0 +0+130 <[^>]*> eef70bc0 (vcvt\.f32\.f64|fcvtsd) s1, d0 +0+134 <[^>]*> eeb71bc0 (vcvt\.f32\.f64|fcvtsd) s2, d0 +0+138 <[^>]*> eef7fbc0 (vcvt\.f32\.f64|fcvtsd) s31, d0 +0+13c <[^>]*> eeb70bc1 (vcvt\.f32\.f64|fcvtsd) s0, d1 +0+140 <[^>]*> eeb70bc2 (vcvt\.f32\.f64|fcvtsd) s0, d2 +0+144 <[^>]*> eeb70bcf (vcvt\.f32\.f64|fcvtsd) s0, d15 0+148 <[^>]*> ee301b10 vmov\.32 r1, d0\[1\] 0+14c <[^>]*> ee30eb10 vmov\.32 lr, d0\[1\] 0+150 <[^>]*> ee310b10 vmov\.32 r0, d1\[1\] @@ -129,39 +129,39 @@ Disassembly of section .text: 0+1dc <[^>]*> ec90eb04 vldmia r0, {d14-d15} 0+1e0 <[^>]*> ec910b02 vldmia r1, {d0} 0+1e4 <[^>]*> ec9e0b02 vldmia lr, {d0} -0+1e8 <[^>]*> eeb50b40 fcmpzd d0 -0+1ec <[^>]*> eeb51b40 fcmpzd d1 -0+1f0 <[^>]*> eeb52b40 fcmpzd d2 -0+1f4 <[^>]*> eeb53b40 fcmpzd d3 -0+1f8 <[^>]*> eeb54b40 fcmpzd d4 -0+1fc <[^>]*> eeb55b40 fcmpzd d5 -0+200 <[^>]*> eeb56b40 fcmpzd d6 -0+204 <[^>]*> eeb57b40 fcmpzd d7 -0+208 <[^>]*> eeb58b40 fcmpzd d8 -0+20c <[^>]*> eeb59b40 fcmpzd d9 -0+210 <[^>]*> eeb5ab40 fcmpzd d10 -0+214 <[^>]*> eeb5bb40 fcmpzd d11 -0+218 <[^>]*> eeb5cb40 fcmpzd d12 -0+21c <[^>]*> eeb5db40 fcmpzd d13 -0+220 <[^>]*> eeb5eb40 fcmpzd d14 -0+224 <[^>]*> eeb5fb40 fcmpzd d15 -0+228 <[^>]*> 0eb41bcf fcmpedeq d1, d15 -0+22c <[^>]*> 0eb52bc0 fcmpezdeq d2 -0+230 <[^>]*> 0eb43b4e fcmpdeq d3, d14 -0+234 <[^>]*> 0eb54b40 fcmpzdeq d4 -0+238 <[^>]*> 0eb05bcd fabsdeq d5, d13 -0+23c <[^>]*> 0eb06b4c fcpydeq d6, d12 -0+240 <[^>]*> 0eb17b4b fnegdeq d7, d11 -0+244 <[^>]*> 0eb18bca fsqrtdeq d8, d10 -0+248 <[^>]*> 0e319b0f fadddeq d9, d1, d15 -0+24c <[^>]*> 0e832b0e fdivdeq d2, d3, d14 -0+250 <[^>]*> 0e0d4b0c fmacdeq d4, d13, d12 -0+254 <[^>]*> 0e165b0b fmscdeq d5, d6, d11 -0+258 <[^>]*> 0e2a7b09 fmuldeq d7, d10, d9 -0+25c <[^>]*> 0e098b4a fnmacdeq d8, d9, d10 -0+260 <[^>]*> 0e167b4b fnmscdeq d7, d6, d11 -0+264 <[^>]*> 0e245b4c fnmuldeq d5, d4, d12 -0+268 <[^>]*> 0e3d3b4e fsubdeq d3, d13, d14 +0+1e8 <[^>]*> eeb50b40 (vcmp\.f64 d0, #0.0|fcmpzd d0) +0+1ec <[^>]*> eeb51b40 (vcmp\.f64 d1, #0.0|fcmpzd d1) +0+1f0 <[^>]*> eeb52b40 (vcmp\.f64 d2, #0.0|fcmpzd d2) +0+1f4 <[^>]*> eeb53b40 (vcmp\.f64 d3, #0.0|fcmpzd d3) +0+1f8 <[^>]*> eeb54b40 (vcmp\.f64 d4, #0.0|fcmpzd d4) +0+1fc <[^>]*> eeb55b40 (vcmp\.f64 d5, #0.0|fcmpzd d5) +0+200 <[^>]*> eeb56b40 (vcmp\.f64 d6, #0.0|fcmpzd d6) +0+204 <[^>]*> eeb57b40 (vcmp\.f64 d7, #0.0|fcmpzd d7) +0+208 <[^>]*> eeb58b40 (vcmp\.f64 d8, #0.0|fcmpzd d8) +0+20c <[^>]*> eeb59b40 (vcmp\.f64 d9, #0.0|fcmpzd d9) +0+210 <[^>]*> eeb5ab40 (vcmp\.f64 d10, #0.0|fcmpzd d10) +0+214 <[^>]*> eeb5bb40 (vcmp\.f64 d11, #0.0|fcmpzd d11) +0+218 <[^>]*> eeb5cb40 (vcmp\.f64 d12, #0.0|fcmpzd d12) +0+21c <[^>]*> eeb5db40 (vcmp\.f64 d13, #0.0|fcmpzd d13) +0+220 <[^>]*> eeb5eb40 (vcmp\.f64 d14, #0.0|fcmpzd d14) +0+224 <[^>]*> eeb5fb40 (vcmp\.f64 d15, #0.0|fcmpzd d15) +0+228 <[^>]*> 0eb41bcf (vcmpeeq\.f64|fcmpedeq) d1, d15 +0+22c <[^>]*> 0eb52bc0 (vcmpeeq\.f64 d2, #0.0|fcmpezdeq d2) +0+230 <[^>]*> 0eb43b4e (vcmpeq\.f64|fcmpdeq) d3, d14 +0+234 <[^>]*> 0eb54b40 (vcmpeq\.f64 d4, #0.0|fcmpzdeq d4) +0+238 <[^>]*> 0eb05bcd (vabseq\.f64|fabsdeq) d5, d13 +0+23c <[^>]*> 0eb06b4c (vmoveq\.f64|fcpydeq) d6, d12 +0+240 <[^>]*> 0eb17b4b (vnegeq\.f64|fnegdeq) d7, d11 +0+244 <[^>]*> 0eb18bca (vsqrteq\.f64|fsqrtdeq) d8, d10 +0+248 <[^>]*> 0e319b0f (vaddeq\.f64|fadddeq) d9, d1, d15 +0+24c <[^>]*> 0e832b0e (vdiveq\.f64|fdivdeq) d2, d3, d14 +0+250 <[^>]*> 0e0d4b0c (vmlaeq\.f64|fmacdeq) d4, d13, d12 +0+254 <[^>]*> 0e165b0b (vnmlseq\.f64|fmscdeq) d5, d6, d11 +0+258 <[^>]*> 0e2a7b09 (vmuleq\.f64|fmuldeq) d7, d10, d9 +0+25c <[^>]*> 0e098b4a (vmlseq\.f64|fnmacdeq) d8, d9, d10 +0+260 <[^>]*> 0e167b4b (vnmlaeq\.f64|fnmscdeq) d7, d6, d11 +0+264 <[^>]*> 0e245b4c (vnmuleq\.f64|fnmuldeq) d5, d4, d12 +0+268 <[^>]*> 0e3d3b4e (vsubeq\.f64|fsubdeq) d3, d13, d14 0+26c <[^>]*> 0d952b00 vldreq d2, \[r5\] 0+270 <[^>]*> 0d8c1b00 vstreq d1, \[ip\] 0+274 <[^>]*> 0c911b02 vldmiaeq r1, {d1} @@ -176,14 +176,14 @@ Disassembly of section .text: 0+298 <[^>]*> 0caacb02 vstmiaeq sl!, {d12} 0+29c <[^>]*> 0d2bbb02 vstmdbeq fp!, {d11} 0+2a0 <[^>]*> 0d2cab02 vstmdbeq ip!, {d10} -0+2a4 <[^>]*> 0eb8fbe0 fsitodeq d15, s1 -0+2a8 <[^>]*> 0eb81b6f fuitodeq d1, s31 -0+2ac <[^>]*> 0efd0b4f ftosideq s1, d15 -0+2b0 <[^>]*> 0efdfbc2 ftosizdeq s31, d2 -0+2b4 <[^>]*> 0efc7b42 ftouideq s15, d2 -0+2b8 <[^>]*> 0efc5bc3 ftouizdeq s11, d3 -0+2bc <[^>]*> 0eb71ac5 fcvtdseq d1, s10 -0+2c0 <[^>]*> 0ef75bc1 fcvtsdeq s11, d1 +0+2a4 <[^>]*> 0eb8fbe0 (vcvteq\.f64\.s32|fsitodeq) d15, s1 +0+2a8 <[^>]*> 0eb81b6f (vcvteq\.f64\.u32|fuitodeq) d1, s31 +0+2ac <[^>]*> 0efd0b4f (vcvtreq\.s32\.f64|ftosideq) s1, d15 +0+2b0 <[^>]*> 0efdfbc2 (vcvteq\.s32\.f64|ftosizdeq) s31, d2 +0+2b4 <[^>]*> 0efc7b42 (vcvtreq\.u32\.f64|ftouideq) s15, d2 +0+2b8 <[^>]*> 0efc5bc3 (vcvteq\.u32\.f64|ftouizdeq) s11, d3 +0+2bc <[^>]*> 0eb71ac5 (vcvteq\.f64\.f32|fcvtdseq) d1, s10 +0+2c0 <[^>]*> 0ef75bc1 (vcvteq\.f32\.f64|fcvtsdeq) s11, d1 0+2c4 <[^>]*> 0e318b10 vmoveq\.32 r8, d1\[1\] 0+2c8 <[^>]*> 0e1f7b10 vmoveq\.32 r7, d15\[0\] 0+2cc <[^>]*> 0e21fb10 vmoveq\.32 d1\[1\], pc diff --git a/gas/testsuite/gas/arm/vfp1_t2.d b/gas/testsuite/gas/arm/vfp1_t2.d index 3bf1f9a9d74..8b3fbc323e1 100644 --- a/gas/testsuite/gas/arm/vfp1_t2.d +++ b/gas/testsuite/gas/arm/vfp1_t2.d @@ -7,23 +7,23 @@ .*: +file format .*arm.* Disassembly of section .text: -0+000 <[^>]*> eeb4 0bc0 fcmped d0, d0 -0+004 <[^>]*> eeb5 0bc0 fcmpezd d0 -0+008 <[^>]*> eeb4 0b40 fcmpd d0, d0 -0+00c <[^>]*> eeb5 0b40 fcmpzd d0 -0+010 <[^>]*> eeb0 0bc0 fabsd d0, d0 -0+014 <[^>]*> eeb0 0b40 fcpyd d0, d0 -0+018 <[^>]*> eeb1 0b40 fnegd d0, d0 -0+01c <[^>]*> eeb1 0bc0 fsqrtd d0, d0 -0+020 <[^>]*> ee30 0b00 faddd d0, d0, d0 -0+024 <[^>]*> ee80 0b00 fdivd d0, d0, d0 -0+028 <[^>]*> ee00 0b00 fmacd d0, d0, d0 -0+02c <[^>]*> ee10 0b00 fmscd d0, d0, d0 -0+030 <[^>]*> ee20 0b00 fmuld d0, d0, d0 -0+034 <[^>]*> ee00 0b40 fnmacd d0, d0, d0 -0+038 <[^>]*> ee10 0b40 fnmscd d0, d0, d0 -0+03c <[^>]*> ee20 0b40 fnmuld d0, d0, d0 -0+040 <[^>]*> ee30 0b40 fsubd d0, d0, d0 +0+000 <[^>]*> eeb4 0bc0 (vcmpe\.f64|fcmped) d0, d0 +0+004 <[^>]*> eeb5 0bc0 (vcmpe\.f64 d0, #0.0|fcmpezd d0) +0+008 <[^>]*> eeb4 0b40 (vcmp\.f64|fcmpd) d0, d0 +0+00c <[^>]*> eeb5 0b40 (vcmp\.f64 d0, #0.0|fcmpzd d0) +0+010 <[^>]*> eeb0 0bc0 (vabs\.f64|fabsd) d0, d0 +0+014 <[^>]*> eeb0 0b40 (vmov\.f64|fcpyd) d0, d0 +0+018 <[^>]*> eeb1 0b40 (vneg\.f64|fnegd) d0, d0 +0+01c <[^>]*> eeb1 0bc0 (vsqrt\.f64|fsqrtd) d0, d0 +0+020 <[^>]*> ee30 0b00 (vadd\.f64|faddd) d0, d0, d0 +0+024 <[^>]*> ee80 0b00 (vdiv\.f64|fdivd) d0, d0, d0 +0+028 <[^>]*> ee00 0b00 (vmla\.f64|fmacd) d0, d0, d0 +0+02c <[^>]*> ee10 0b00 (vnmls\.f64|fmscd) d0, d0, d0 +0+030 <[^>]*> ee20 0b00 (vmul\.f64|fmuld) d0, d0, d0 +0+034 <[^>]*> ee00 0b40 (vmls\.f64|fnmacd) d0, d0, d0 +0+038 <[^>]*> ee10 0b40 (vnmla\.f64|fnmscd) d0, d0, d0 +0+03c <[^>]*> ee20 0b40 (vnmul\.f64|fnmuld) d0, d0, d0 +0+040 <[^>]*> ee30 0b40 (vsub\.f64|fsubd) d0, d0, d0 0+044 <[^>]*> ed90 0b00 vldr d0, \[r0\] 0+048 <[^>]*> ed80 0b00 vstr d0, \[r0\] 0+04c <[^>]*> ec90 0b02 vldmia r0, {d0} @@ -38,57 +38,57 @@ Disassembly of section .text: 0+070 <[^>]*> eca0 0b02 vstmia r0!, {d0} 0+074 <[^>]*> ed20 0b02 vstmdb r0!, {d0} 0+078 <[^>]*> ed20 0b02 vstmdb r0!, {d0} -0+07c <[^>]*> eeb8 0bc0 fsitod d0, s0 -0+080 <[^>]*> eeb8 0b40 fuitod d0, s0 -0+084 <[^>]*> eebd 0b40 ftosid s0, d0 -0+088 <[^>]*> eebd 0bc0 ftosizd s0, d0 -0+08c <[^>]*> eebc 0b40 ftouid s0, d0 -0+090 <[^>]*> eebc 0bc0 ftouizd s0, d0 -0+094 <[^>]*> eeb7 0ac0 fcvtds d0, s0 -0+098 <[^>]*> eeb7 0bc0 fcvtsd s0, d0 +0+07c <[^>]*> eeb8 0bc0 (vcvt\.f64\.s32|fsitod) d0, s0 +0+080 <[^>]*> eeb8 0b40 (vcvt\.f64\.u32|fuitod) d0, s0 +0+084 <[^>]*> eebd 0b40 (vcvtr\.s32\.f64|ftosid) s0, d0 +0+088 <[^>]*> eebd 0bc0 (vcvt\.s32\.f64|ftosizd) s0, d0 +0+08c <[^>]*> eebc 0b40 (vcvtr\.u32\.f64|ftouid) s0, d0 +0+090 <[^>]*> eebc 0bc0 (vcvt\.u32\.f64|ftouizd) s0, d0 +0+094 <[^>]*> eeb7 0ac0 (vcvt\.f64\.f32|fcvtds) d0, s0 +0+098 <[^>]*> eeb7 0bc0 (vcvt\.f32\.f64|fcvtsd) s0, d0 0+09c <[^>]*> ee30 0b10 vmov\.32 r0, d0\[1\] 0+0a0 <[^>]*> ee10 0b10 vmov\.32 r0, d0\[0\] 0+0a4 <[^>]*> ee20 0b10 vmov\.32 d0\[1\], r0 0+0a8 <[^>]*> ee00 0b10 vmov\.32 d0\[0\], r0 -0+0ac <[^>]*> eeb5 1b40 fcmpzd d1 -0+0b0 <[^>]*> eeb5 2b40 fcmpzd d2 -0+0b4 <[^>]*> eeb5 fb40 fcmpzd d15 -0+0b8 <[^>]*> eeb4 0b41 fcmpd d0, d1 -0+0bc <[^>]*> eeb4 0b42 fcmpd d0, d2 -0+0c0 <[^>]*> eeb4 0b4f fcmpd d0, d15 -0+0c4 <[^>]*> eeb4 1b40 fcmpd d1, d0 -0+0c8 <[^>]*> eeb4 2b40 fcmpd d2, d0 -0+0cc <[^>]*> eeb4 fb40 fcmpd d15, d0 -0+0d0 <[^>]*> eeb4 5b4c fcmpd d5, d12 -0+0d4 <[^>]*> eeb1 0b41 fnegd d0, d1 -0+0d8 <[^>]*> eeb1 0b42 fnegd d0, d2 -0+0dc <[^>]*> eeb1 0b4f fnegd d0, d15 -0+0e0 <[^>]*> eeb1 1b40 fnegd d1, d0 -0+0e4 <[^>]*> eeb1 2b40 fnegd d2, d0 -0+0e8 <[^>]*> eeb1 fb40 fnegd d15, d0 -0+0ec <[^>]*> eeb1 cb45 fnegd d12, d5 -0+0f0 <[^>]*> ee30 0b01 faddd d0, d0, d1 -0+0f4 <[^>]*> ee30 0b02 faddd d0, d0, d2 -0+0f8 <[^>]*> ee30 0b0f faddd d0, d0, d15 -0+0fc <[^>]*> ee31 0b00 faddd d0, d1, d0 -0+100 <[^>]*> ee32 0b00 faddd d0, d2, d0 -0+104 <[^>]*> ee3f 0b00 faddd d0, d15, d0 -0+108 <[^>]*> ee30 1b00 faddd d1, d0, d0 -0+10c <[^>]*> ee30 2b00 faddd d2, d0, d0 -0+110 <[^>]*> ee30 fb00 faddd d15, d0, d0 -0+114 <[^>]*> ee39 cb05 faddd d12, d9, d5 -0+118 <[^>]*> eeb7 0ae0 fcvtds d0, s1 -0+11c <[^>]*> eeb7 0ac1 fcvtds d0, s2 -0+120 <[^>]*> eeb7 0aef fcvtds d0, s31 -0+124 <[^>]*> eeb7 1ac0 fcvtds d1, s0 -0+128 <[^>]*> eeb7 2ac0 fcvtds d2, s0 -0+12c <[^>]*> eeb7 fac0 fcvtds d15, s0 -0+130 <[^>]*> eef7 0bc0 fcvtsd s1, d0 -0+134 <[^>]*> eeb7 1bc0 fcvtsd s2, d0 -0+138 <[^>]*> eef7 fbc0 fcvtsd s31, d0 -0+13c <[^>]*> eeb7 0bc1 fcvtsd s0, d1 -0+140 <[^>]*> eeb7 0bc2 fcvtsd s0, d2 -0+144 <[^>]*> eeb7 0bcf fcvtsd s0, d15 +0+0ac <[^>]*> eeb5 1b40 (vcmp\.f64 d1, #0.0|fcmpzd d1) +0+0b0 <[^>]*> eeb5 2b40 (vcmp\.f64 d2, #0.0|fcmpzd d2) +0+0b4 <[^>]*> eeb5 fb40 (vcmp\.f64 d15, #0.0|fcmpzd d15) +0+0b8 <[^>]*> eeb4 0b41 (vcmp\.f64|fcmpd) d0, d1 +0+0bc <[^>]*> eeb4 0b42 (vcmp\.f64|fcmpd) d0, d2 +0+0c0 <[^>]*> eeb4 0b4f (vcmp\.f64|fcmpd) d0, d15 +0+0c4 <[^>]*> eeb4 1b40 (vcmp\.f64|fcmpd) d1, d0 +0+0c8 <[^>]*> eeb4 2b40 (vcmp\.f64|fcmpd) d2, d0 +0+0cc <[^>]*> eeb4 fb40 (vcmp\.f64|fcmpd) d15, d0 +0+0d0 <[^>]*> eeb4 5b4c (vcmp\.f64|fcmpd) d5, d12 +0+0d4 <[^>]*> eeb1 0b41 (vneg\.f64|fnegd) d0, d1 +0+0d8 <[^>]*> eeb1 0b42 (vneg\.f64|fnegd) d0, d2 +0+0dc <[^>]*> eeb1 0b4f (vneg\.f64|fnegd) d0, d15 +0+0e0 <[^>]*> eeb1 1b40 (vneg\.f64|fnegd) d1, d0 +0+0e4 <[^>]*> eeb1 2b40 (vneg\.f64|fnegd) d2, d0 +0+0e8 <[^>]*> eeb1 fb40 (vneg\.f64|fnegd) d15, d0 +0+0ec <[^>]*> eeb1 cb45 (vneg\.f64|fnegd) d12, d5 +0+0f0 <[^>]*> ee30 0b01 (vadd\.f64|faddd) d0, d0, d1 +0+0f4 <[^>]*> ee30 0b02 (vadd\.f64|faddd) d0, d0, d2 +0+0f8 <[^>]*> ee30 0b0f (vadd\.f64|faddd) d0, d0, d15 +0+0fc <[^>]*> ee31 0b00 (vadd\.f64|faddd) d0, d1, d0 +0+100 <[^>]*> ee32 0b00 (vadd\.f64|faddd) d0, d2, d0 +0+104 <[^>]*> ee3f 0b00 (vadd\.f64|faddd) d0, d15, d0 +0+108 <[^>]*> ee30 1b00 (vadd\.f64|faddd) d1, d0, d0 +0+10c <[^>]*> ee30 2b00 (vadd\.f64|faddd) d2, d0, d0 +0+110 <[^>]*> ee30 fb00 (vadd\.f64|faddd) d15, d0, d0 +0+114 <[^>]*> ee39 cb05 (vadd\.f64|faddd) d12, d9, d5 +0+118 <[^>]*> eeb7 0ae0 (vcvt\.f64\.f32|fcvtds) d0, s1 +0+11c <[^>]*> eeb7 0ac1 (vcvt\.f64\.f32|fcvtds) d0, s2 +0+120 <[^>]*> eeb7 0aef (vcvt\.f64\.f32|fcvtds) d0, s31 +0+124 <[^>]*> eeb7 1ac0 (vcvt\.f64\.f32|fcvtds) d1, s0 +0+128 <[^>]*> eeb7 2ac0 (vcvt\.f64\.f32|fcvtds) d2, s0 +0+12c <[^>]*> eeb7 fac0 (vcvt\.f64\.f32|fcvtds) d15, s0 +0+130 <[^>]*> eef7 0bc0 (vcvt\.f32\.f64|fcvtsd) s1, d0 +0+134 <[^>]*> eeb7 1bc0 (vcvt\.f32\.f64|fcvtsd) s2, d0 +0+138 <[^>]*> eef7 fbc0 (vcvt\.f32\.f64|fcvtsd) s31, d0 +0+13c <[^>]*> eeb7 0bc1 (vcvt\.f32\.f64|fcvtsd) s0, d1 +0+140 <[^>]*> eeb7 0bc2 (vcvt\.f32\.f64|fcvtsd) s0, d2 +0+144 <[^>]*> eeb7 0bcf (vcvt\.f32\.f64|fcvtsd) s0, d15 0+148 <[^>]*> ee30 1b10 vmov\.32 r1, d0\[1\] 0+14c <[^>]*> ee30 eb10 vmov\.32 lr, d0\[1\] 0+150 <[^>]*> ee31 0b10 vmov\.32 r0, d1\[1\] @@ -129,44 +129,44 @@ Disassembly of section .text: 0+1dc <[^>]*> ec90 eb04 vldmia r0, {d14-d15} 0+1e0 <[^>]*> ec91 0b02 vldmia r1, {d0} 0+1e4 <[^>]*> ec9e 0b02 vldmia lr, {d0} -0+1e8 <[^>]*> eeb5 0b40 fcmpzd d0 -0+1ec <[^>]*> eeb5 1b40 fcmpzd d1 -0+1f0 <[^>]*> eeb5 2b40 fcmpzd d2 -0+1f4 <[^>]*> eeb5 3b40 fcmpzd d3 -0+1f8 <[^>]*> eeb5 4b40 fcmpzd d4 -0+1fc <[^>]*> eeb5 5b40 fcmpzd d5 -0+200 <[^>]*> eeb5 6b40 fcmpzd d6 -0+204 <[^>]*> eeb5 7b40 fcmpzd d7 -0+208 <[^>]*> eeb5 8b40 fcmpzd d8 -0+20c <[^>]*> eeb5 9b40 fcmpzd d9 -0+210 <[^>]*> eeb5 ab40 fcmpzd d10 -0+214 <[^>]*> eeb5 bb40 fcmpzd d11 -0+218 <[^>]*> eeb5 cb40 fcmpzd d12 -0+21c <[^>]*> eeb5 db40 fcmpzd d13 -0+220 <[^>]*> eeb5 eb40 fcmpzd d14 -0+224 <[^>]*> eeb5 fb40 fcmpzd d15 +0+1e8 <[^>]*> eeb5 0b40 (vcmp\.f64 d0, #0.0|fcmpzd d0) +0+1ec <[^>]*> eeb5 1b40 (vcmp\.f64 d1, #0.0|fcmpzd d1) +0+1f0 <[^>]*> eeb5 2b40 (vcmp\.f64 d2, #0.0|fcmpzd d2) +0+1f4 <[^>]*> eeb5 3b40 (vcmp\.f64 d3, #0.0|fcmpzd d3) +0+1f8 <[^>]*> eeb5 4b40 (vcmp\.f64 d4, #0.0|fcmpzd d4) +0+1fc <[^>]*> eeb5 5b40 (vcmp\.f64 d5, #0.0|fcmpzd d5) +0+200 <[^>]*> eeb5 6b40 (vcmp\.f64 d6, #0.0|fcmpzd d6) +0+204 <[^>]*> eeb5 7b40 (vcmp\.f64 d7, #0.0|fcmpzd d7) +0+208 <[^>]*> eeb5 8b40 (vcmp\.f64 d8, #0.0|fcmpzd d8) +0+20c <[^>]*> eeb5 9b40 (vcmp\.f64 d9, #0.0|fcmpzd d9) +0+210 <[^>]*> eeb5 ab40 (vcmp\.f64 d10, #0.0|fcmpzd d10) +0+214 <[^>]*> eeb5 bb40 (vcmp\.f64 d11, #0.0|fcmpzd d11) +0+218 <[^>]*> eeb5 cb40 (vcmp\.f64 d12, #0.0|fcmpzd d12) +0+21c <[^>]*> eeb5 db40 (vcmp\.f64 d13, #0.0|fcmpzd d13) +0+220 <[^>]*> eeb5 eb40 (vcmp\.f64 d14, #0.0|fcmpzd d14) +0+224 <[^>]*> eeb5 fb40 (vcmp\.f64 d15, #0.0|fcmpzd d15) 0+228 <[^>]*> bf01 itttt eq -0+22a <[^>]*> eeb4 1bcf fcmpedeq d1, d15 -0+22e <[^>]*> eeb5 2bc0 fcmpezdeq d2 -0+232 <[^>]*> eeb4 3b4e fcmpdeq d3, d14 -0+236 <[^>]*> eeb5 4b40 fcmpzdeq d4 +0+22a <[^>]*> eeb4 1bcf (vcmpeeq\.f64|fcmpedeq) d1, d15 +0+22e <[^>]*> eeb5 2bc0 (vcmpeeq\.f64 d2, #0.0|fcmpezdeq d2) +0+232 <[^>]*> eeb4 3b4e (vcmpeq\.f64|fcmpdeq) d3, d14 +0+236 <[^>]*> eeb5 4b40 (vcmpeq\.f64 d4, #0.0|fcmpzdeq d4) 0+23a <[^>]*> bf01 itttt eq -0+23c <[^>]*> eeb0 5bcd fabsdeq d5, d13 -0+240 <[^>]*> eeb0 6b4c fcpydeq d6, d12 -0+244 <[^>]*> eeb1 7b4b fnegdeq d7, d11 -0+248 <[^>]*> eeb1 8bca fsqrtdeq d8, d10 +0+23c <[^>]*> eeb0 5bcd (vabseq\.f64|fabsdeq) d5, d13 +0+240 <[^>]*> eeb0 6b4c (vmoveq\.f64|fcpydeq) d6, d12 +0+244 <[^>]*> eeb1 7b4b (vnegeq\.f64|fnegdeq) d7, d11 +0+248 <[^>]*> eeb1 8bca (vsqrteq\.f64|fsqrtdeq) d8, d10 0+24c <[^>]*> bf01 itttt eq -0+24e <[^>]*> ee31 9b0f fadddeq d9, d1, d15 -0+252 <[^>]*> ee83 2b0e fdivdeq d2, d3, d14 -0+256 <[^>]*> ee0d 4b0c fmacdeq d4, d13, d12 -0+25a <[^>]*> ee16 5b0b fmscdeq d5, d6, d11 +0+24e <[^>]*> ee31 9b0f (vaddeq\.f64|fadddeq) d9, d1, d15 +0+252 <[^>]*> ee83 2b0e (vdiveq\.f64|fdivdeq) d2, d3, d14 +0+256 <[^>]*> ee0d 4b0c (vmlaeq\.f64|fmacdeq) d4, d13, d12 +0+25a <[^>]*> ee16 5b0b (vnmlseq\.f64|fmscdeq) d5, d6, d11 0+25e <[^>]*> bf01 itttt eq -0+260 <[^>]*> ee2a 7b09 fmuldeq d7, d10, d9 -0+264 <[^>]*> ee09 8b4a fnmacdeq d8, d9, d10 -0+268 <[^>]*> ee16 7b4b fnmscdeq d7, d6, d11 -0+26c <[^>]*> ee24 5b4c fnmuldeq d5, d4, d12 +0+260 <[^>]*> ee2a 7b09 (vmuleq\.f64|fmuldeq) d7, d10, d9 +0+264 <[^>]*> ee09 8b4a (vmlseq\.f64|fnmacdeq) d8, d9, d10 +0+268 <[^>]*> ee16 7b4b (vnmlaeq\.f64|fnmscdeq) d7, d6, d11 +0+26c <[^>]*> ee24 5b4c (vnmuleq\.f64|fnmuldeq) d5, d4, d12 0+270 <[^>]*> bf02 ittt eq -0+272 <[^>]*> ee3d 3b4e fsubdeq d3, d13, d14 +0+272 <[^>]*> ee3d 3b4e (vsubeq\.f64|fsubdeq) d3, d13, d14 0+276 <[^>]*> ed95 2b00 vldreq d2, \[r5\] 0+27a <[^>]*> ed8c 1b00 vstreq d1, \[ip\] 0+27e <[^>]*> bf01 itttt eq @@ -185,15 +185,15 @@ Disassembly of section .text: 0+2ac <[^>]*> ed2b bb02 vstmdbeq fp!, {d11} 0+2b0 <[^>]*> ed2c ab02 vstmdbeq ip!, {d10} 0+2b4 <[^>]*> bf01 itttt eq -0+2b6 <[^>]*> eeb8 fbe0 fsitodeq d15, s1 -0+2ba <[^>]*> eeb8 1b6f fuitodeq d1, s31 -0+2be <[^>]*> eefd 0b4f ftosideq s1, d15 -0+2c2 <[^>]*> eefd fbc2 ftosizdeq s31, d2 +0+2b6 <[^>]*> eeb8 fbe0 (vcvteq\.f64\.s32|fsitodeq) d15, s1 +0+2ba <[^>]*> eeb8 1b6f (vcvteq\.f64\.u32|fuitodeq) d1, s31 +0+2be <[^>]*> eefd 0b4f (vcvtreq\.s32\.f64|ftosideq) s1, d15 +0+2c2 <[^>]*> eefd fbc2 (vcvteq\.s32\.f64|ftosizdeq) s31, d2 0+2c6 <[^>]*> bf01 itttt eq -0+2c8 <[^>]*> eefc 7b42 ftouideq s15, d2 -0+2cc <[^>]*> eefc 5bc3 ftouizdeq s11, d3 -0+2d0 <[^>]*> eeb7 1ac5 fcvtdseq d1, s10 -0+2d4 <[^>]*> eef7 5bc1 fcvtsdeq s11, d1 +0+2c8 <[^>]*> eefc 7b42 (vcvtreq\.u32\.f64|ftouideq) s15, d2 +0+2cc <[^>]*> eefc 5bc3 (vcvteq\.u32\.f64|ftouizdeq) s11, d3 +0+2d0 <[^>]*> eeb7 1ac5 (vcvteq\.f64\.f32|fcvtdseq) d1, s10 +0+2d4 <[^>]*> eef7 5bc1 (vcvteq\.f32\.f64|fcvtsdeq) s11, d1 0+2d8 <[^>]*> bf01 itttt eq 0+2da <[^>]*> ee31 8b10 vmoveq\.32 r8, d1\[1\] 0+2de <[^>]*> ee1f 7b10 vmoveq\.32 r7, d15\[0\] diff --git a/gas/testsuite/gas/arm/vfp1xD.d b/gas/testsuite/gas/arm/vfp1xD.d index 22932e5284c..0be9dff03f0 100644 --- a/gas/testsuite/gas/arm/vfp1xD.d +++ b/gas/testsuite/gas/arm/vfp1xD.d @@ -7,247 +7,247 @@ .*: +file format .*arm.* Disassembly of section .text: -0+000 <[^>]*> eef1fa10 fmstat -0+004 <[^>]*> eeb40ac0 fcmpes s0, s0 -0+008 <[^>]*> eeb50ac0 fcmpezs s0 -0+00c <[^>]*> eeb40a40 fcmps s0, s0 -0+010 <[^>]*> eeb50a40 fcmpzs s0 -0+014 <[^>]*> eeb00ac0 fabss s0, s0 -0+018 <[^>]*> eeb00a40 fcpys s0, s0 -0+01c <[^>]*> eeb10a40 fnegs s0, s0 -0+020 <[^>]*> eeb10ac0 fsqrts s0, s0 -0+024 <[^>]*> ee300a00 fadds s0, s0, s0 -0+028 <[^>]*> ee800a00 fdivs s0, s0, s0 -0+02c <[^>]*> ee000a00 fmacs s0, s0, s0 -0+030 <[^>]*> ee100a00 fmscs s0, s0, s0 -0+034 <[^>]*> ee200a00 fmuls s0, s0, s0 -0+038 <[^>]*> ee000a40 fnmacs s0, s0, s0 -0+03c <[^>]*> ee100a40 fnmscs s0, s0, s0 -0+040 <[^>]*> ee200a40 fnmuls s0, s0, s0 -0+044 <[^>]*> ee300a40 fsubs s0, s0, s0 -0+048 <[^>]*> ed900a00 flds s0, \[r0\] -0+04c <[^>]*> ed800a00 fsts s0, \[r0\] -0+050 <[^>]*> ec900a01 fldmias r0, {s0} -0+054 <[^>]*> ec900a01 fldmias r0, {s0} -0+058 <[^>]*> ecb00a01 fldmias r0!, {s0} -0+05c <[^>]*> ecb00a01 fldmias r0!, {s0} -0+060 <[^>]*> ed300a01 fldmdbs r0!, {s0} -0+064 <[^>]*> ed300a01 fldmdbs r0!, {s0} -0+068 <[^>]*> ec900b03 fldmiax r0, {d0} -0+06c <[^>]*> ec900b03 fldmiax r0, {d0} -0+070 <[^>]*> ecb00b03 fldmiax r0!, {d0} -0+074 <[^>]*> ecb00b03 fldmiax r0!, {d0} -0+078 <[^>]*> ed300b03 fldmdbx r0!, {d0} -0+07c <[^>]*> ed300b03 fldmdbx r0!, {d0} -0+080 <[^>]*> ec800a01 fstmias r0, {s0} -0+084 <[^>]*> ec800a01 fstmias r0, {s0} -0+088 <[^>]*> eca00a01 fstmias r0!, {s0} -0+08c <[^>]*> eca00a01 fstmias r0!, {s0} -0+090 <[^>]*> ed200a01 fstmdbs r0!, {s0} -0+094 <[^>]*> ed200a01 fstmdbs r0!, {s0} -0+098 <[^>]*> ec800b03 fstmiax r0, {d0} -0+09c <[^>]*> ec800b03 fstmiax r0, {d0} -0+0a0 <[^>]*> eca00b03 fstmiax r0!, {d0} -0+0a4 <[^>]*> eca00b03 fstmiax r0!, {d0} -0+0a8 <[^>]*> ed200b03 fstmdbx r0!, {d0} -0+0ac <[^>]*> ed200b03 fstmdbx r0!, {d0} -0+0b0 <[^>]*> eeb80ac0 fsitos s0, s0 -0+0b4 <[^>]*> eeb80a40 fuitos s0, s0 -0+0b8 <[^>]*> eebd0a40 ftosis s0, s0 -0+0bc <[^>]*> eebd0ac0 ftosizs s0, s0 -0+0c0 <[^>]*> eebc0a40 ftouis s0, s0 -0+0c4 <[^>]*> eebc0ac0 ftouizs s0, s0 -0+0c8 <[^>]*> ee100a10 fmrs r0, s0 -0+0cc <[^>]*> eef00a10 fmrx r0, fpsid -0+0d0 <[^>]*> eef10a10 fmrx r0, fpscr -0+0d4 <[^>]*> eef80a10 fmrx r0, fpexc -0+0d8 <[^>]*> ee000a10 fmsr s0, r0 -0+0dc <[^>]*> eee00a10 fmxr fpsid, r0 -0+0e0 <[^>]*> eee10a10 fmxr fpscr, r0 -0+0e4 <[^>]*> eee80a10 fmxr fpexc, r0 -0+0e8 <[^>]*> eef50a40 fcmpzs s1 -0+0ec <[^>]*> eeb51a40 fcmpzs s2 -0+0f0 <[^>]*> eef5fa40 fcmpzs s31 -0+0f4 <[^>]*> eeb40a60 fcmps s0, s1 -0+0f8 <[^>]*> eeb40a41 fcmps s0, s2 -0+0fc <[^>]*> eeb40a6f fcmps s0, s31 -0+100 <[^>]*> eef40a40 fcmps s1, s0 -0+104 <[^>]*> eeb41a40 fcmps s2, s0 -0+108 <[^>]*> eef4fa40 fcmps s31, s0 -0+10c <[^>]*> eef4aa46 fcmps s21, s12 -0+110 <[^>]*> eeb10a60 fnegs s0, s1 -0+114 <[^>]*> eeb10a41 fnegs s0, s2 -0+118 <[^>]*> eeb10a6f fnegs s0, s31 -0+11c <[^>]*> eef10a40 fnegs s1, s0 -0+120 <[^>]*> eeb11a40 fnegs s2, s0 -0+124 <[^>]*> eef1fa40 fnegs s31, s0 -0+128 <[^>]*> eeb16a6a fnegs s12, s21 -0+12c <[^>]*> ee300a20 fadds s0, s0, s1 -0+130 <[^>]*> ee300a01 fadds s0, s0, s2 -0+134 <[^>]*> ee300a2f fadds s0, s0, s31 -0+138 <[^>]*> ee300a80 fadds s0, s1, s0 -0+13c <[^>]*> ee310a00 fadds s0, s2, s0 -0+140 <[^>]*> ee3f0a80 fadds s0, s31, s0 -0+144 <[^>]*> ee700a00 fadds s1, s0, s0 -0+148 <[^>]*> ee301a00 fadds s2, s0, s0 -0+14c <[^>]*> ee70fa00 fadds s31, s0, s0 -0+150 <[^>]*> ee3a6aa2 fadds s12, s21, s5 -0+154 <[^>]*> eeb80ae0 fsitos s0, s1 -0+158 <[^>]*> eeb80ac1 fsitos s0, s2 -0+15c <[^>]*> eeb80aef fsitos s0, s31 -0+160 <[^>]*> eef80ac0 fsitos s1, s0 -0+164 <[^>]*> eeb81ac0 fsitos s2, s0 -0+168 <[^>]*> eef8fac0 fsitos s31, s0 -0+16c <[^>]*> eebd0a60 ftosis s0, s1 -0+170 <[^>]*> eebd0a41 ftosis s0, s2 -0+174 <[^>]*> eebd0a6f ftosis s0, s31 -0+178 <[^>]*> eefd0a40 ftosis s1, s0 -0+17c <[^>]*> eebd1a40 ftosis s2, s0 -0+180 <[^>]*> eefdfa40 ftosis s31, s0 -0+184 <[^>]*> ee001a10 fmsr s0, r1 -0+188 <[^>]*> ee007a10 fmsr s0, r7 -0+18c <[^>]*> ee00ea10 fmsr s0, lr -0+190 <[^>]*> ee000a90 fmsr s1, r0 -0+194 <[^>]*> ee010a10 fmsr s2, r0 -0+198 <[^>]*> ee0f0a90 fmsr s31, r0 -0+19c <[^>]*> ee0a7a90 fmsr s21, r7 -0+1a0 <[^>]*> eee01a10 fmxr fpsid, r1 -0+1a4 <[^>]*> eee0ea10 fmxr fpsid, lr -0+1a8 <[^>]*> ee100a90 fmrs r0, s1 -0+1ac <[^>]*> ee110a10 fmrs r0, s2 -0+1b0 <[^>]*> ee1f0a90 fmrs r0, s31 -0+1b4 <[^>]*> ee101a10 fmrs r1, s0 -0+1b8 <[^>]*> ee107a10 fmrs r7, s0 -0+1bc <[^>]*> ee10ea10 fmrs lr, s0 -0+1c0 <[^>]*> ee159a90 fmrs r9, s11 -0+1c4 <[^>]*> eef01a10 fmrx r1, fpsid -0+1c8 <[^>]*> eef0ea10 fmrx lr, fpsid -0+1cc <[^>]*> ed910a00 flds s0, \[r1\] -0+1d0 <[^>]*> ed9e0a00 flds s0, \[lr\] -0+1d4 <[^>]*> ed900a00 flds s0, \[r0\] -0+1d8 <[^>]*> ed900aff flds s0, \[r0, #1020\] -0+1dc <[^>]*> ed100aff flds s0, \[r0, #-1020\] -0+1e0 <[^>]*> edd00a00 flds s1, \[r0\] -0+1e4 <[^>]*> ed901a00 flds s2, \[r0\] -0+1e8 <[^>]*> edd0fa00 flds s31, \[r0\] -0+1ec <[^>]*> edccaac9 fsts s21, \[ip, #804\] -0+1f0 <[^>]*> ecd00a01 fldmias r0, {s1} -0+1f4 <[^>]*> ec901a01 fldmias r0, {s2} -0+1f8 <[^>]*> ecd0fa01 fldmias r0, {s31} -0+1fc <[^>]*> ec900a02 fldmias r0, {s0-s1} -0+200 <[^>]*> ec900a03 fldmias r0, {s0-s2} -0+204 <[^>]*> ec900a20 fldmias r0, {s0-s31} -0+208 <[^>]*> ecd00a1f fldmias r0, {s1-s31} -0+20c <[^>]*> ec901a1e fldmias r0, {s2-s31} -0+210 <[^>]*> ec90fa02 fldmias r0, {s30-s31} -0+214 <[^>]*> ec910a01 fldmias r1, {s0} -0+218 <[^>]*> ec9e0a01 fldmias lr, {s0} -0+21c <[^>]*> ec801b03 fstmiax r0, {d1} -0+220 <[^>]*> ec802b03 fstmiax r0, {d2} -0+224 <[^>]*> ec80fb03 fstmiax r0, {d15} -0+228 <[^>]*> ec800b05 fstmiax r0, {d0-d1} -0+22c <[^>]*> ec800b07 fstmiax r0, {d0-d2} -0+230 <[^>]*> ec800b21 fstmiax r0, {d0-d15} -0+234 <[^>]*> ec801b1f fstmiax r0, {d1-d15} -0+238 <[^>]*> ec802b1d fstmiax r0, {d2-d15} -0+23c <[^>]*> ec80eb05 fstmiax r0, {d14-d15} -0+240 <[^>]*> ec810b03 fstmiax r1, {d0} -0+244 <[^>]*> ec8e0b03 fstmiax lr, {d0} -0+248 <[^>]*> eeb50a40 fcmpzs s0 -0+24c <[^>]*> eef50a40 fcmpzs s1 -0+250 <[^>]*> eeb51a40 fcmpzs s2 -0+254 <[^>]*> eef51a40 fcmpzs s3 -0+258 <[^>]*> eeb52a40 fcmpzs s4 -0+25c <[^>]*> eef52a40 fcmpzs s5 -0+260 <[^>]*> eeb53a40 fcmpzs s6 -0+264 <[^>]*> eef53a40 fcmpzs s7 -0+268 <[^>]*> eeb54a40 fcmpzs s8 -0+26c <[^>]*> eef54a40 fcmpzs s9 -0+270 <[^>]*> eeb55a40 fcmpzs s10 -0+274 <[^>]*> eef55a40 fcmpzs s11 -0+278 <[^>]*> eeb56a40 fcmpzs s12 -0+27c <[^>]*> eef56a40 fcmpzs s13 -0+280 <[^>]*> eeb57a40 fcmpzs s14 -0+284 <[^>]*> eef57a40 fcmpzs s15 -0+288 <[^>]*> eeb58a40 fcmpzs s16 -0+28c <[^>]*> eef58a40 fcmpzs s17 -0+290 <[^>]*> eeb59a40 fcmpzs s18 -0+294 <[^>]*> eef59a40 fcmpzs s19 -0+298 <[^>]*> eeb5aa40 fcmpzs s20 -0+29c <[^>]*> eef5aa40 fcmpzs s21 -0+2a0 <[^>]*> eeb5ba40 fcmpzs s22 -0+2a4 <[^>]*> eef5ba40 fcmpzs s23 -0+2a8 <[^>]*> eeb5ca40 fcmpzs s24 -0+2ac <[^>]*> eef5ca40 fcmpzs s25 -0+2b0 <[^>]*> eeb5da40 fcmpzs s26 -0+2b4 <[^>]*> eef5da40 fcmpzs s27 -0+2b8 <[^>]*> eeb5ea40 fcmpzs s28 -0+2bc <[^>]*> eef5ea40 fcmpzs s29 -0+2c0 <[^>]*> eeb5fa40 fcmpzs s30 -0+2c4 <[^>]*> eef5fa40 fcmpzs s31 -0+2c8 <[^>]*> 0ef1fa10 fmstateq -0+2cc <[^>]*> 0ef41ae3 fcmpeseq s3, s7 -0+2d0 <[^>]*> 0ef52ac0 fcmpezseq s5 -0+2d4 <[^>]*> 0ef40a41 fcmpseq s1, s2 -0+2d8 <[^>]*> 0ef50a40 fcmpzseq s1 -0+2dc <[^>]*> 0ef00ae1 fabsseq s1, s3 -0+2e0 <[^>]*> 0ef0fa69 fcpyseq s31, s19 -0+2e4 <[^>]*> 0eb1aa44 fnegseq s20, s8 -0+2e8 <[^>]*> 0ef12ae3 fsqrtseq s5, s7 -0+2ec <[^>]*> 0e323a82 faddseq s6, s5, s4 -0+2f0 <[^>]*> 0ec11a20 fdivseq s3, s2, s1 -0+2f4 <[^>]*> 0e4ffa2e fmacseq s31, s30, s29 -0+2f8 <[^>]*> 0e1dea8d fmscseq s28, s27, s26 -0+2fc <[^>]*> 0e6cca2b fmulseq s25, s24, s23 -0+300 <[^>]*> 0e0abaca fnmacseq s22, s21, s20 -0+304 <[^>]*> 0e599a68 fnmscseq s19, s18, s17 -0+308 <[^>]*> 0e278ac7 fnmulseq s16, s15, s14 -0+30c <[^>]*> 0e766a65 fsubseq s13, s12, s11 -0+310 <[^>]*> 0d985a00 fldseq s10, \[r8\] -0+314 <[^>]*> 0dc74a00 fstseq s9, \[r7\] -0+318 <[^>]*> 0c914a01 fldmiaseq r1, {s8} -0+31c <[^>]*> 0cd23a01 fldmiaseq r2, {s7} -0+320 <[^>]*> 0cb33a01 fldmiaseq r3!, {s6} -0+324 <[^>]*> 0cf42a01 fldmiaseq r4!, {s5} -0+328 <[^>]*> 0d352a01 fldmdbseq r5!, {s4} -0+32c <[^>]*> 0d761a01 fldmdbseq r6!, {s3} -0+330 <[^>]*> 0c971b03 fldmiaxeq r7, {d1} -0+334 <[^>]*> 0c982b03 fldmiaxeq r8, {d2} -0+338 <[^>]*> 0cb93b03 fldmiaxeq r9!, {d3} -0+33c <[^>]*> 0cba4b03 fldmiaxeq sl!, {d4} -0+340 <[^>]*> 0d3b5b03 fldmdbxeq fp!, {d5} -0+344 <[^>]*> 0d3c6b03 fldmdbxeq ip!, {d6} -0+348 <[^>]*> 0c8d1a01 fstmiaseq sp, {s2} -0+34c <[^>]*> 0cce0a01 fstmiaseq lr, {s1} -0+350 <[^>]*> 0ce1fa01 fstmiaseq r1!, {s31} -0+354 <[^>]*> 0ca2fa01 fstmiaseq r2!, {s30} -0+358 <[^>]*> 0d63ea01 fstmdbseq r3!, {s29} -0+35c <[^>]*> 0d24ea01 fstmdbseq r4!, {s28} -0+360 <[^>]*> 0c857b03 fstmiaxeq r5, {d7} -0+364 <[^>]*> 0c868b03 fstmiaxeq r6, {d8} -0+368 <[^>]*> 0ca79b03 fstmiaxeq r7!, {d9} -0+36c <[^>]*> 0ca8ab03 fstmiaxeq r8!, {d10} -0+370 <[^>]*> 0d29bb03 fstmdbxeq r9!, {d11} -0+374 <[^>]*> 0d2acb03 fstmdbxeq sl!, {d12} -0+378 <[^>]*> 0ef8dac3 fsitoseq s27, s6 -0+37c <[^>]*> 0efdca62 ftosiseq s25, s5 -0+380 <[^>]*> 0efdbac2 ftosizseq s23, s4 -0+384 <[^>]*> 0efcaa61 ftouiseq s21, s3 -0+388 <[^>]*> 0efc9ac1 ftouizseq s19, s2 -0+38c <[^>]*> 0ef88a60 fuitoseq s17, s1 -0+390 <[^>]*> 0e11ba90 fmrseq fp, s3 -0+394 <[^>]*> 0ef09a10 fmrxeq r9, fpsid -0+398 <[^>]*> 0e019a90 fmsreq s3, r9 -0+39c <[^>]*> 0ee08a10 fmxreq fpsid, r8 -0+3a0 <[^>]*> eef90a10 fmrx r0, fpinst @ Impl def -0+3a4 <[^>]*> eefa0a10 fmrx r0, fpinst2 @ Impl def -0+3a8 <[^>]*> eef70a10 fmrx r0, mvfr0 -0+3ac <[^>]*> eef60a10 fmrx r0, mvfr1 -0+3b0 <[^>]*> eefc0a10 fmrx r0, -0+3b4 <[^>]*> eee90a10 fmxr fpinst, r0 @ Impl def -0+3b8 <[^>]*> eeea0a10 fmxr fpinst2, r0 @ Impl def -0+3bc <[^>]*> eee70a10 fmxr mvfr0, r0 -0+3c0 <[^>]*> eee60a10 fmxr mvfr1, r0 -0+3c4 <[^>]*> eeec0a10 fmxr , r0 +0+000 <[^>]*> eef1fa10 (vmrs APSR_nzcv, fpscr|fmstat) +0+004 <[^>]*> eeb40ac0 (vcmpe\.f32|fcmpes) s0, s0 +0+008 <[^>]*> eeb50ac0 (vcmpe\.f32 s0, #0.0|fcmpezs s0) +0+00c <[^>]*> eeb40a40 (vcmp\.f32|fcmps) s0, s0 +0+010 <[^>]*> eeb50a40 (vcmp\.f32 s0, #0.0|fcmpzs s0) +0+014 <[^>]*> eeb00ac0 (vabs\.f32|fabss) s0, s0 +0+018 <[^>]*> eeb00a40 (vmov\.f32|fcpys) s0, s0 +0+01c <[^>]*> eeb10a40 (vneg\.f32|fnegs) s0, s0 +0+020 <[^>]*> eeb10ac0 (vsqrt\.f32|fsqrts) s0, s0 +0+024 <[^>]*> ee300a00 (vadd\.f32|fadds) s0, s0, s0 +0+028 <[^>]*> ee800a00 (vdiv\.f32|fdivs) s0, s0, s0 +0+02c <[^>]*> ee000a00 (vmla\.f32|fmacs) s0, s0, s0 +0+030 <[^>]*> ee100a00 (vnmls\.f32|fmscs) s0, s0, s0 +0+034 <[^>]*> ee200a00 (vmul\.f32|fmuls) s0, s0, s0 +0+038 <[^>]*> ee000a40 (vmls\.f32|fnmacs) s0, s0, s0 +0+03c <[^>]*> ee100a40 (vnmla\.f32|fnmscs) s0, s0, s0 +0+040 <[^>]*> ee200a40 (vnmul\.f32|fnmuls) s0, s0, s0 +0+044 <[^>]*> ee300a40 (vsub\.f32|fsubs) s0, s0, s0 +0+048 <[^>]*> ed900a00 (vldr|flds) s0, \[r0\] +0+04c <[^>]*> ed800a00 (vstr|fsts) s0, \[r0\] +0+050 <[^>]*> ec900a01 (vldmia|fldmias) r0, {s0} +0+054 <[^>]*> ec900a01 (vldmia|fldmias) r0, {s0} +0+058 <[^>]*> ecb00a01 (vldmia|fldmias) r0!, {s0} +0+05c <[^>]*> ecb00a01 (vldmia|fldmias) r0!, {s0} +0+060 <[^>]*> ed300a01 (vldmdb|fldmdbs) r0!, {s0} +0+064 <[^>]*> ed300a01 (vldmdb|fldmdbs) r0!, {s0} +0+068 <[^>]*> ec900b03 fldmiax r0, {d0}( ;@ Deprecated|) +0+06c <[^>]*> ec900b03 fldmiax r0, {d0}( ;@ Deprecated|) +0+070 <[^>]*> ecb00b03 fldmiax r0!, {d0}( ;@ Deprecated|) +0+074 <[^>]*> ecb00b03 fldmiax r0!, {d0}( ;@ Deprecated|) +0+078 <[^>]*> ed300b03 fldmdbx r0!, {d0}( ;@ Deprecated|) +0+07c <[^>]*> ed300b03 fldmdbx r0!, {d0}( ;@ Deprecated|) +0+080 <[^>]*> ec800a01 (vstmia|fstmias) r0, {s0} +0+084 <[^>]*> ec800a01 (vstmia|fstmias) r0, {s0} +0+088 <[^>]*> eca00a01 (vstmia|fstmias) r0!, {s0} +0+08c <[^>]*> eca00a01 (vstmia|fstmias) r0!, {s0} +0+090 <[^>]*> ed200a01 (vstmdb|fstmdbs) r0!, {s0} +0+094 <[^>]*> ed200a01 (vstmdb|fstmdbs) r0!, {s0} +0+098 <[^>]*> ec800b03 fstmiax r0, {d0}( ;@ Deprecated|) +0+09c <[^>]*> ec800b03 fstmiax r0, {d0}( ;@ Deprecated|) +0+0a0 <[^>]*> eca00b03 fstmiax r0!, {d0}( ;@ Deprecated|) +0+0a4 <[^>]*> eca00b03 fstmiax r0!, {d0}( ;@ Deprecated|) +0+0a8 <[^>]*> ed200b03 fstmdbx r0!, {d0}( ;@ Deprecated|) +0+0ac <[^>]*> ed200b03 fstmdbx r0!, {d0}( ;@ Deprecated|) +0+0b0 <[^>]*> eeb80ac0 (vcvt\.f32\.s32|fsitos) s0, s0 +0+0b4 <[^>]*> eeb80a40 (vcvt\.f32\.u32|fuitos) s0, s0 +0+0b8 <[^>]*> eebd0a40 (vcvtr\.s32\.f32|ftosis) s0, s0 +0+0bc <[^>]*> eebd0ac0 (vcvt\.s32\.f32|ftosizs) s0, s0 +0+0c0 <[^>]*> eebc0a40 (vcvtr\.u32\.f32|ftouis) s0, s0 +0+0c4 <[^>]*> eebc0ac0 (vcvt\.u32\.f32|ftouizs) s0, s0 +0+0c8 <[^>]*> ee100a10 (vmov|fmrs) r0, s0 +0+0cc <[^>]*> eef00a10 (vmrs|fmrx) r0, fpsid +0+0d0 <[^>]*> eef10a10 (vmrs|fmrx) r0, fpscr +0+0d4 <[^>]*> eef80a10 (vmrs|fmrx) r0, fpexc +0+0d8 <[^>]*> ee000a10 (vmov|fmsr) s0, r0 +0+0dc <[^>]*> eee00a10 (vmsr|fmxr) fpsid, r0 +0+0e0 <[^>]*> eee10a10 (vmsr|fmxr) fpscr, r0 +0+0e4 <[^>]*> eee80a10 (vmsr|fmxr) fpexc, r0 +0+0e8 <[^>]*> eef50a40 (vcmp\.f32 s1, #0.0|fcmpzs s1) +0+0ec <[^>]*> eeb51a40 (vcmp\.f32 s2, #0.0|fcmpzs s2) +0+0f0 <[^>]*> eef5fa40 (vcmp\.f32 s31, #0.0|fcmpzs s31) +0+0f4 <[^>]*> eeb40a60 (vcmp\.f32|fcmps) s0, s1 +0+0f8 <[^>]*> eeb40a41 (vcmp\.f32|fcmps) s0, s2 +0+0fc <[^>]*> eeb40a6f (vcmp\.f32|fcmps) s0, s31 +0+100 <[^>]*> eef40a40 (vcmp\.f32|fcmps) s1, s0 +0+104 <[^>]*> eeb41a40 (vcmp\.f32|fcmps) s2, s0 +0+108 <[^>]*> eef4fa40 (vcmp\.f32|fcmps) s31, s0 +0+10c <[^>]*> eef4aa46 (vcmp\.f32|fcmps) s21, s12 +0+110 <[^>]*> eeb10a60 (vneg\.f32|fnegs) s0, s1 +0+114 <[^>]*> eeb10a41 (vneg\.f32|fnegs) s0, s2 +0+118 <[^>]*> eeb10a6f (vneg\.f32|fnegs) s0, s31 +0+11c <[^>]*> eef10a40 (vneg\.f32|fnegs) s1, s0 +0+120 <[^>]*> eeb11a40 (vneg\.f32|fnegs) s2, s0 +0+124 <[^>]*> eef1fa40 (vneg\.f32|fnegs) s31, s0 +0+128 <[^>]*> eeb16a6a (vneg\.f32|fnegs) s12, s21 +0+12c <[^>]*> ee300a20 (vadd\.f32|fadds) s0, s0, s1 +0+130 <[^>]*> ee300a01 (vadd\.f32|fadds) s0, s0, s2 +0+134 <[^>]*> ee300a2f (vadd\.f32|fadds) s0, s0, s31 +0+138 <[^>]*> ee300a80 (vadd\.f32|fadds) s0, s1, s0 +0+13c <[^>]*> ee310a00 (vadd\.f32|fadds) s0, s2, s0 +0+140 <[^>]*> ee3f0a80 (vadd\.f32|fadds) s0, s31, s0 +0+144 <[^>]*> ee700a00 (vadd\.f32|fadds) s1, s0, s0 +0+148 <[^>]*> ee301a00 (vadd\.f32|fadds) s2, s0, s0 +0+14c <[^>]*> ee70fa00 (vadd\.f32|fadds) s31, s0, s0 +0+150 <[^>]*> ee3a6aa2 (vadd\.f32|fadds) s12, s21, s5 +0+154 <[^>]*> eeb80ae0 (vcvt\.f32\.s32|fsitos) s0, s1 +0+158 <[^>]*> eeb80ac1 (vcvt\.f32\.s32|fsitos) s0, s2 +0+15c <[^>]*> eeb80aef (vcvt\.f32\.s32|fsitos) s0, s31 +0+160 <[^>]*> eef80ac0 (vcvt\.f32\.s32|fsitos) s1, s0 +0+164 <[^>]*> eeb81ac0 (vcvt\.f32\.s32|fsitos) s2, s0 +0+168 <[^>]*> eef8fac0 (vcvt\.f32\.s32|fsitos) s31, s0 +0+16c <[^>]*> eebd0a60 (vcvtr\.s32\.f32|ftosis) s0, s1 +0+170 <[^>]*> eebd0a41 (vcvtr\.s32\.f32|ftosis) s0, s2 +0+174 <[^>]*> eebd0a6f (vcvtr\.s32\.f32|ftosis) s0, s31 +0+178 <[^>]*> eefd0a40 (vcvtr\.s32\.f32|ftosis) s1, s0 +0+17c <[^>]*> eebd1a40 (vcvtr\.s32\.f32|ftosis) s2, s0 +0+180 <[^>]*> eefdfa40 (vcvtr\.s32\.f32|ftosis) s31, s0 +0+184 <[^>]*> ee001a10 (vmov|fmsr) s0, r1 +0+188 <[^>]*> ee007a10 (vmov|fmsr) s0, r7 +0+18c <[^>]*> ee00ea10 (vmov|fmsr) s0, lr +0+190 <[^>]*> ee000a90 (vmov|fmsr) s1, r0 +0+194 <[^>]*> ee010a10 (vmov|fmsr) s2, r0 +0+198 <[^>]*> ee0f0a90 (vmov|fmsr) s31, r0 +0+19c <[^>]*> ee0a7a90 (vmov|fmsr) s21, r7 +0+1a0 <[^>]*> eee01a10 (vmsr|fmxr) fpsid, r1 +0+1a4 <[^>]*> eee0ea10 (vmsr|fmxr) fpsid, lr +0+1a8 <[^>]*> ee100a90 (vmov|fmrs) r0, s1 +0+1ac <[^>]*> ee110a10 (vmov|fmrs) r0, s2 +0+1b0 <[^>]*> ee1f0a90 (vmov|fmrs) r0, s31 +0+1b4 <[^>]*> ee101a10 (vmov|fmrs) r1, s0 +0+1b8 <[^>]*> ee107a10 (vmov|fmrs) r7, s0 +0+1bc <[^>]*> ee10ea10 (vmov|fmrs) lr, s0 +0+1c0 <[^>]*> ee159a90 (vmov|fmrs) r9, s11 +0+1c4 <[^>]*> eef01a10 (vmrs|fmrx) r1, fpsid +0+1c8 <[^>]*> eef0ea10 (vmrs|fmrx) lr, fpsid +0+1cc <[^>]*> ed910a00 (vldr|flds) s0, \[r1\] +0+1d0 <[^>]*> ed9e0a00 (vldr|flds) s0, \[lr\] +0+1d4 <[^>]*> ed900a00 (vldr|flds) s0, \[r0\] +0+1d8 <[^>]*> ed900aff (vldr|flds) s0, \[r0, #1020\] +0+1dc <[^>]*> ed100aff (vldr|flds) s0, \[r0, #-1020\] +0+1e0 <[^>]*> edd00a00 (vldr|flds) s1, \[r0\] +0+1e4 <[^>]*> ed901a00 (vldr|flds) s2, \[r0\] +0+1e8 <[^>]*> edd0fa00 (vldr|flds) s31, \[r0\] +0+1ec <[^>]*> edccaac9 (vstr|fsts) s21, \[ip, #804\] +0+1f0 <[^>]*> ecd00a01 (vldmia|fldmias) r0, {s1} +0+1f4 <[^>]*> ec901a01 (vldmia|fldmias) r0, {s2} +0+1f8 <[^>]*> ecd0fa01 (vldmia|fldmias) r0, {s31} +0+1fc <[^>]*> ec900a02 (vldmia|fldmias) r0, {s0-s1} +0+200 <[^>]*> ec900a03 (vldmia|fldmias) r0, {s0-s2} +0+204 <[^>]*> ec900a20 (vldmia|fldmias) r0, {s0-s31} +0+208 <[^>]*> ecd00a1f (vldmia|fldmias) r0, {s1-s31} +0+20c <[^>]*> ec901a1e (vldmia|fldmias) r0, {s2-s31} +0+210 <[^>]*> ec90fa02 (vldmia|fldmias) r0, {s30-s31} +0+214 <[^>]*> ec910a01 (vldmia|fldmias) r1, {s0} +0+218 <[^>]*> ec9e0a01 (vldmia|fldmias) lr, {s0} +0+21c <[^>]*> ec801b03 fstmiax r0, {d1}( ;@ Deprecated|) +0+220 <[^>]*> ec802b03 fstmiax r0, {d2}( ;@ Deprecated|) +0+224 <[^>]*> ec80fb03 fstmiax r0, {d15}( ;@ Deprecated|) +0+228 <[^>]*> ec800b05 fstmiax r0, {d0-d1}( ;@ Deprecated|) +0+22c <[^>]*> ec800b07 fstmiax r0, {d0-d2}( ;@ Deprecated|) +0+230 <[^>]*> ec800b21 fstmiax r0, {d0-d15}( ;@ Deprecated|) +0+234 <[^>]*> ec801b1f fstmiax r0, {d1-d15}( ;@ Deprecated|) +0+238 <[^>]*> ec802b1d fstmiax r0, {d2-d15}( ;@ Deprecated|) +0+23c <[^>]*> ec80eb05 fstmiax r0, {d14-d15}( ;@ Deprecated|) +0+240 <[^>]*> ec810b03 fstmiax r1, {d0}( ;@ Deprecated|) +0+244 <[^>]*> ec8e0b03 fstmiax lr, {d0}( ;@ Deprecated|) +0+248 <[^>]*> eeb50a40 (vcmp\.f32 s0, #0.0|fcmpzs s0) +0+24c <[^>]*> eef50a40 (vcmp\.f32 s1, #0.0|fcmpzs s1) +0+250 <[^>]*> eeb51a40 (vcmp\.f32 s2, #0.0|fcmpzs s2) +0+254 <[^>]*> eef51a40 (vcmp\.f32 s3, #0.0|fcmpzs s3) +0+258 <[^>]*> eeb52a40 (vcmp\.f32 s4, #0.0|fcmpzs s4) +0+25c <[^>]*> eef52a40 (vcmp\.f32 s5, #0.0|fcmpzs s5) +0+260 <[^>]*> eeb53a40 (vcmp\.f32 s6, #0.0|fcmpzs s6) +0+264 <[^>]*> eef53a40 (vcmp\.f32 s7, #0.0|fcmpzs s7) +0+268 <[^>]*> eeb54a40 (vcmp\.f32 s8, #0.0|fcmpzs s8) +0+26c <[^>]*> eef54a40 (vcmp\.f32 s9, #0.0|fcmpzs s9) +0+270 <[^>]*> eeb55a40 (vcmp\.f32 s10, #0.0|fcmpzs s10) +0+274 <[^>]*> eef55a40 (vcmp\.f32 s11, #0.0|fcmpzs s11) +0+278 <[^>]*> eeb56a40 (vcmp\.f32 s12, #0.0|fcmpzs s12) +0+27c <[^>]*> eef56a40 (vcmp\.f32 s13, #0.0|fcmpzs s13) +0+280 <[^>]*> eeb57a40 (vcmp\.f32 s14, #0.0|fcmpzs s14) +0+284 <[^>]*> eef57a40 (vcmp\.f32 s15, #0.0|fcmpzs s15) +0+288 <[^>]*> eeb58a40 (vcmp\.f32 s16, #0.0|fcmpzs s16) +0+28c <[^>]*> eef58a40 (vcmp\.f32 s17, #0.0|fcmpzs s17) +0+290 <[^>]*> eeb59a40 (vcmp\.f32 s18, #0.0|fcmpzs s18) +0+294 <[^>]*> eef59a40 (vcmp\.f32 s19, #0.0|fcmpzs s19) +0+298 <[^>]*> eeb5aa40 (vcmp\.f32 s20, #0.0|fcmpzs s20) +0+29c <[^>]*> eef5aa40 (vcmp\.f32 s21, #0.0|fcmpzs s21) +0+2a0 <[^>]*> eeb5ba40 (vcmp\.f32 s22, #0.0|fcmpzs s22) +0+2a4 <[^>]*> eef5ba40 (vcmp\.f32 s23, #0.0|fcmpzs s23) +0+2a8 <[^>]*> eeb5ca40 (vcmp\.f32 s24, #0.0|fcmpzs s24) +0+2ac <[^>]*> eef5ca40 (vcmp\.f32 s25, #0.0|fcmpzs s25) +0+2b0 <[^>]*> eeb5da40 (vcmp\.f32 s26, #0.0|fcmpzs s26) +0+2b4 <[^>]*> eef5da40 (vcmp\.f32 s27, #0.0|fcmpzs s27) +0+2b8 <[^>]*> eeb5ea40 (vcmp\.f32 s28, #0.0|fcmpzs s28) +0+2bc <[^>]*> eef5ea40 (vcmp\.f32 s29, #0.0|fcmpzs s29) +0+2c0 <[^>]*> eeb5fa40 (vcmp\.f32 s30, #0.0|fcmpzs s30) +0+2c4 <[^>]*> eef5fa40 (vcmp\.f32 s31, #0.0|fcmpzs s31) +0+2c8 <[^>]*> 0ef1fa10 (vmrseq APSR_nzcv, fpscr|fmstateq) +0+2cc <[^>]*> 0ef41ae3 (vcmpeeq\.f32|fcmpeseq) s3, s7 +0+2d0 <[^>]*> 0ef52ac0 (vcmpeeq\.f32 s5, #0.0|fcmpezseq s5) +0+2d4 <[^>]*> 0ef40a41 (vcmpeq\.f32|fcmpseq) s1, s2 +0+2d8 <[^>]*> 0ef50a40 (vcmpeq\.f32 s1, #0.0|fcmpzseq s1) +0+2dc <[^>]*> 0ef00ae1 (vabseq\.f32|fabsseq) s1, s3 +0+2e0 <[^>]*> 0ef0fa69 (vmoveq\.f32|fcpyseq) s31, s19 +0+2e4 <[^>]*> 0eb1aa44 (vnegeq\.f32|fnegseq) s20, s8 +0+2e8 <[^>]*> 0ef12ae3 (vsqrteq\.f32|fsqrtseq) s5, s7 +0+2ec <[^>]*> 0e323a82 (vaddeq\.f32|faddseq) s6, s5, s4 +0+2f0 <[^>]*> 0ec11a20 (vdiveq\.f32|fdivseq) s3, s2, s1 +0+2f4 <[^>]*> 0e4ffa2e (vmlaeq\.f32|fmacseq) s31, s30, s29 +0+2f8 <[^>]*> 0e1dea8d (vnmlseq\.f32|fmscseq) s28, s27, s26 +0+2fc <[^>]*> 0e6cca2b (vmuleq\.f32|fmulseq) s25, s24, s23 +0+300 <[^>]*> 0e0abaca (vmlseq\.f32|fnmacseq) s22, s21, s20 +0+304 <[^>]*> 0e599a68 (vnmlaeq\.f32|fnmscseq) s19, s18, s17 +0+308 <[^>]*> 0e278ac7 (vnmuleq\.f32|fnmulseq) s16, s15, s14 +0+30c <[^>]*> 0e766a65 (vsubeq\.f32|fsubseq) s13, s12, s11 +0+310 <[^>]*> 0d985a00 (vldreq|fldseq) s10, \[r8\] +0+314 <[^>]*> 0dc74a00 (vstreq|fstseq) s9, \[r7\] +0+318 <[^>]*> 0c914a01 (vldmiaeq|fldmiaseq) r1, {s8} +0+31c <[^>]*> 0cd23a01 (vldmiaeq|fldmiaseq) r2, {s7} +0+320 <[^>]*> 0cb33a01 (vldmiaeq|fldmiaseq) r3!, {s6} +0+324 <[^>]*> 0cf42a01 (vldmiaeq|fldmiaseq) r4!, {s5} +0+328 <[^>]*> 0d352a01 (vldmdbeq|fldmdbseq) r5!, {s4} +0+32c <[^>]*> 0d761a01 (vldmdbeq|fldmdbseq) r6!, {s3} +0+330 <[^>]*> 0c971b03 fldmiaxeq r7, {d1}( ;@ Deprecated|) +0+334 <[^>]*> 0c982b03 fldmiaxeq r8, {d2}( ;@ Deprecated|) +0+338 <[^>]*> 0cb93b03 fldmiaxeq r9!, {d3}( ;@ Deprecated|) +0+33c <[^>]*> 0cba4b03 fldmiaxeq sl!, {d4}( ;@ Deprecated|) +0+340 <[^>]*> 0d3b5b03 fldmdbxeq fp!, {d5}( ;@ Deprecated|) +0+344 <[^>]*> 0d3c6b03 fldmdbxeq ip!, {d6}( ;@ Deprecated|) +0+348 <[^>]*> 0c8d1a01 (vstmiaeq|fstmiaseq) sp, {s2} +0+34c <[^>]*> 0cce0a01 (vstmiaeq|fstmiaseq) lr, {s1} +0+350 <[^>]*> 0ce1fa01 (vstmiaeq|fstmiaseq) r1!, {s31} +0+354 <[^>]*> 0ca2fa01 (vstmiaeq|fstmiaseq) r2!, {s30} +0+358 <[^>]*> 0d63ea01 (vstmdbeq|fstmdbseq) r3!, {s29} +0+35c <[^>]*> 0d24ea01 (vstmdbeq|fstmdbseq) r4!, {s28} +0+360 <[^>]*> 0c857b03 fstmiaxeq r5, {d7}( ;@ Deprecated|) +0+364 <[^>]*> 0c868b03 fstmiaxeq r6, {d8}( ;@ Deprecated|) +0+368 <[^>]*> 0ca79b03 fstmiaxeq r7!, {d9}( ;@ Deprecated|) +0+36c <[^>]*> 0ca8ab03 fstmiaxeq r8!, {d10}( ;@ Deprecated|) +0+370 <[^>]*> 0d29bb03 fstmdbxeq r9!, {d11}( ;@ Deprecated|) +0+374 <[^>]*> 0d2acb03 fstmdbxeq sl!, {d12}( ;@ Deprecated|) +0+378 <[^>]*> 0ef8dac3 (vcvteq\.f32\.s32|fsitoseq) s27, s6 +0+37c <[^>]*> 0efdca62 (vcvtreq\.s32\.f32|ftosiseq) s25, s5 +0+380 <[^>]*> 0efdbac2 (vcvteq\.s32\.f32|ftosizseq) s23, s4 +0+384 <[^>]*> 0efcaa61 (vcvtreq\.u32\.f32|ftouiseq) s21, s3 +0+388 <[^>]*> 0efc9ac1 (vcvteq\.u32\.f32|ftouizseq) s19, s2 +0+38c <[^>]*> 0ef88a60 (vcvteq\.f32\.u32|fuitoseq) s17, s1 +0+390 <[^>]*> 0e11ba90 (vmoveq|fmrseq) fp, s3 +0+394 <[^>]*> 0ef09a10 (vmrseq|fmrxeq) r9, fpsid +0+398 <[^>]*> 0e019a90 (vmoveq|fmsreq) s3, r9 +0+39c <[^>]*> 0ee08a10 (vmsreq|fmxreq) fpsid, r8 +0+3a0 <[^>]*> eef90a10 (vmrs|fmrx) r0, fpinst @ Impl def +0+3a4 <[^>]*> eefa0a10 (vmrs|fmrx) r0, fpinst2 @ Impl def +0+3a8 <[^>]*> eef70a10 (vmrs|fmrx) r0, mvfr0 +0+3ac <[^>]*> eef60a10 (vmrs|fmrx) r0, mvfr1 +0+3b0 <[^>]*> eefc0a10 (vmrs|fmrx) r0, +0+3b4 <[^>]*> eee90a10 (vmsr|fmxr) fpinst, r0 @ Impl def +0+3b8 <[^>]*> eeea0a10 (vmsr|fmxr) fpinst2, r0 @ Impl def +0+3bc <[^>]*> eee70a10 (vmsr|fmxr) mvfr0, r0 +0+3c0 <[^>]*> eee60a10 (vmsr|fmxr) mvfr1, r0 +0+3c4 <[^>]*> eeec0a10 (vmsr|fmxr) , r0 0+3c8 <[^>]*> e1a00000 nop \(mov r0,r0\) 0+3cc <[^>]*> e1a00000 nop \(mov r0,r0\) diff --git a/gas/testsuite/gas/arm/vfp1xD_t2.d b/gas/testsuite/gas/arm/vfp1xD_t2.d index d2943114d6c..fce0270f797 100644 --- a/gas/testsuite/gas/arm/vfp1xD_t2.d +++ b/gas/testsuite/gas/arm/vfp1xD_t2.d @@ -7,262 +7,262 @@ .*: +file format .*arm.* Disassembly of section .text: -0+000 <[^>]*> eef1 fa10 fmstat -0+004 <[^>]*> eeb4 0ac0 fcmpes s0, s0 -0+008 <[^>]*> eeb5 0ac0 fcmpezs s0 -0+00c <[^>]*> eeb4 0a40 fcmps s0, s0 -0+010 <[^>]*> eeb5 0a40 fcmpzs s0 -0+014 <[^>]*> eeb0 0ac0 fabss s0, s0 -0+018 <[^>]*> eeb0 0a40 fcpys s0, s0 -0+01c <[^>]*> eeb1 0a40 fnegs s0, s0 -0+020 <[^>]*> eeb1 0ac0 fsqrts s0, s0 -0+024 <[^>]*> ee30 0a00 fadds s0, s0, s0 -0+028 <[^>]*> ee80 0a00 fdivs s0, s0, s0 -0+02c <[^>]*> ee00 0a00 fmacs s0, s0, s0 -0+030 <[^>]*> ee10 0a00 fmscs s0, s0, s0 -0+034 <[^>]*> ee20 0a00 fmuls s0, s0, s0 -0+038 <[^>]*> ee00 0a40 fnmacs s0, s0, s0 -0+03c <[^>]*> ee10 0a40 fnmscs s0, s0, s0 -0+040 <[^>]*> ee20 0a40 fnmuls s0, s0, s0 -0+044 <[^>]*> ee30 0a40 fsubs s0, s0, s0 -0+048 <[^>]*> ed90 0a00 flds s0, \[r0\] -0+04c <[^>]*> ed80 0a00 fsts s0, \[r0\] -0+050 <[^>]*> ec90 0a01 fldmias r0, {s0} -0+054 <[^>]*> ec90 0a01 fldmias r0, {s0} -0+058 <[^>]*> ecb0 0a01 fldmias r0!, {s0} -0+05c <[^>]*> ecb0 0a01 fldmias r0!, {s0} -0+060 <[^>]*> ed30 0a01 fldmdbs r0!, {s0} -0+064 <[^>]*> ed30 0a01 fldmdbs r0!, {s0} -0+068 <[^>]*> ec90 0b03 fldmiax r0, {d0} -0+06c <[^>]*> ec90 0b03 fldmiax r0, {d0} -0+070 <[^>]*> ecb0 0b03 fldmiax r0!, {d0} -0+074 <[^>]*> ecb0 0b03 fldmiax r0!, {d0} -0+078 <[^>]*> ed30 0b03 fldmdbx r0!, {d0} -0+07c <[^>]*> ed30 0b03 fldmdbx r0!, {d0} -0+080 <[^>]*> ec80 0a01 fstmias r0, {s0} -0+084 <[^>]*> ec80 0a01 fstmias r0, {s0} -0+088 <[^>]*> eca0 0a01 fstmias r0!, {s0} -0+08c <[^>]*> eca0 0a01 fstmias r0!, {s0} -0+090 <[^>]*> ed20 0a01 fstmdbs r0!, {s0} -0+094 <[^>]*> ed20 0a01 fstmdbs r0!, {s0} -0+098 <[^>]*> ec80 0b03 fstmiax r0, {d0} -0+09c <[^>]*> ec80 0b03 fstmiax r0, {d0} -0+0a0 <[^>]*> eca0 0b03 fstmiax r0!, {d0} -0+0a4 <[^>]*> eca0 0b03 fstmiax r0!, {d0} -0+0a8 <[^>]*> ed20 0b03 fstmdbx r0!, {d0} -0+0ac <[^>]*> ed20 0b03 fstmdbx r0!, {d0} -0+0b0 <[^>]*> eeb8 0ac0 fsitos s0, s0 -0+0b4 <[^>]*> eeb8 0a40 fuitos s0, s0 -0+0b8 <[^>]*> eebd 0a40 ftosis s0, s0 -0+0bc <[^>]*> eebd 0ac0 ftosizs s0, s0 -0+0c0 <[^>]*> eebc 0a40 ftouis s0, s0 -0+0c4 <[^>]*> eebc 0ac0 ftouizs s0, s0 -0+0c8 <[^>]*> ee10 0a10 fmrs r0, s0 -0+0cc <[^>]*> eef0 0a10 fmrx r0, fpsid -0+0d0 <[^>]*> eef1 0a10 fmrx r0, fpscr -0+0d4 <[^>]*> eef8 0a10 fmrx r0, fpexc -0+0d8 <[^>]*> ee00 0a10 fmsr s0, r0 -0+0dc <[^>]*> eee0 0a10 fmxr fpsid, r0 -0+0e0 <[^>]*> eee1 0a10 fmxr fpscr, r0 -0+0e4 <[^>]*> eee8 0a10 fmxr fpexc, r0 -0+0e8 <[^>]*> eef5 0a40 fcmpzs s1 -0+0ec <[^>]*> eeb5 1a40 fcmpzs s2 -0+0f0 <[^>]*> eef5 fa40 fcmpzs s31 -0+0f4 <[^>]*> eeb4 0a60 fcmps s0, s1 -0+0f8 <[^>]*> eeb4 0a41 fcmps s0, s2 -0+0fc <[^>]*> eeb4 0a6f fcmps s0, s31 -0+100 <[^>]*> eef4 0a40 fcmps s1, s0 -0+104 <[^>]*> eeb4 1a40 fcmps s2, s0 -0+108 <[^>]*> eef4 fa40 fcmps s31, s0 -0+10c <[^>]*> eef4 aa46 fcmps s21, s12 -0+110 <[^>]*> eeb1 0a60 fnegs s0, s1 -0+114 <[^>]*> eeb1 0a41 fnegs s0, s2 -0+118 <[^>]*> eeb1 0a6f fnegs s0, s31 -0+11c <[^>]*> eef1 0a40 fnegs s1, s0 -0+120 <[^>]*> eeb1 1a40 fnegs s2, s0 -0+124 <[^>]*> eef1 fa40 fnegs s31, s0 -0+128 <[^>]*> eeb1 6a6a fnegs s12, s21 -0+12c <[^>]*> ee30 0a20 fadds s0, s0, s1 -0+130 <[^>]*> ee30 0a01 fadds s0, s0, s2 -0+134 <[^>]*> ee30 0a2f fadds s0, s0, s31 -0+138 <[^>]*> ee30 0a80 fadds s0, s1, s0 -0+13c <[^>]*> ee31 0a00 fadds s0, s2, s0 -0+140 <[^>]*> ee3f 0a80 fadds s0, s31, s0 -0+144 <[^>]*> ee70 0a00 fadds s1, s0, s0 -0+148 <[^>]*> ee30 1a00 fadds s2, s0, s0 -0+14c <[^>]*> ee70 fa00 fadds s31, s0, s0 -0+150 <[^>]*> ee3a 6aa2 fadds s12, s21, s5 -0+154 <[^>]*> eeb8 0ae0 fsitos s0, s1 -0+158 <[^>]*> eeb8 0ac1 fsitos s0, s2 -0+15c <[^>]*> eeb8 0aef fsitos s0, s31 -0+160 <[^>]*> eef8 0ac0 fsitos s1, s0 -0+164 <[^>]*> eeb8 1ac0 fsitos s2, s0 -0+168 <[^>]*> eef8 fac0 fsitos s31, s0 -0+16c <[^>]*> eebd 0a60 ftosis s0, s1 -0+170 <[^>]*> eebd 0a41 ftosis s0, s2 -0+174 <[^>]*> eebd 0a6f ftosis s0, s31 -0+178 <[^>]*> eefd 0a40 ftosis s1, s0 -0+17c <[^>]*> eebd 1a40 ftosis s2, s0 -0+180 <[^>]*> eefd fa40 ftosis s31, s0 -0+184 <[^>]*> ee00 1a10 fmsr s0, r1 -0+188 <[^>]*> ee00 7a10 fmsr s0, r7 -0+18c <[^>]*> ee00 ea10 fmsr s0, lr -0+190 <[^>]*> ee00 0a90 fmsr s1, r0 -0+194 <[^>]*> ee01 0a10 fmsr s2, r0 -0+198 <[^>]*> ee0f 0a90 fmsr s31, r0 -0+19c <[^>]*> ee0a 7a90 fmsr s21, r7 -0+1a0 <[^>]*> eee0 1a10 fmxr fpsid, r1 -0+1a4 <[^>]*> eee0 ea10 fmxr fpsid, lr -0+1a8 <[^>]*> ee10 0a90 fmrs r0, s1 -0+1ac <[^>]*> ee11 0a10 fmrs r0, s2 -0+1b0 <[^>]*> ee1f 0a90 fmrs r0, s31 -0+1b4 <[^>]*> ee10 1a10 fmrs r1, s0 -0+1b8 <[^>]*> ee10 7a10 fmrs r7, s0 -0+1bc <[^>]*> ee10 ea10 fmrs lr, s0 -0+1c0 <[^>]*> ee15 9a90 fmrs r9, s11 -0+1c4 <[^>]*> eef0 1a10 fmrx r1, fpsid -0+1c8 <[^>]*> eef0 ea10 fmrx lr, fpsid -0+1cc <[^>]*> ed91 0a00 flds s0, \[r1\] -0+1d0 <[^>]*> ed9e 0a00 flds s0, \[lr\] -0+1d4 <[^>]*> ed90 0a00 flds s0, \[r0\] -0+1d8 <[^>]*> ed90 0aff flds s0, \[r0, #1020\] -0+1dc <[^>]*> ed10 0aff flds s0, \[r0, #-1020\] -0+1e0 <[^>]*> edd0 0a00 flds s1, \[r0\] -0+1e4 <[^>]*> ed90 1a00 flds s2, \[r0\] -0+1e8 <[^>]*> edd0 fa00 flds s31, \[r0\] -0+1ec <[^>]*> edcc aac9 fsts s21, \[ip, #804\] -0+1f0 <[^>]*> ecd0 0a01 fldmias r0, {s1} -0+1f4 <[^>]*> ec90 1a01 fldmias r0, {s2} -0+1f8 <[^>]*> ecd0 fa01 fldmias r0, {s31} -0+1fc <[^>]*> ec90 0a02 fldmias r0, {s0-s1} -0+200 <[^>]*> ec90 0a03 fldmias r0, {s0-s2} -0+204 <[^>]*> ec90 0a20 fldmias r0, {s0-s31} -0+208 <[^>]*> ecd0 0a1f fldmias r0, {s1-s31} -0+20c <[^>]*> ec90 1a1e fldmias r0, {s2-s31} -0+210 <[^>]*> ec90 fa02 fldmias r0, {s30-s31} -0+214 <[^>]*> ec91 0a01 fldmias r1, {s0} -0+218 <[^>]*> ec9e 0a01 fldmias lr, {s0} -0+21c <[^>]*> ec80 1b03 fstmiax r0, {d1} -0+220 <[^>]*> ec80 2b03 fstmiax r0, {d2} -0+224 <[^>]*> ec80 fb03 fstmiax r0, {d15} -0+228 <[^>]*> ec80 0b05 fstmiax r0, {d0-d1} -0+22c <[^>]*> ec80 0b07 fstmiax r0, {d0-d2} -0+230 <[^>]*> ec80 0b21 fstmiax r0, {d0-d15} -0+234 <[^>]*> ec80 1b1f fstmiax r0, {d1-d15} -0+238 <[^>]*> ec80 2b1d fstmiax r0, {d2-d15} -0+23c <[^>]*> ec80 eb05 fstmiax r0, {d14-d15} -0+240 <[^>]*> ec81 0b03 fstmiax r1, {d0} -0+244 <[^>]*> ec8e 0b03 fstmiax lr, {d0} -0+248 <[^>]*> eeb5 0a40 fcmpzs s0 -0+24c <[^>]*> eef5 0a40 fcmpzs s1 -0+250 <[^>]*> eeb5 1a40 fcmpzs s2 -0+254 <[^>]*> eef5 1a40 fcmpzs s3 -0+258 <[^>]*> eeb5 2a40 fcmpzs s4 -0+25c <[^>]*> eef5 2a40 fcmpzs s5 -0+260 <[^>]*> eeb5 3a40 fcmpzs s6 -0+264 <[^>]*> eef5 3a40 fcmpzs s7 -0+268 <[^>]*> eeb5 4a40 fcmpzs s8 -0+26c <[^>]*> eef5 4a40 fcmpzs s9 -0+270 <[^>]*> eeb5 5a40 fcmpzs s10 -0+274 <[^>]*> eef5 5a40 fcmpzs s11 -0+278 <[^>]*> eeb5 6a40 fcmpzs s12 -0+27c <[^>]*> eef5 6a40 fcmpzs s13 -0+280 <[^>]*> eeb5 7a40 fcmpzs s14 -0+284 <[^>]*> eef5 7a40 fcmpzs s15 -0+288 <[^>]*> eeb5 8a40 fcmpzs s16 -0+28c <[^>]*> eef5 8a40 fcmpzs s17 -0+290 <[^>]*> eeb5 9a40 fcmpzs s18 -0+294 <[^>]*> eef5 9a40 fcmpzs s19 -0+298 <[^>]*> eeb5 aa40 fcmpzs s20 -0+29c <[^>]*> eef5 aa40 fcmpzs s21 -0+2a0 <[^>]*> eeb5 ba40 fcmpzs s22 -0+2a4 <[^>]*> eef5 ba40 fcmpzs s23 -0+2a8 <[^>]*> eeb5 ca40 fcmpzs s24 -0+2ac <[^>]*> eef5 ca40 fcmpzs s25 -0+2b0 <[^>]*> eeb5 da40 fcmpzs s26 -0+2b4 <[^>]*> eef5 da40 fcmpzs s27 -0+2b8 <[^>]*> eeb5 ea40 fcmpzs s28 -0+2bc <[^>]*> eef5 ea40 fcmpzs s29 -0+2c0 <[^>]*> eeb5 fa40 fcmpzs s30 -0+2c4 <[^>]*> eef5 fa40 fcmpzs s31 +0+000 <[^>]*> eef1 fa10 (vmrs APSR_nzcv, fpscr|fmstat) +0+004 <[^>]*> eeb4 0ac0 (vcmpe\.f32|fcmpes) s0, s0 +0+008 <[^>]*> eeb5 0ac0 (vcmpe\.f32 s0, #0.0|fcmpezs s0) +0+00c <[^>]*> eeb4 0a40 (vcmp\.f32|fcmps) s0, s0 +0+010 <[^>]*> eeb5 0a40 (vcmp\.f32 s0, #0.0|fcmpzs s0) +0+014 <[^>]*> eeb0 0ac0 (vabs\.f32|fabss) s0, s0 +0+018 <[^>]*> eeb0 0a40 (vmov\.f32|fcpys) s0, s0 +0+01c <[^>]*> eeb1 0a40 (vneg\.f32|fnegs) s0, s0 +0+020 <[^>]*> eeb1 0ac0 (vsqrt\.f32|fsqrts) s0, s0 +0+024 <[^>]*> ee30 0a00 (vadd\.f32|fadds) s0, s0, s0 +0+028 <[^>]*> ee80 0a00 (vdiv\.f32|fdivs) s0, s0, s0 +0+02c <[^>]*> ee00 0a00 (vmla\.f32|fmacs) s0, s0, s0 +0+030 <[^>]*> ee10 0a00 (vnmls\.f32|fmscs) s0, s0, s0 +0+034 <[^>]*> ee20 0a00 (vmul\.f32|fmuls) s0, s0, s0 +0+038 <[^>]*> ee00 0a40 (vmls\.f32|fnmacs) s0, s0, s0 +0+03c <[^>]*> ee10 0a40 (vnmla\.f32|fnmscs) s0, s0, s0 +0+040 <[^>]*> ee20 0a40 (vnmul\.f32|fnmuls) s0, s0, s0 +0+044 <[^>]*> ee30 0a40 (vsub\.f32|fsubs) s0, s0, s0 +0+048 <[^>]*> ed90 0a00 (vldr|flds) s0, \[r0\] +0+04c <[^>]*> ed80 0a00 (vstr|fsts) s0, \[r0\] +0+050 <[^>]*> ec90 0a01 (vldmia|fldmias) r0, {s0} +0+054 <[^>]*> ec90 0a01 (vldmia|fldmias) r0, {s0} +0+058 <[^>]*> ecb0 0a01 (vldmia|fldmias) r0!, {s0} +0+05c <[^>]*> ecb0 0a01 (vldmia|fldmias) r0!, {s0} +0+060 <[^>]*> ed30 0a01 (vldmdb|fldmdbs) r0!, {s0} +0+064 <[^>]*> ed30 0a01 (vldmdb|fldmdbs) r0!, {s0} +0+068 <[^>]*> ec90 0b03 fldmiax r0, {d0}( ;@ Deprecated|) +0+06c <[^>]*> ec90 0b03 fldmiax r0, {d0}( ;@ Deprecated|) +0+070 <[^>]*> ecb0 0b03 fldmiax r0!, {d0}( ;@ Deprecated|) +0+074 <[^>]*> ecb0 0b03 fldmiax r0!, {d0}( ;@ Deprecated|) +0+078 <[^>]*> ed30 0b03 fldmdbx r0!, {d0}( ;@ Deprecated|) +0+07c <[^>]*> ed30 0b03 fldmdbx r0!, {d0}( ;@ Deprecated|) +0+080 <[^>]*> ec80 0a01 (vstmia|fstmias) r0, {s0} +0+084 <[^>]*> ec80 0a01 (vstmia|fstmias) r0, {s0} +0+088 <[^>]*> eca0 0a01 (vstmia|fstmias) r0!, {s0} +0+08c <[^>]*> eca0 0a01 (vstmia|fstmias) r0!, {s0} +0+090 <[^>]*> ed20 0a01 (vstmdb|fstmdbs) r0!, {s0} +0+094 <[^>]*> ed20 0a01 (vstmdb|fstmdbs) r0!, {s0} +0+098 <[^>]*> ec80 0b03 fstmiax r0, {d0}( ;@ Deprecated|) +0+09c <[^>]*> ec80 0b03 fstmiax r0, {d0}( ;@ Deprecated|) +0+0a0 <[^>]*> eca0 0b03 fstmiax r0!, {d0}( ;@ Deprecated|) +0+0a4 <[^>]*> eca0 0b03 fstmiax r0!, {d0}( ;@ Deprecated|) +0+0a8 <[^>]*> ed20 0b03 fstmdbx r0!, {d0}( ;@ Deprecated|) +0+0ac <[^>]*> ed20 0b03 fstmdbx r0!, {d0}( ;@ Deprecated|) +0+0b0 <[^>]*> eeb8 0ac0 (vcvt\.f32\.s32|fsitos) s0, s0 +0+0b4 <[^>]*> eeb8 0a40 (vcvt\.f32\.u32|fuitos) s0, s0 +0+0b8 <[^>]*> eebd 0a40 (vcvtr\.s32\.f32|ftosis) s0, s0 +0+0bc <[^>]*> eebd 0ac0 (vcvt\.s32\.f32|ftosizs) s0, s0 +0+0c0 <[^>]*> eebc 0a40 (vcvtr\.u32\.f32|ftouis) s0, s0 +0+0c4 <[^>]*> eebc 0ac0 (vcvt\.u32\.f32|ftouizs) s0, s0 +0+0c8 <[^>]*> ee10 0a10 (vmov|fmrs) r0, s0 +0+0cc <[^>]*> eef0 0a10 (vmrs|fmrx) r0, fpsid +0+0d0 <[^>]*> eef1 0a10 (vmrs|fmrx) r0, fpscr +0+0d4 <[^>]*> eef8 0a10 (vmrs|fmrx) r0, fpexc +0+0d8 <[^>]*> ee00 0a10 (vmov|fmsr) s0, r0 +0+0dc <[^>]*> eee0 0a10 (vmsr|fmxr) fpsid, r0 +0+0e0 <[^>]*> eee1 0a10 (vmsr|fmxr) fpscr, r0 +0+0e4 <[^>]*> eee8 0a10 (vmsr|fmxr) fpexc, r0 +0+0e8 <[^>]*> eef5 0a40 (vcmp\.f32 s1, #0.0|fcmpzs s1) +0+0ec <[^>]*> eeb5 1a40 (vcmp\.f32 s2, #0.0|fcmpzs s2) +0+0f0 <[^>]*> eef5 fa40 (vcmp\.f32 s31, #0.0|fcmpzs s31) +0+0f4 <[^>]*> eeb4 0a60 (vcmp\.f32|fcmps) s0, s1 +0+0f8 <[^>]*> eeb4 0a41 (vcmp\.f32|fcmps) s0, s2 +0+0fc <[^>]*> eeb4 0a6f (vcmp\.f32|fcmps) s0, s31 +0+100 <[^>]*> eef4 0a40 (vcmp\.f32|fcmps) s1, s0 +0+104 <[^>]*> eeb4 1a40 (vcmp\.f32|fcmps) s2, s0 +0+108 <[^>]*> eef4 fa40 (vcmp\.f32|fcmps) s31, s0 +0+10c <[^>]*> eef4 aa46 (vcmp\.f32|fcmps) s21, s12 +0+110 <[^>]*> eeb1 0a60 (vneg\.f32|fnegs) s0, s1 +0+114 <[^>]*> eeb1 0a41 (vneg\.f32|fnegs) s0, s2 +0+118 <[^>]*> eeb1 0a6f (vneg\.f32|fnegs) s0, s31 +0+11c <[^>]*> eef1 0a40 (vneg\.f32|fnegs) s1, s0 +0+120 <[^>]*> eeb1 1a40 (vneg\.f32|fnegs) s2, s0 +0+124 <[^>]*> eef1 fa40 (vneg\.f32|fnegs) s31, s0 +0+128 <[^>]*> eeb1 6a6a (vneg\.f32|fnegs) s12, s21 +0+12c <[^>]*> ee30 0a20 (vadd\.f32|fadds) s0, s0, s1 +0+130 <[^>]*> ee30 0a01 (vadd\.f32|fadds) s0, s0, s2 +0+134 <[^>]*> ee30 0a2f (vadd\.f32|fadds) s0, s0, s31 +0+138 <[^>]*> ee30 0a80 (vadd\.f32|fadds) s0, s1, s0 +0+13c <[^>]*> ee31 0a00 (vadd\.f32|fadds) s0, s2, s0 +0+140 <[^>]*> ee3f 0a80 (vadd\.f32|fadds) s0, s31, s0 +0+144 <[^>]*> ee70 0a00 (vadd\.f32|fadds) s1, s0, s0 +0+148 <[^>]*> ee30 1a00 (vadd\.f32|fadds) s2, s0, s0 +0+14c <[^>]*> ee70 fa00 (vadd\.f32|fadds) s31, s0, s0 +0+150 <[^>]*> ee3a 6aa2 (vadd\.f32|fadds) s12, s21, s5 +0+154 <[^>]*> eeb8 0ae0 (vcvt\.f32\.s32|fsitos) s0, s1 +0+158 <[^>]*> eeb8 0ac1 (vcvt\.f32\.s32|fsitos) s0, s2 +0+15c <[^>]*> eeb8 0aef (vcvt\.f32\.s32|fsitos) s0, s31 +0+160 <[^>]*> eef8 0ac0 (vcvt\.f32\.s32|fsitos) s1, s0 +0+164 <[^>]*> eeb8 1ac0 (vcvt\.f32\.s32|fsitos) s2, s0 +0+168 <[^>]*> eef8 fac0 (vcvt\.f32\.s32|fsitos) s31, s0 +0+16c <[^>]*> eebd 0a60 (vcvtr\.s32\.f32|ftosis) s0, s1 +0+170 <[^>]*> eebd 0a41 (vcvtr\.s32\.f32|ftosis) s0, s2 +0+174 <[^>]*> eebd 0a6f (vcvtr\.s32\.f32|ftosis) s0, s31 +0+178 <[^>]*> eefd 0a40 (vcvtr\.s32\.f32|ftosis) s1, s0 +0+17c <[^>]*> eebd 1a40 (vcvtr\.s32\.f32|ftosis) s2, s0 +0+180 <[^>]*> eefd fa40 (vcvtr\.s32\.f32|ftosis) s31, s0 +0+184 <[^>]*> ee00 1a10 (vmov|fmsr) s0, r1 +0+188 <[^>]*> ee00 7a10 (vmov|fmsr) s0, r7 +0+18c <[^>]*> ee00 ea10 (vmov|fmsr) s0, lr +0+190 <[^>]*> ee00 0a90 (vmov|fmsr) s1, r0 +0+194 <[^>]*> ee01 0a10 (vmov|fmsr) s2, r0 +0+198 <[^>]*> ee0f 0a90 (vmov|fmsr) s31, r0 +0+19c <[^>]*> ee0a 7a90 (vmov|fmsr) s21, r7 +0+1a0 <[^>]*> eee0 1a10 (vmsr|fmxr) fpsid, r1 +0+1a4 <[^>]*> eee0 ea10 (vmsr|fmxr) fpsid, lr +0+1a8 <[^>]*> ee10 0a90 (vmov|fmrs) r0, s1 +0+1ac <[^>]*> ee11 0a10 (vmov|fmrs) r0, s2 +0+1b0 <[^>]*> ee1f 0a90 (vmov|fmrs) r0, s31 +0+1b4 <[^>]*> ee10 1a10 (vmov|fmrs) r1, s0 +0+1b8 <[^>]*> ee10 7a10 (vmov|fmrs) r7, s0 +0+1bc <[^>]*> ee10 ea10 (vmov|fmrs) lr, s0 +0+1c0 <[^>]*> ee15 9a90 (vmov|fmrs) r9, s11 +0+1c4 <[^>]*> eef0 1a10 (vmrs|fmrx) r1, fpsid +0+1c8 <[^>]*> eef0 ea10 (vmrs|fmrx) lr, fpsid +0+1cc <[^>]*> ed91 0a00 (vldr|flds) s0, \[r1\] +0+1d0 <[^>]*> ed9e 0a00 (vldr|flds) s0, \[lr\] +0+1d4 <[^>]*> ed90 0a00 (vldr|flds) s0, \[r0\] +0+1d8 <[^>]*> ed90 0aff (vldr|flds) s0, \[r0, #1020\] +0+1dc <[^>]*> ed10 0aff (vldr|flds) s0, \[r0, #-1020\] +0+1e0 <[^>]*> edd0 0a00 (vldr|flds) s1, \[r0\] +0+1e4 <[^>]*> ed90 1a00 (vldr|flds) s2, \[r0\] +0+1e8 <[^>]*> edd0 fa00 (vldr|flds) s31, \[r0\] +0+1ec <[^>]*> edcc aac9 (vstr|fsts) s21, \[ip, #804\] +0+1f0 <[^>]*> ecd0 0a01 (vldmia|fldmias) r0, {s1} +0+1f4 <[^>]*> ec90 1a01 (vldmia|fldmias) r0, {s2} +0+1f8 <[^>]*> ecd0 fa01 (vldmia|fldmias) r0, {s31} +0+1fc <[^>]*> ec90 0a02 (vldmia|fldmias) r0, {s0-s1} +0+200 <[^>]*> ec90 0a03 (vldmia|fldmias) r0, {s0-s2} +0+204 <[^>]*> ec90 0a20 (vldmia|fldmias) r0, {s0-s31} +0+208 <[^>]*> ecd0 0a1f (vldmia|fldmias) r0, {s1-s31} +0+20c <[^>]*> ec90 1a1e (vldmia|fldmias) r0, {s2-s31} +0+210 <[^>]*> ec90 fa02 (vldmia|fldmias) r0, {s30-s31} +0+214 <[^>]*> ec91 0a01 (vldmia|fldmias) r1, {s0} +0+218 <[^>]*> ec9e 0a01 (vldmia|fldmias) lr, {s0} +0+21c <[^>]*> ec80 1b03 fstmiax r0, {d1}( ;@ Deprecated|) +0+220 <[^>]*> ec80 2b03 fstmiax r0, {d2}( ;@ Deprecated|) +0+224 <[^>]*> ec80 fb03 fstmiax r0, {d15}( ;@ Deprecated|) +0+228 <[^>]*> ec80 0b05 fstmiax r0, {d0-d1}( ;@ Deprecated|) +0+22c <[^>]*> ec80 0b07 fstmiax r0, {d0-d2}( ;@ Deprecated|) +0+230 <[^>]*> ec80 0b21 fstmiax r0, {d0-d15}( ;@ Deprecated|) +0+234 <[^>]*> ec80 1b1f fstmiax r0, {d1-d15}( ;@ Deprecated|) +0+238 <[^>]*> ec80 2b1d fstmiax r0, {d2-d15}( ;@ Deprecated|) +0+23c <[^>]*> ec80 eb05 fstmiax r0, {d14-d15}( ;@ Deprecated|) +0+240 <[^>]*> ec81 0b03 fstmiax r1, {d0}( ;@ Deprecated|) +0+244 <[^>]*> ec8e 0b03 fstmiax lr, {d0}( ;@ Deprecated|) +0+248 <[^>]*> eeb5 0a40 (vcmp\.f32 s0, #0.0|fcmpzs s0) +0+24c <[^>]*> eef5 0a40 (vcmp\.f32 s1, #0.0|fcmpzs s1) +0+250 <[^>]*> eeb5 1a40 (vcmp\.f32 s2, #0.0|fcmpzs s2) +0+254 <[^>]*> eef5 1a40 (vcmp\.f32 s3, #0.0|fcmpzs s3) +0+258 <[^>]*> eeb5 2a40 (vcmp\.f32 s4, #0.0|fcmpzs s4) +0+25c <[^>]*> eef5 2a40 (vcmp\.f32 s5, #0.0|fcmpzs s5) +0+260 <[^>]*> eeb5 3a40 (vcmp\.f32 s6, #0.0|fcmpzs s6) +0+264 <[^>]*> eef5 3a40 (vcmp\.f32 s7, #0.0|fcmpzs s7) +0+268 <[^>]*> eeb5 4a40 (vcmp\.f32 s8, #0.0|fcmpzs s8) +0+26c <[^>]*> eef5 4a40 (vcmp\.f32 s9, #0.0|fcmpzs s9) +0+270 <[^>]*> eeb5 5a40 (vcmp\.f32 s10, #0.0|fcmpzs s10) +0+274 <[^>]*> eef5 5a40 (vcmp\.f32 s11, #0.0|fcmpzs s11) +0+278 <[^>]*> eeb5 6a40 (vcmp\.f32 s12, #0.0|fcmpzs s12) +0+27c <[^>]*> eef5 6a40 (vcmp\.f32 s13, #0.0|fcmpzs s13) +0+280 <[^>]*> eeb5 7a40 (vcmp\.f32 s14, #0.0|fcmpzs s14) +0+284 <[^>]*> eef5 7a40 (vcmp\.f32 s15, #0.0|fcmpzs s15) +0+288 <[^>]*> eeb5 8a40 (vcmp\.f32 s16, #0.0|fcmpzs s16) +0+28c <[^>]*> eef5 8a40 (vcmp\.f32 s17, #0.0|fcmpzs s17) +0+290 <[^>]*> eeb5 9a40 (vcmp\.f32 s18, #0.0|fcmpzs s18) +0+294 <[^>]*> eef5 9a40 (vcmp\.f32 s19, #0.0|fcmpzs s19) +0+298 <[^>]*> eeb5 aa40 (vcmp\.f32 s20, #0.0|fcmpzs s20) +0+29c <[^>]*> eef5 aa40 (vcmp\.f32 s21, #0.0|fcmpzs s21) +0+2a0 <[^>]*> eeb5 ba40 (vcmp\.f32 s22, #0.0|fcmpzs s22) +0+2a4 <[^>]*> eef5 ba40 (vcmp\.f32 s23, #0.0|fcmpzs s23) +0+2a8 <[^>]*> eeb5 ca40 (vcmp\.f32 s24, #0.0|fcmpzs s24) +0+2ac <[^>]*> eef5 ca40 (vcmp\.f32 s25, #0.0|fcmpzs s25) +0+2b0 <[^>]*> eeb5 da40 (vcmp\.f32 s26, #0.0|fcmpzs s26) +0+2b4 <[^>]*> eef5 da40 (vcmp\.f32 s27, #0.0|fcmpzs s27) +0+2b8 <[^>]*> eeb5 ea40 (vcmp\.f32 s28, #0.0|fcmpzs s28) +0+2bc <[^>]*> eef5 ea40 (vcmp\.f32 s29, #0.0|fcmpzs s29) +0+2c0 <[^>]*> eeb5 fa40 (vcmp\.f32 s30, #0.0|fcmpzs s30) +0+2c4 <[^>]*> eef5 fa40 (vcmp\.f32 s31, #0.0|fcmpzs s31) 0+2c8 <[^>]*> bf01 itttt eq -0+2ca <[^>]*> eef1 fa10 fmstateq -0+2ce <[^>]*> eef4 1ae3 fcmpeseq s3, s7 -0+2d2 <[^>]*> eef5 2ac0 fcmpezseq s5 -0+2d6 <[^>]*> eef4 0a41 fcmpseq s1, s2 +0+2ca <[^>]*> eef1 fa10 (vmrseq APSR_nzcv, fpscr|fmstateq) +0+2ce <[^>]*> eef4 1ae3 (vcmpeeq\.f32|fcmpeseq) s3, s7 +0+2d2 <[^>]*> eef5 2ac0 (vcmpeeq\.f32 s5, #0.0|fcmpezseq s5) +0+2d6 <[^>]*> eef4 0a41 (vcmpeq\.f32|fcmpseq) s1, s2 0+2da <[^>]*> bf01 itttt eq -0+2dc <[^>]*> eef5 0a40 fcmpzseq s1 -0+2e0 <[^>]*> eef0 0ae1 fabsseq s1, s3 -0+2e4 <[^>]*> eef0 fa69 fcpyseq s31, s19 -0+2e8 <[^>]*> eeb1 aa44 fnegseq s20, s8 +0+2dc <[^>]*> eef5 0a40 (vcmpeq\.f32 s1, #0.0|fcmpzseq s1) +0+2e0 <[^>]*> eef0 0ae1 (vabseq\.f32|fabsseq) s1, s3 +0+2e4 <[^>]*> eef0 fa69 (vmoveq\.f32|fcpyseq) s31, s19 +0+2e8 <[^>]*> eeb1 aa44 (vnegeq\.f32|fnegseq) s20, s8 0+2ec <[^>]*> bf01 itttt eq -0+2ee <[^>]*> eef1 2ae3 fsqrtseq s5, s7 -0+2f2 <[^>]*> ee32 3a82 faddseq s6, s5, s4 -0+2f6 <[^>]*> eec1 1a20 fdivseq s3, s2, s1 -0+2fa <[^>]*> ee4f fa2e fmacseq s31, s30, s29 +0+2ee <[^>]*> eef1 2ae3 (vsqrteq\.f32|fsqrtseq) s5, s7 +0+2f2 <[^>]*> ee32 3a82 (vaddeq\.f32|faddseq) s6, s5, s4 +0+2f6 <[^>]*> eec1 1a20 (vdiveq\.f32|fdivseq) s3, s2, s1 +0+2fa <[^>]*> ee4f fa2e (vmlaeq\.f32|fmacseq) s31, s30, s29 0+2fe <[^>]*> bf01 itttt eq -0+300 <[^>]*> ee1d ea8d fmscseq s28, s27, s26 -0+304 <[^>]*> ee6c ca2b fmulseq s25, s24, s23 -0+308 <[^>]*> ee0a baca fnmacseq s22, s21, s20 -0+30c <[^>]*> ee59 9a68 fnmscseq s19, s18, s17 +0+300 <[^>]*> ee1d ea8d (vnmlseq\.f32|fmscseq) s28, s27, s26 +0+304 <[^>]*> ee6c ca2b (vmuleq\.f32|fmulseq) s25, s24, s23 +0+308 <[^>]*> ee0a baca (vmlseq\.f32|fnmacseq) s22, s21, s20 +0+30c <[^>]*> ee59 9a68 (vnmlaeq\.f32|fnmscseq) s19, s18, s17 0+310 <[^>]*> bf01 itttt eq -0+312 <[^>]*> ee27 8ac7 fnmulseq s16, s15, s14 -0+316 <[^>]*> ee76 6a65 fsubseq s13, s12, s11 -0+31a <[^>]*> ed98 5a00 fldseq s10, \[r8\] -0+31e <[^>]*> edc7 4a00 fstseq s9, \[r7\] +0+312 <[^>]*> ee27 8ac7 (vnmuleq\.f32|fnmulseq) s16, s15, s14 +0+316 <[^>]*> ee76 6a65 (vsubeq\.f32|fsubseq) s13, s12, s11 +0+31a <[^>]*> ed98 5a00 (vldreq|fldseq) s10, \[r8\] +0+31e <[^>]*> edc7 4a00 (vstreq|fstseq) s9, \[r7\] 0+322 <[^>]*> bf01 itttt eq -0+324 <[^>]*> ec91 4a01 fldmiaseq r1, {s8} -0+328 <[^>]*> ecd2 3a01 fldmiaseq r2, {s7} -0+32c <[^>]*> ecb3 3a01 fldmiaseq r3!, {s6} -0+330 <[^>]*> ecf4 2a01 fldmiaseq r4!, {s5} +0+324 <[^>]*> ec91 4a01 (vldmiaeq|fldmiaseq) r1, {s8} +0+328 <[^>]*> ecd2 3a01 (vldmiaeq|fldmiaseq) r2, {s7} +0+32c <[^>]*> ecb3 3a01 (vldmiaeq|fldmiaseq) r3!, {s6} +0+330 <[^>]*> ecf4 2a01 (vldmiaeq|fldmiaseq) r4!, {s5} 0+334 <[^>]*> bf01 itttt eq -0+336 <[^>]*> ed35 2a01 fldmdbseq r5!, {s4} -0+33a <[^>]*> ed76 1a01 fldmdbseq r6!, {s3} -0+33e <[^>]*> ec97 1b03 fldmiaxeq r7, {d1} -0+342 <[^>]*> ec98 2b03 fldmiaxeq r8, {d2} +0+336 <[^>]*> ed35 2a01 (vldmdbeq|fldmdbseq) r5!, {s4} +0+33a <[^>]*> ed76 1a01 (vldmdbeq|fldmdbseq) r6!, {s3} +0+33e <[^>]*> ec97 1b03 fldmiaxeq r7, {d1}( ;@ Deprecated|) +0+342 <[^>]*> ec98 2b03 fldmiaxeq r8, {d2}( ;@ Deprecated|) 0+346 <[^>]*> bf01 itttt eq -0+348 <[^>]*> ecb9 3b03 fldmiaxeq r9!, {d3} -0+34c <[^>]*> ecba 4b03 fldmiaxeq sl!, {d4} -0+350 <[^>]*> ed3b 5b03 fldmdbxeq fp!, {d5} -0+354 <[^>]*> ed3c 6b03 fldmdbxeq ip!, {d6} +0+348 <[^>]*> ecb9 3b03 fldmiaxeq r9!, {d3}( ;@ Deprecated|) +0+34c <[^>]*> ecba 4b03 fldmiaxeq sl!, {d4}( ;@ Deprecated|) +0+350 <[^>]*> ed3b 5b03 fldmdbxeq fp!, {d5}( ;@ Deprecated|) +0+354 <[^>]*> ed3c 6b03 fldmdbxeq ip!, {d6}( ;@ Deprecated|) 0+358 <[^>]*> bf01 itttt eq -0+35a <[^>]*> ec8d 1a01 fstmiaseq sp, {s2} -0+35e <[^>]*> ecce 0a01 fstmiaseq lr, {s1} -0+362 <[^>]*> ece1 fa01 fstmiaseq r1!, {s31} -0+366 <[^>]*> eca2 fa01 fstmiaseq r2!, {s30} +0+35a <[^>]*> ec8d 1a01 (vstmiaeq|fstmiaseq) sp, {s2} +0+35e <[^>]*> ecce 0a01 (vstmiaeq|fstmiaseq) lr, {s1} +0+362 <[^>]*> ece1 fa01 (vstmiaeq|fstmiaseq) r1!, {s31} +0+366 <[^>]*> eca2 fa01 (vstmiaeq|fstmiaseq) r2!, {s30} 0+36a <[^>]*> bf01 itttt eq -0+36c <[^>]*> ed63 ea01 fstmdbseq r3!, {s29} -0+370 <[^>]*> ed24 ea01 fstmdbseq r4!, {s28} -0+374 <[^>]*> ec85 7b03 fstmiaxeq r5, {d7} -0+378 <[^>]*> ec86 8b03 fstmiaxeq r6, {d8} +0+36c <[^>]*> ed63 ea01 (vstmdbeq|fstmdbseq) r3!, {s29} +0+370 <[^>]*> ed24 ea01 (vstmdbeq|fstmdbseq) r4!, {s28} +0+374 <[^>]*> ec85 7b03 fstmiaxeq r5, {d7}( ;@ Deprecated|) +0+378 <[^>]*> ec86 8b03 fstmiaxeq r6, {d8}( ;@ Deprecated|) 0+37c <[^>]*> bf01 itttt eq -0+37e <[^>]*> eca7 9b03 fstmiaxeq r7!, {d9} -0+382 <[^>]*> eca8 ab03 fstmiaxeq r8!, {d10} -0+386 <[^>]*> ed29 bb03 fstmdbxeq r9!, {d11} -0+38a <[^>]*> ed2a cb03 fstmdbxeq sl!, {d12} +0+37e <[^>]*> eca7 9b03 fstmiaxeq r7!, {d9}( ;@ Deprecated|) +0+382 <[^>]*> eca8 ab03 fstmiaxeq r8!, {d10}( ;@ Deprecated|) +0+386 <[^>]*> ed29 bb03 fstmdbxeq r9!, {d11}( ;@ Deprecated|) +0+38a <[^>]*> ed2a cb03 fstmdbxeq sl!, {d12}( ;@ Deprecated|) 0+38e <[^>]*> bf01 itttt eq -0+390 <[^>]*> eef8 dac3 fsitoseq s27, s6 -0+394 <[^>]*> eefd ca62 ftosiseq s25, s5 -0+398 <[^>]*> eefd bac2 ftosizseq s23, s4 -0+39c <[^>]*> eefc aa61 ftouiseq s21, s3 +0+390 <[^>]*> eef8 dac3 (vcvteq\.f32\.s32|fsitoseq) s27, s6 +0+394 <[^>]*> eefd ca62 (vcvtreq\.s32\.f32|ftosiseq) s25, s5 +0+398 <[^>]*> eefd bac2 (vcvteq\.s32\.f32|ftosizseq) s23, s4 +0+39c <[^>]*> eefc aa61 (vcvtreq\.u32\.f32|ftouiseq) s21, s3 0+3a0 <[^>]*> bf01 itttt eq -0+3a2 <[^>]*> eefc 9ac1 ftouizseq s19, s2 -0+3a6 <[^>]*> eef8 8a60 fuitoseq s17, s1 -0+3aa <[^>]*> ee11 ba90 fmrseq fp, s3 -0+3ae <[^>]*> eef0 9a10 fmrxeq r9, fpsid +0+3a2 <[^>]*> eefc 9ac1 (vcvteq\.u32\.f32|ftouizseq) s19, s2 +0+3a6 <[^>]*> eef8 8a60 (vcvteq\.f32\.u32|fuitoseq) s17, s1 +0+3aa <[^>]*> ee11 ba90 (vmoveq|fmrseq) fp, s3 +0+3ae <[^>]*> eef0 9a10 (vmrseq|fmrxeq) r9, fpsid 0+3b2 <[^>]*> bf04 itt eq -0+3b4 <[^>]*> ee01 9a90 fmsreq s3, r9 -0+3b8 <[^>]*> eee0 8a10 fmxreq fpsid, r8 -0+3bc <[^>]*> eef9 0a10 fmrx r0, fpinst @ Impl def -0+3c0 <[^>]*> eefa 0a10 fmrx r0, fpinst2 @ Impl def -0+3c4 <[^>]*> eef7 0a10 fmrx r0, mvfr0 -0+3c8 <[^>]*> eef6 0a10 fmrx r0, mvfr1 -0+3cc <[^>]*> eefc 0a10 fmrx r0, -0+3d0 <[^>]*> eee9 0a10 fmxr fpinst, r0 @ Impl def -0+3d4 <[^>]*> eeea 0a10 fmxr fpinst2, r0 @ Impl def -0+3d8 <[^>]*> eee7 0a10 fmxr mvfr0, r0 -0+3dc <[^>]*> eee6 0a10 fmxr mvfr1, r0 -0+3e0 <[^>]*> eeec 0a10 fmxr , r0 +0+3b4 <[^>]*> ee01 9a90 (vmoveq|fmsreq) s3, r9 +0+3b8 <[^>]*> eee0 8a10 (vmsreq|fmxreq) fpsid, r8 +0+3bc <[^>]*> eef9 0a10 (vmrs|fmrx) r0, fpinst @ Impl def +0+3c0 <[^>]*> eefa 0a10 (vmrs|fmrx) r0, fpinst2 @ Impl def +0+3c4 <[^>]*> eef7 0a10 (vmrs|fmrx) r0, mvfr0 +0+3c8 <[^>]*> eef6 0a10 (vmrs|fmrx) r0, mvfr1 +0+3cc <[^>]*> eefc 0a10 (vmrs|fmrx) r0, +0+3d0 <[^>]*> eee9 0a10 (vmsr|fmxr) fpinst, r0 @ Impl def +0+3d4 <[^>]*> eeea 0a10 (vmsr|fmxr) fpinst2, r0 @ Impl def +0+3d8 <[^>]*> eee7 0a10 (vmsr|fmxr) mvfr0, r0 +0+3dc <[^>]*> eee6 0a10 (vmsr|fmxr) mvfr1, r0 +0+3e0 <[^>]*> eeec 0a10 (vmsr|fmxr) , r0 0+3e4 <[^>]*> bf00 nop 0+3e6 <[^>]*> bf00 nop 0+3e8 <[^>]*> bf00 nop diff --git a/gas/testsuite/gas/arm/vfp2.d b/gas/testsuite/gas/arm/vfp2.d index 438019fc12e..6dc6d076cc3 100644 --- a/gas/testsuite/gas/arm/vfp2.d +++ b/gas/testsuite/gas/arm/vfp2.d @@ -9,9 +9,9 @@ Disassembly of section .text: 0+000 <[^>]*> ec4a5b10 vmov d0, r5, sl 0+004 <[^>]*> ec5a5b10 vmov r5, sl, d0 -0+008 <[^>]*> ec4a5a37 fmsrr {s15, s16}, r5, sl -0+00c <[^>]*> ec5a5a37 fmrrs r5, sl, {s15, s16} +0+008 <[^>]*> ec4a5a37 (vmov s15, s16, r5, sl|fmsrr {s15, s16}, r5, sl) +0+00c <[^>]*> ec5a5a37 (vmov r5, sl, s15, s16|fmrrs r5, sl, {s15, s16}) 0+010 <[^>]*> ec45ab1f vmov d15, sl, r5 0+014 <[^>]*> ec55ab1f vmov sl, r5, d15 -0+018 <[^>]*> ec45aa38 fmsrr {s17, s18}, sl, r5 -0+01c <[^>]*> ec55aa38 fmrrs sl, r5, {s17, s18} +0+018 <[^>]*> ec45aa38 (vmov s17, s18, sl, r5|fmsrr {s17, s18}, sl, r5) +0+01c <[^>]*> ec55aa38 (vmov sl, r5, s17, s18|fmrrs sl, r5, {s17, s18}) diff --git a/gas/testsuite/gas/arm/vfp2_t2.d b/gas/testsuite/gas/arm/vfp2_t2.d index f07b6a58bcb..50483b09dea 100644 --- a/gas/testsuite/gas/arm/vfp2_t2.d +++ b/gas/testsuite/gas/arm/vfp2_t2.d @@ -9,9 +9,9 @@ Disassembly of section .text: 0+000 <[^>]*> ec4a 5b10 vmov d0, r5, sl 0+004 <[^>]*> ec5a 5b10 vmov r5, sl, d0 -0+008 <[^>]*> ec4a 5a37 fmsrr {s15, s16}, r5, sl -0+00c <[^>]*> ec5a 5a37 fmrrs r5, sl, {s15, s16} +0+008 <[^>]*> ec4a 5a37 (vmov s15, s16, r5, sl|fmsrr {s15, s16}, r5, sl) +0+00c <[^>]*> ec5a 5a37 (vmov r5, sl, s15, s16|fmrrs r5, sl, {s15, s16}) 0+010 <[^>]*> ec45 ab1f vmov d15, sl, r5 0+014 <[^>]*> ec55 ab1f vmov sl, r5, d15 -0+018 <[^>]*> ec45 aa38 fmsrr {s17, s18}, sl, r5 -0+01c <[^>]*> ec55 aa38 fmrrs sl, r5, {s17, s18} +0+018 <[^>]*> ec45 aa38 (vmov s17, s18, sl, r5|fmsrr {s17, s18}, sl, r5) +0+01c <[^>]*> ec55 aa38 (vmov sl, r5, s17, s18|fmrrs sl, r5, {s17, s18}) diff --git a/gas/testsuite/gas/arm/vfpv3-32drs.d b/gas/testsuite/gas/arm/vfpv3-32drs.d index f42c373f4c3..1f67f0299ef 100644 --- a/gas/testsuite/gas/arm/vfpv3-32drs.d +++ b/gas/testsuite/gas/arm/vfpv3-32drs.d @@ -5,69 +5,69 @@ .*: +file format .*arm.* Disassembly of section \.text: -0[0-9a-f]+ <[^>]+> eeb03b66 fcpyd d3, d22 -0[0-9a-f]+ <[^>]+> eef06b43 fcpyd d22, d3 -0[0-9a-f]+ <[^>]+> eef76acb fcvtds d22, s22 -0[0-9a-f]+ <[^>]+> eeb7bbe6 fcvtsd s22, d22 +0[0-9a-f]+ <[^>]+> eeb03b66 (vmov\.f64|fcpyd) d3, d22 +0[0-9a-f]+ <[^>]+> eef06b43 (vmov\.f64|fcpyd) d22, d3 +0[0-9a-f]+ <[^>]+> eef76acb (vcvt\.f64\.f32|fcvtds) d22, s22 +0[0-9a-f]+ <[^>]+> eeb7bbe6 (vcvt\.f32\.f64|fcvtsd) s22, d22 0[0-9a-f]+ <[^>]+> ee254b90 vmov\.32 d21\[1\], r4 0[0-9a-f]+ <[^>]+> ee0b5b90 vmov\.32 d27\[0\], r5 0[0-9a-f]+ <[^>]+> ee376b90 vmov\.32 r6, d23\[1\] 0[0-9a-f]+ <[^>]+> ee197b90 vmov\.32 r7, d25\[0\] -0[0-9a-f]+ <[^>]+> eef86bcb fsitod d22, s22 -0[0-9a-f]+ <[^>]+> eef85b6a fuitod d21, s21 -0[0-9a-f]+ <[^>]+> eebdab64 ftosid s20, d20 -0[0-9a-f]+ <[^>]+> eebdabe4 ftosizd s20, d20 -0[0-9a-f]+ <[^>]+> eefc9b63 ftouid s19, d19 -0[0-9a-f]+ <[^>]+> eefc9be3 ftouizd s19, d19 +0[0-9a-f]+ <[^>]+> eef86bcb (vcvt\.f64\.s32|fsitod) d22, s22 +0[0-9a-f]+ <[^>]+> eef85b6a (vcvt\.f64\.u32|fuitod) d21, s21 +0[0-9a-f]+ <[^>]+> eebdab64 (vcvtr\.s32\.f64|ftosid) s20, d20 +0[0-9a-f]+ <[^>]+> eebdabe4 (vcvt\.s32\.f64|ftosizd) s20, d20 +0[0-9a-f]+ <[^>]+> eefc9b63 (vcvtr\.u32\.f64|ftouid) s19, d19 +0[0-9a-f]+ <[^>]+> eefc9be3 (vcvt\.u32\.f64|ftouizd) s19, d19 0[0-9a-f]+ <[^>]+> edda3b01 vldr d19, \[sl, #4\] 0[0-9a-f]+ <[^>]+> edca5b01 vstr d21, \[sl, #4\] 0[0-9a-f]+ <[^>]+> ecba5b04 vldmia sl!, {d5-d6} 0[0-9a-f]+ <[^>]+> ecfa2b06 vldmia sl!, {d18-d20} -0[0-9a-f]+ <[^>]+> ecba5b05 fldmiax sl!, {d5-d6} -0[0-9a-f]+ <[^>]+> ecfa2b07 fldmiax sl!, {d18-d20} -0[0-9a-f]+ <[^>]+> ed7a2b05 fldmdbx sl!, {d18-d19} +0[0-9a-f]+ <[^>]+> ecba5b05 fldmiax sl!, {d5-d6}( ;@ Deprecated|) +0[0-9a-f]+ <[^>]+> ecfa2b07 fldmiax sl!, {d18-d20}( ;@ Deprecated|) +0[0-9a-f]+ <[^>]+> ed7a2b05 fldmdbx sl!, {d18-d19}( ;@ Deprecated|) 0[0-9a-f]+ <[^>]+> ecc94b0a vstmia r9, {d20-d24} -0[0-9a-f]+ <[^>]+> eeb03bc5 fabsd d3, d5 -0[0-9a-f]+ <[^>]+> eeb0cbe2 fabsd d12, d18 -0[0-9a-f]+ <[^>]+> eef02be3 fabsd d18, d19 -0[0-9a-f]+ <[^>]+> eeb13b45 fnegd d3, d5 -0[0-9a-f]+ <[^>]+> eeb1cb62 fnegd d12, d18 -0[0-9a-f]+ <[^>]+> eef12b63 fnegd d18, d19 -0[0-9a-f]+ <[^>]+> eeb13bc5 fsqrtd d3, d5 -0[0-9a-f]+ <[^>]+> eeb1cbe2 fsqrtd d12, d18 -0[0-9a-f]+ <[^>]+> eef12be3 fsqrtd d18, d19 -0[0-9a-f]+ <[^>]+> ee353b06 faddd d3, d5, d6 -0[0-9a-f]+ <[^>]+> ee32cb84 faddd d12, d18, d4 -0[0-9a-f]+ <[^>]+> ee732ba4 faddd d18, d19, d20 -0[0-9a-f]+ <[^>]+> ee353b46 fsubd d3, d5, d6 -0[0-9a-f]+ <[^>]+> ee32cbc4 fsubd d12, d18, d4 -0[0-9a-f]+ <[^>]+> ee732be4 fsubd d18, d19, d20 -0[0-9a-f]+ <[^>]+> ee253b06 fmuld d3, d5, d6 -0[0-9a-f]+ <[^>]+> ee22cb84 fmuld d12, d18, d4 -0[0-9a-f]+ <[^>]+> ee632ba4 fmuld d18, d19, d20 -0[0-9a-f]+ <[^>]+> ee853b06 fdivd d3, d5, d6 -0[0-9a-f]+ <[^>]+> ee82cb84 fdivd d12, d18, d4 -0[0-9a-f]+ <[^>]+> eec32ba4 fdivd d18, d19, d20 -0[0-9a-f]+ <[^>]+> ee053b06 fmacd d3, d5, d6 -0[0-9a-f]+ <[^>]+> ee02cb84 fmacd d12, d18, d4 -0[0-9a-f]+ <[^>]+> ee432ba4 fmacd d18, d19, d20 -0[0-9a-f]+ <[^>]+> ee153b06 fmscd d3, d5, d6 -0[0-9a-f]+ <[^>]+> ee12cb84 fmscd d12, d18, d4 -0[0-9a-f]+ <[^>]+> ee532ba4 fmscd d18, d19, d20 -0[0-9a-f]+ <[^>]+> ee253b46 fnmuld d3, d5, d6 -0[0-9a-f]+ <[^>]+> ee22cbc4 fnmuld d12, d18, d4 -0[0-9a-f]+ <[^>]+> ee632be4 fnmuld d18, d19, d20 -0[0-9a-f]+ <[^>]+> ee053b46 fnmacd d3, d5, d6 -0[0-9a-f]+ <[^>]+> ee02cbc4 fnmacd d12, d18, d4 -0[0-9a-f]+ <[^>]+> ee432be4 fnmacd d18, d19, d20 -0[0-9a-f]+ <[^>]+> ee153b46 fnmscd d3, d5, d6 -0[0-9a-f]+ <[^>]+> ee12cbc4 fnmscd d12, d18, d4 -0[0-9a-f]+ <[^>]+> ee532be4 fnmscd d18, d19, d20 -0[0-9a-f]+ <[^>]+> eeb43b62 fcmpd d3, d18 -0[0-9a-f]+ <[^>]+> eef42b43 fcmpd d18, d3 -0[0-9a-f]+ <[^>]+> eef53b40 fcmpzd d19 -0[0-9a-f]+ <[^>]+> eeb43be2 fcmped d3, d18 -0[0-9a-f]+ <[^>]+> eef42bc3 fcmped d18, d3 -0[0-9a-f]+ <[^>]+> eef53bc0 fcmpezd d19 +0[0-9a-f]+ <[^>]+> eeb03bc5 (vabs\.f64|fabsd) d3, d5 +0[0-9a-f]+ <[^>]+> eeb0cbe2 (vabs\.f64|fabsd) d12, d18 +0[0-9a-f]+ <[^>]+> eef02be3 (vabs\.f64|fabsd) d18, d19 +0[0-9a-f]+ <[^>]+> eeb13b45 (vneg\.f64|fnegd) d3, d5 +0[0-9a-f]+ <[^>]+> eeb1cb62 (vneg\.f64|fnegd) d12, d18 +0[0-9a-f]+ <[^>]+> eef12b63 (vneg\.f64|fnegd) d18, d19 +0[0-9a-f]+ <[^>]+> eeb13bc5 (vsqrt\.f64|fsqrtd) d3, d5 +0[0-9a-f]+ <[^>]+> eeb1cbe2 (vsqrt\.f64|fsqrtd) d12, d18 +0[0-9a-f]+ <[^>]+> eef12be3 (vsqrt\.f64|fsqrtd) d18, d19 +0[0-9a-f]+ <[^>]+> ee353b06 (vadd\.f64|faddd) d3, d5, d6 +0[0-9a-f]+ <[^>]+> ee32cb84 (vadd\.f64|faddd) d12, d18, d4 +0[0-9a-f]+ <[^>]+> ee732ba4 (vadd\.f64|faddd) d18, d19, d20 +0[0-9a-f]+ <[^>]+> ee353b46 (vsub\.f64|fsubd) d3, d5, d6 +0[0-9a-f]+ <[^>]+> ee32cbc4 (vsub\.f64|fsubd) d12, d18, d4 +0[0-9a-f]+ <[^>]+> ee732be4 (vsub\.f64|fsubd) d18, d19, d20 +0[0-9a-f]+ <[^>]+> ee253b06 (vmul\.f64|fmuld) d3, d5, d6 +0[0-9a-f]+ <[^>]+> ee22cb84 (vmul\.f64|fmuld) d12, d18, d4 +0[0-9a-f]+ <[^>]+> ee632ba4 (vmul\.f64|fmuld) d18, d19, d20 +0[0-9a-f]+ <[^>]+> ee853b06 (vdiv\.f64|fdivd) d3, d5, d6 +0[0-9a-f]+ <[^>]+> ee82cb84 (vdiv\.f64|fdivd) d12, d18, d4 +0[0-9a-f]+ <[^>]+> eec32ba4 (vdiv\.f64|fdivd) d18, d19, d20 +0[0-9a-f]+ <[^>]+> ee053b06 (vmla\.f64|fmacd) d3, d5, d6 +0[0-9a-f]+ <[^>]+> ee02cb84 (vmla\.f64|fmacd) d12, d18, d4 +0[0-9a-f]+ <[^>]+> ee432ba4 (vmla\.f64|fmacd) d18, d19, d20 +0[0-9a-f]+ <[^>]+> ee153b06 (vnmls\.f64|fmscd) d3, d5, d6 +0[0-9a-f]+ <[^>]+> ee12cb84 (vnmls\.f64|fmscd) d12, d18, d4 +0[0-9a-f]+ <[^>]+> ee532ba4 (vnmls\.f64|fmscd) d18, d19, d20 +0[0-9a-f]+ <[^>]+> ee253b46 (vnmul\.f64|fnmuld) d3, d5, d6 +0[0-9a-f]+ <[^>]+> ee22cbc4 (vnmul\.f64|fnmuld) d12, d18, d4 +0[0-9a-f]+ <[^>]+> ee632be4 (vnmul\.f64|fnmuld) d18, d19, d20 +0[0-9a-f]+ <[^>]+> ee053b46 (vmls\.f64|fnmacd) d3, d5, d6 +0[0-9a-f]+ <[^>]+> ee02cbc4 (vmls\.f64|fnmacd) d12, d18, d4 +0[0-9a-f]+ <[^>]+> ee432be4 (vmls\.f64|fnmacd) d18, d19, d20 +0[0-9a-f]+ <[^>]+> ee153b46 (vnmla\.f64|fnmscd) d3, d5, d6 +0[0-9a-f]+ <[^>]+> ee12cbc4 (vnmla\.f64|fnmscd) d12, d18, d4 +0[0-9a-f]+ <[^>]+> ee532be4 (vnmla\.f64|fnmscd) d18, d19, d20 +0[0-9a-f]+ <[^>]+> eeb43b62 (vcmp\.f64|fcmpd) d3, d18 +0[0-9a-f]+ <[^>]+> eef42b43 (vcmp\.f64|fcmpd) d18, d3 +0[0-9a-f]+ <[^>]+> eef53b40 (vcmp\.f64 d19, #0.0|fcmpzd d19) +0[0-9a-f]+ <[^>]+> eeb43be2 (vcmpe\.f64|fcmped) d3, d18 +0[0-9a-f]+ <[^>]+> eef42bc3 (vcmpe\.f64|fcmped) d18, d3 +0[0-9a-f]+ <[^>]+> eef53bc0 (vcmpe\.f64 d19, #0.0|fcmpezd d19) 0[0-9a-f]+ <[^>]+> ec443b3f vmov d31, r3, r4 0[0-9a-f]+ <[^>]+> ec565b3e vmov r5, r6, d30 diff --git a/gas/testsuite/gas/arm/vfpv3-const-conv.d b/gas/testsuite/gas/arm/vfpv3-const-conv.d index 9515feff713..eeb9c62c813 100644 --- a/gas/testsuite/gas/arm/vfpv3-const-conv.d +++ b/gas/testsuite/gas/arm/vfpv3-const-conv.d @@ -5,25 +5,25 @@ .*: +file format .*arm.* Disassembly of section \.text: -0[0-9a-f]+ <[^>]+> eef08a04 fconsts s17, #4 -0[0-9a-f]+ <[^>]+> eeba9a05 fconsts s18, #165 -0[0-9a-f]+ <[^>]+> eef49a00 fconsts s19, #64 -0[0-9a-f]+ <[^>]+> eef01b04 fconstd d17, #4 -0[0-9a-f]+ <[^>]+> eefa2b05 fconstd d18, #165 -0[0-9a-f]+ <[^>]+> eef43b00 fconstd d19, #64 -0[0-9a-f]+ <[^>]+> eefa8a63 fshtos s17, #9 -0[0-9a-f]+ <[^>]+> eefa1b63 fshtod d17, #9 -0[0-9a-f]+ <[^>]+> eefa8aeb fsltos s17, #9 -0[0-9a-f]+ <[^>]+> eefa1beb fsltod d17, #9 -0[0-9a-f]+ <[^>]+> eefb8a63 fuhtos s17, #9 -0[0-9a-f]+ <[^>]+> eefb1b63 fuhtod d17, #9 -0[0-9a-f]+ <[^>]+> eefb8aeb fultos s17, #9 -0[0-9a-f]+ <[^>]+> eefb1beb fultod d17, #9 -0[0-9a-f]+ <[^>]+> eefe9a64 ftoshs s19, #7 -0[0-9a-f]+ <[^>]+> eefe3b64 ftoshd d19, #7 -0[0-9a-f]+ <[^>]+> eefe9aec ftosls s19, #7 -0[0-9a-f]+ <[^>]+> eefe3bec ftosld d19, #7 -0[0-9a-f]+ <[^>]+> eeff9a64 ftouhs s19, #7 -0[0-9a-f]+ <[^>]+> eeff3b64 ftouhd d19, #7 -0[0-9a-f]+ <[^>]+> eeff9aec ftouls s19, #7 -0[0-9a-f]+ <[^>]+> eeff3bec ftould d19, #7 +0[0-9a-f]+ <[^>]+> eef08a04 (vmov\.f32|fconsts) s17, #4 +0[0-9a-f]+ <[^>]+> eeba9a05 (vmov\.f32|fconsts) s18, #165 +0[0-9a-f]+ <[^>]+> eef49a00 (vmov\.f32|fconsts) s19, #64 +0[0-9a-f]+ <[^>]+> eef01b04 (vmov\.f64|fconstd) d17, #4 +0[0-9a-f]+ <[^>]+> eefa2b05 (vmov\.f64|fconstd) d18, #165 +0[0-9a-f]+ <[^>]+> eef43b00 (vmov\.f64|fconstd) d19, #64 +0[0-9a-f]+ <[^>]+> eefa8a63 (vcvt\.f32\.s16 s17, s17, #9|fshtos s17, #9) +0[0-9a-f]+ <[^>]+> eefa1b63 (vcvt\.f64\.s16 d17, d17, #9|fshtod d17, #9) +0[0-9a-f]+ <[^>]+> eefa8aeb (vcvt\.f32\.s32 s17, s17, #9|fsltos s17, #9) +0[0-9a-f]+ <[^>]+> eefa1beb (vcvt\.f64\.s32 d17, d17, #9|fsltod d17, #9) +0[0-9a-f]+ <[^>]+> eefb8a63 (vcvt\.f32\.u16 s17, s17, #9|fuhtos s17, #9) +0[0-9a-f]+ <[^>]+> eefb1b63 (vcvt\.f64\.u16 d17, d17, #9|fuhtod d17, #9) +0[0-9a-f]+ <[^>]+> eefb8aeb (vcvt\.f32\.u32 s17, s17, #9|fultos s17, #9) +0[0-9a-f]+ <[^>]+> eefb1beb (vcvt\.f64\.u32 d17, d17, #9|fultod d17, #9) +0[0-9a-f]+ <[^>]+> eefe9a64 (vcvt\.s16\.f32 s19, s19, #7|ftoshs s19, #7) +0[0-9a-f]+ <[^>]+> eefe3b64 (vcvt\.s16\.f64 d19, d19, #7|ftoshd d19, #7) +0[0-9a-f]+ <[^>]+> eefe9aec (vcvt\.s32\.f32 s19, s19, #7|ftosls s19, #7) +0[0-9a-f]+ <[^>]+> eefe3bec (vcvt\.s32\.f64 d19, d19, #7|ftosld d19, #7) +0[0-9a-f]+ <[^>]+> eeff9a64 (vcvt\.u16\.f32 s19, s19, #7|ftouhs s19, #7) +0[0-9a-f]+ <[^>]+> eeff3b64 (vcvt\.u16\.f64 d19, d19, #7|ftouhd d19, #7) +0[0-9a-f]+ <[^>]+> eeff9aec (vcvt\.u32\.f32 s19, s19, #7|ftouls s19, #7) +0[0-9a-f]+ <[^>]+> eeff3bec (vcvt\.u32\.f64 d19, d19, #7|ftould d19, #7) diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index cc6c596f6c7..19b5ca2511e 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2008-12-15 Richard Earnshaw + + * ld-arm/vfp11-fix-scalar.d: Disassembly of VFP instructions now uses + unified syntax. + * ld-arm/vfp11-fix-vector.d: Likewise. + 2008-12-15 Hans-Peter Nilsson * ld-cris/libdso-13b.d: New test. diff --git a/ld/testsuite/ld-arm/vfp11-fix-scalar.d b/ld/testsuite/ld-arm/vfp11-fix-scalar.d index b7fe136fe07..509513711df 100644 --- a/ld/testsuite/ld-arm/vfp11-fix-scalar.d +++ b/ld/testsuite/ld-arm/vfp11-fix-scalar.d @@ -7,9 +7,9 @@ Disassembly of section \.text: 8000: 0a000001 beq 800c <__vfp11_veneer_0> 00008004 <__vfp11_veneer_0_r>: - 8004: ed927a00 flds s14, \[r2\] + 8004: ed927a00 (vldr|flds) s14, \[r2\] 8008: e12fff1e bx lr 0000800c <__vfp11_veneer_0>: - 800c: 0e474a20 fmacseq s9, s14, s1 + 800c: 0e474a20 (vmlaeq\.f32|fmacseq) s9, s14, s1 8010: eafffffb b 8004 <__vfp11_veneer_0_r> diff --git a/ld/testsuite/ld-arm/vfp11-fix-vector.d b/ld/testsuite/ld-arm/vfp11-fix-vector.d index 3474b8ce30a..15c080ac8a0 100644 --- a/ld/testsuite/ld-arm/vfp11-fix-vector.d +++ b/ld/testsuite/ld-arm/vfp11-fix-vector.d @@ -8,9 +8,9 @@ Disassembly of section \.text: 00008004 <__vfp11_veneer_0_r>: 8004: e1a02003 mov r2, r3 - 8008: ed927a00 flds s14, \[r2\] + 8008: ed927a00 (vldr|flds) s14, \[r2\] 800c: e12fff1e bx lr 00008010 <__vfp11_veneer_0>: - 8010: 0e474a20 fmacseq s9, s14, s1 + 8010: 0e474a20 (vmlaeq\.f32|fmacseq) s9, s14, s1 8014: eafffffa b 8004 <__vfp11_veneer_0_r> diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index f30e7878210..5a551682073 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2008-12-15 Richard Earnshaw + + * arm-dis.c (coprocessor_opcodes): Disassemble VFP instructions using + unified syntax. + 2008-12-08 H.J. Lu * i386-gen.c (opcode_modifiers): Move VexNDS before VexNDD. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 1be7bbcd119..f462143eb35 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -242,12 +242,27 @@ static const struct opcode32 coprocessor_opcodes[] = {FPU_FPA_EXT_V2, 0x0c100200, 0x0e100f00, "lfm%c\t%12-14f, %F, %A"}, /* Register load/store */ - {FPU_NEON_EXT_V1, 0x0d200b00, 0x0fb00f01, "vstmdb%c\t%16-19r%21'!, %B"}, - {FPU_NEON_EXT_V1, 0x0d300b00, 0x0fb00f01, "vldmdb%c\t%16-19r%21'!, %B"}, - {FPU_NEON_EXT_V1, 0x0c800b00, 0x0f900f01, "vstmia%c\t%16-19r%21'!, %B"}, - {FPU_NEON_EXT_V1, 0x0c900b00, 0x0f900f01, "vldmia%c\t%16-19r%21'!, %B"}, - {FPU_NEON_EXT_V1, 0x0d000b00, 0x0f300f00, "vstr%c\t%12-15,22D, %C"}, - {FPU_NEON_EXT_V1, 0x0d100b00, 0x0f300f00, "vldr%c\t%12-15,22D, %C"}, + {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0d2d0b00, 0x0fbf0f01, "vpush%c\t%B"}, + {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0d200b00, 0x0fb00f01, "vstmdb%c\t%16-19r!, %B"}, + {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0d300b00, 0x0fb00f01, "vldmdb%c\t%16-19r!, %B"}, + {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0c800b00, 0x0f900f01, "vstmia%c\t%16-19r%21'!, %B"}, + {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0cbd0b00, 0x0fbf0f01, "vpop%c\t%B"}, + {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0c900b00, 0x0f900f01, "vldmia%c\t%16-19r%21'!, %B"}, + {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0d000b00, 0x0f300f00, "vstr%c\t%12-15,22D, %C"}, + {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0d100b00, 0x0f300f00, "vldr%c\t%12-15,22D, %C"}, + {FPU_VFP_EXT_V1xD, 0x0d2d0a00, 0x0fbf0f00, "vpush%c\t%y3"}, + {FPU_VFP_EXT_V1xD, 0x0d200a00, 0x0fb00f00, "vstmdb%c\t%16-19r!, %y3"}, + {FPU_VFP_EXT_V1xD, 0x0d300a00, 0x0fb00f00, "vldmdb%c\t%16-19r!, %y3"}, + {FPU_VFP_EXT_V1xD, 0x0c800a00, 0x0f900f00, "vstmia%c\t%16-19r%21'!, %y3"}, + {FPU_VFP_EXT_V1xD, 0x0cbd0a00, 0x0fbf0f00, "vpop%c\t%y3"}, + {FPU_VFP_EXT_V1xD, 0x0c900a00, 0x0f900f00, "vldmia%c\t%16-19r%21'!, %y3"}, + {FPU_VFP_EXT_V1xD, 0x0d000a00, 0x0f300f00, "vstr%c\t%y1, %A"}, + {FPU_VFP_EXT_V1xD, 0x0d100a00, 0x0f300f00, "vldr%c\t%y1, %A"}, + + {FPU_VFP_EXT_V1xD, 0x0d200b01, 0x0fb00f01, "fstmdbx%c\t%16-19r!, %z3\t;@ Deprecated"}, + {FPU_VFP_EXT_V1xD, 0x0d300b01, 0x0fb00f01, "fldmdbx%c\t%16-19r!, %z3\t;@ Deprecated"}, + {FPU_VFP_EXT_V1xD, 0x0c800b01, 0x0f900f01, "fstmiax%c\t%16-19r%21'!, %z3\t;@ Deprecated"}, + {FPU_VFP_EXT_V1xD, 0x0c900b01, 0x0f900f01, "fldmiax%c\t%16-19r%21'!, %z3\t;@ Deprecated"}, /* Data transfer between ARM and NEON registers */ {FPU_NEON_EXT_V1, 0x0e800b10, 0x0ff00f70, "vdup%c.32\t%16-19,7D, %12-15r"}, @@ -269,89 +284,73 @@ static const struct opcode32 coprocessor_opcodes[] = {FPU_NEON_FP16, 0x0eb30a40, 0x0fbf0f50, "vcvt%7?tb%c.f16.f32\t%y1, %y0"}, /* Floating point coprocessor (VFP) instructions */ - {FPU_VFP_EXT_V1xD, 0x0ef1fa10, 0x0fffffff, "fmstat%c"}, - {FPU_VFP_EXT_V1xD, 0x0ee00a10, 0x0fff0fff, "fmxr%c\tfpsid, %12-15r"}, - {FPU_VFP_EXT_V1xD, 0x0ee10a10, 0x0fff0fff, "fmxr%c\tfpscr, %12-15r"}, - {FPU_VFP_EXT_V1xD, 0x0ee60a10, 0x0fff0fff, "fmxr%c\tmvfr1, %12-15r"}, - {FPU_VFP_EXT_V1xD, 0x0ee70a10, 0x0fff0fff, "fmxr%c\tmvfr0, %12-15r"}, - {FPU_VFP_EXT_V1xD, 0x0ee80a10, 0x0fff0fff, "fmxr%c\tfpexc, %12-15r"}, - {FPU_VFP_EXT_V1xD, 0x0ee90a10, 0x0fff0fff, "fmxr%c\tfpinst, %12-15r\t@ Impl def"}, - {FPU_VFP_EXT_V1xD, 0x0eea0a10, 0x0fff0fff, "fmxr%c\tfpinst2, %12-15r\t@ Impl def"}, - {FPU_VFP_EXT_V1xD, 0x0ef00a10, 0x0fff0fff, "fmrx%c\t%12-15r, fpsid"}, - {FPU_VFP_EXT_V1xD, 0x0ef10a10, 0x0fff0fff, "fmrx%c\t%12-15r, fpscr"}, - {FPU_VFP_EXT_V1xD, 0x0ef60a10, 0x0fff0fff, "fmrx%c\t%12-15r, mvfr1"}, - {FPU_VFP_EXT_V1xD, 0x0ef70a10, 0x0fff0fff, "fmrx%c\t%12-15r, mvfr0"}, - {FPU_VFP_EXT_V1xD, 0x0ef80a10, 0x0fff0fff, "fmrx%c\t%12-15r, fpexc"}, - {FPU_VFP_EXT_V1xD, 0x0ef90a10, 0x0fff0fff, "fmrx%c\t%12-15r, fpinst\t@ Impl def"}, - {FPU_VFP_EXT_V1xD, 0x0efa0a10, 0x0fff0fff, "fmrx%c\t%12-15r, fpinst2\t@ Impl def"}, - {FPU_VFP_EXT_V1, 0x0e000b10, 0x0ff00fff, "fmdlr%c\t%z2, %12-15r"}, - {FPU_VFP_EXT_V1, 0x0e100b10, 0x0ff00fff, "fmrdl%c\t%12-15r, %z2"}, - {FPU_VFP_EXT_V1, 0x0e200b10, 0x0ff00fff, "fmdhr%c\t%z2, %12-15r"}, - {FPU_VFP_EXT_V1, 0x0e300b10, 0x0ff00fff, "fmrdh%c\t%12-15r, %z2"}, - {FPU_VFP_EXT_V1xD, 0x0ee00a10, 0x0ff00fff, "fmxr%c\t, %12-15r"}, - {FPU_VFP_EXT_V1xD, 0x0ef00a10, 0x0ff00fff, "fmrx%c\t%12-15r, "}, - {FPU_VFP_EXT_V1xD, 0x0e000a10, 0x0ff00f7f, "fmsr%c\t%y2, %12-15r"}, - {FPU_VFP_EXT_V1xD, 0x0e100a10, 0x0ff00f7f, "fmrs%c\t%12-15r, %y2"}, - {FPU_VFP_EXT_V1xD, 0x0eb50a40, 0x0fbf0f70, "fcmp%7'ezs%c\t%y1"}, - {FPU_VFP_EXT_V1, 0x0eb50b40, 0x0fbf0f70, "fcmp%7'ezd%c\t%z1"}, - {FPU_VFP_EXT_V1xD, 0x0eb00a40, 0x0fbf0fd0, "fcpys%c\t%y1, %y0"}, - {FPU_VFP_EXT_V1xD, 0x0eb00ac0, 0x0fbf0fd0, "fabss%c\t%y1, %y0"}, - {FPU_VFP_EXT_V1, 0x0eb00b40, 0x0fbf0fd0, "fcpyd%c\t%z1, %z0"}, - {FPU_VFP_EXT_V1, 0x0eb00bc0, 0x0fbf0fd0, "fabsd%c\t%z1, %z0"}, - {FPU_VFP_EXT_V1xD, 0x0eb10a40, 0x0fbf0fd0, "fnegs%c\t%y1, %y0"}, - {FPU_VFP_EXT_V1xD, 0x0eb10ac0, 0x0fbf0fd0, "fsqrts%c\t%y1, %y0"}, - {FPU_VFP_EXT_V1, 0x0eb10b40, 0x0fbf0fd0, "fnegd%c\t%z1, %z0"}, - {FPU_VFP_EXT_V1, 0x0eb10bc0, 0x0fbf0fd0, "fsqrtd%c\t%z1, %z0"}, - {FPU_VFP_EXT_V1, 0x0eb70ac0, 0x0fbf0fd0, "fcvtds%c\t%z1, %y0"}, - {FPU_VFP_EXT_V1, 0x0eb70bc0, 0x0fbf0fd0, "fcvtsd%c\t%y1, %z0"}, - {FPU_VFP_EXT_V1xD, 0x0eb80a40, 0x0fbf0fd0, "fuitos%c\t%y1, %y0"}, - {FPU_VFP_EXT_V1xD, 0x0eb80ac0, 0x0fbf0fd0, "fsitos%c\t%y1, %y0"}, - {FPU_VFP_EXT_V1, 0x0eb80b40, 0x0fbf0fd0, "fuitod%c\t%z1, %y0"}, - {FPU_VFP_EXT_V1, 0x0eb80bc0, 0x0fbf0fd0, "fsitod%c\t%z1, %y0"}, - {FPU_VFP_EXT_V1xD, 0x0eb40a40, 0x0fbf0f50, "fcmp%7'es%c\t%y1, %y0"}, - {FPU_VFP_EXT_V1, 0x0eb40b40, 0x0fbf0f50, "fcmp%7'ed%c\t%z1, %z0"}, - {FPU_VFP_EXT_V3, 0x0eba0a40, 0x0fbe0f50, "f%16?us%7?lhtos%c\t%y1, #%5,0-3k"}, - {FPU_VFP_EXT_V3, 0x0eba0b40, 0x0fbe0f50, "f%16?us%7?lhtod%c\t%z1, #%5,0-3k"}, - {FPU_VFP_EXT_V1xD, 0x0ebc0a40, 0x0fbe0f50, "fto%16?sui%7'zs%c\t%y1, %y0"}, - {FPU_VFP_EXT_V1, 0x0ebc0b40, 0x0fbe0f50, "fto%16?sui%7'zd%c\t%y1, %z0"}, - {FPU_VFP_EXT_V3, 0x0ebe0a40, 0x0fbe0f50, "fto%16?us%7?lhs%c\t%y1, #%5,0-3k"}, - {FPU_VFP_EXT_V3, 0x0ebe0b40, 0x0fbe0f50, "fto%16?us%7?lhd%c\t%z1, #%5,0-3k"}, - {FPU_VFP_EXT_V1, 0x0c500b10, 0x0fb00ff0, "fmrrd%c\t%12-15r, %16-19r, %z0"}, - {FPU_VFP_EXT_V3, 0x0eb00a00, 0x0fb00ff0, "fconsts%c\t%y1, #%0-3,16-19d"}, - {FPU_VFP_EXT_V3, 0x0eb00b00, 0x0fb00ff0, "fconstd%c\t%z1, #%0-3,16-19d"}, - {FPU_VFP_EXT_V2, 0x0c400a10, 0x0ff00fd0, "fmsrr%c\t%y4, %12-15r, %16-19r"}, - {FPU_VFP_EXT_V2, 0x0c400b10, 0x0ff00fd0, "fmdrr%c\t%z0, %12-15r, %16-19r"}, - {FPU_VFP_EXT_V2, 0x0c500a10, 0x0ff00fd0, "fmrrs%c\t%12-15r, %16-19r, %y4"}, - {FPU_VFP_EXT_V1xD, 0x0e000a00, 0x0fb00f50, "fmacs%c\t%y1, %y2, %y0"}, - {FPU_VFP_EXT_V1xD, 0x0e000a40, 0x0fb00f50, "fnmacs%c\t%y1, %y2, %y0"}, - {FPU_VFP_EXT_V1, 0x0e000b00, 0x0fb00f50, "fmacd%c\t%z1, %z2, %z0"}, - {FPU_VFP_EXT_V1, 0x0e000b40, 0x0fb00f50, "fnmacd%c\t%z1, %z2, %z0"}, - {FPU_VFP_EXT_V1xD, 0x0e100a00, 0x0fb00f50, "fmscs%c\t%y1, %y2, %y0"}, - {FPU_VFP_EXT_V1xD, 0x0e100a40, 0x0fb00f50, "fnmscs%c\t%y1, %y2, %y0"}, - {FPU_VFP_EXT_V1, 0x0e100b00, 0x0fb00f50, "fmscd%c\t%z1, %z2, %z0"}, - {FPU_VFP_EXT_V1, 0x0e100b40, 0x0fb00f50, "fnmscd%c\t%z1, %z2, %z0"}, - {FPU_VFP_EXT_V1xD, 0x0e200a00, 0x0fb00f50, "fmuls%c\t%y1, %y2, %y0"}, - {FPU_VFP_EXT_V1xD, 0x0e200a40, 0x0fb00f50, "fnmuls%c\t%y1, %y2, %y0"}, - {FPU_VFP_EXT_V1, 0x0e200b00, 0x0fb00f50, "fmuld%c\t%z1, %z2, %z0"}, - {FPU_VFP_EXT_V1, 0x0e200b40, 0x0fb00f50, "fnmuld%c\t%z1, %z2, %z0"}, - {FPU_VFP_EXT_V1xD, 0x0e300a00, 0x0fb00f50, "fadds%c\t%y1, %y2, %y0"}, - {FPU_VFP_EXT_V1xD, 0x0e300a40, 0x0fb00f50, "fsubs%c\t%y1, %y2, %y0"}, - {FPU_VFP_EXT_V1, 0x0e300b00, 0x0fb00f50, "faddd%c\t%z1, %z2, %z0"}, - {FPU_VFP_EXT_V1, 0x0e300b40, 0x0fb00f50, "fsubd%c\t%z1, %z2, %z0"}, - {FPU_VFP_EXT_V1xD, 0x0e800a00, 0x0fb00f50, "fdivs%c\t%y1, %y2, %y0"}, - {FPU_VFP_EXT_V1, 0x0e800b00, 0x0fb00f50, "fdivd%c\t%z1, %z2, %z0"}, - {FPU_VFP_EXT_V1xD, 0x0d200a00, 0x0fb00f00, "fstmdbs%c\t%16-19r!, %y3"}, - {FPU_VFP_EXT_V1xD, 0x0d200b00, 0x0fb00f00, "fstmdb%0?xd%c\t%16-19r!, %z3"}, - {FPU_VFP_EXT_V1xD, 0x0d300a00, 0x0fb00f00, "fldmdbs%c\t%16-19r!, %y3"}, - {FPU_VFP_EXT_V1xD, 0x0d300b00, 0x0fb00f00, "fldmdb%0?xd%c\t%16-19r!, %z3"}, - {FPU_VFP_EXT_V1xD, 0x0d000a00, 0x0f300f00, "fsts%c\t%y1, %A"}, - {FPU_VFP_EXT_V1, 0x0d000b00, 0x0f300f00, "fstd%c\t%z1, %A"}, - {FPU_VFP_EXT_V1xD, 0x0d100a00, 0x0f300f00, "flds%c\t%y1, %A"}, - {FPU_VFP_EXT_V1, 0x0d100b00, 0x0f300f00, "fldd%c\t%z1, %A"}, - {FPU_VFP_EXT_V1xD, 0x0c800a00, 0x0f900f00, "fstmias%c\t%16-19r%21'!, %y3"}, - {FPU_VFP_EXT_V1xD, 0x0c800b00, 0x0f900f00, "fstmia%0?xd%c\t%16-19r%21'!, %z3"}, - {FPU_VFP_EXT_V1xD, 0x0c900a00, 0x0f900f00, "fldmias%c\t%16-19r%21'!, %y3"}, - {FPU_VFP_EXT_V1xD, 0x0c900b00, 0x0f900f00, "fldmia%0?xd%c\t%16-19r%21'!, %z3"}, + {FPU_VFP_EXT_V1xD, 0x0ee00a10, 0x0fff0fff, "vmsr%c\tfpsid, %12-15r"}, + {FPU_VFP_EXT_V1xD, 0x0ee10a10, 0x0fff0fff, "vmsr%c\tfpscr, %12-15r"}, + {FPU_VFP_EXT_V1xD, 0x0ee60a10, 0x0fff0fff, "vmsr%c\tmvfr1, %12-15r"}, + {FPU_VFP_EXT_V1xD, 0x0ee70a10, 0x0fff0fff, "vmsr%c\tmvfr0, %12-15r"}, + {FPU_VFP_EXT_V1xD, 0x0ee80a10, 0x0fff0fff, "vmsr%c\tfpexc, %12-15r"}, + {FPU_VFP_EXT_V1xD, 0x0ee90a10, 0x0fff0fff, "vmsr%c\tfpinst, %12-15r\t@ Impl def"}, + {FPU_VFP_EXT_V1xD, 0x0eea0a10, 0x0fff0fff, "vmsr%c\tfpinst2, %12-15r\t@ Impl def"}, + {FPU_VFP_EXT_V1xD, 0x0ef00a10, 0x0fff0fff, "vmrs%c\t%12-15r, fpsid"}, + {FPU_VFP_EXT_V1xD, 0x0ef1fa10, 0x0fffffff, "vmrs%c\tAPSR_nzcv, fpscr"}, + {FPU_VFP_EXT_V1xD, 0x0ef10a10, 0x0fff0fff, "vmrs%c\t%12-15r, fpscr"}, + {FPU_VFP_EXT_V1xD, 0x0ef60a10, 0x0fff0fff, "vmrs%c\t%12-15r, mvfr1"}, + {FPU_VFP_EXT_V1xD, 0x0ef70a10, 0x0fff0fff, "vmrs%c\t%12-15r, mvfr0"}, + {FPU_VFP_EXT_V1xD, 0x0ef80a10, 0x0fff0fff, "vmrs%c\t%12-15r, fpexc"}, + {FPU_VFP_EXT_V1xD, 0x0ef90a10, 0x0fff0fff, "vmrs%c\t%12-15r, fpinst\t@ Impl def"}, + {FPU_VFP_EXT_V1xD, 0x0efa0a10, 0x0fff0fff, "vmrs%c\t%12-15r, fpinst2\t@ Impl def"}, + {FPU_VFP_EXT_V1, 0x0e000b10, 0x0fd00fff, "vmov%c.32\t%z2[%21d], %12-15r"}, + {FPU_VFP_EXT_V1, 0x0e100b10, 0x0fd00fff, "vmov%c.32\t%12-15r, %z2[%21d]"}, + {FPU_VFP_EXT_V1xD, 0x0ee00a10, 0x0ff00fff, "vmsr%c\t, %12-15r"}, + {FPU_VFP_EXT_V1xD, 0x0ef00a10, 0x0ff00fff, "vmrs%c\t%12-15r, "}, + {FPU_VFP_EXT_V1xD, 0x0e000a10, 0x0ff00f7f, "vmov%c\t%y2, %12-15r"}, + {FPU_VFP_EXT_V1xD, 0x0e100a10, 0x0ff00f7f, "vmov%c\t%12-15r, %y2"}, + {FPU_VFP_EXT_V1xD, 0x0eb50a40, 0x0fbf0f70, "vcmp%7'e%c.f32\t%y1, #0.0"}, + {FPU_VFP_EXT_V1, 0x0eb50b40, 0x0fbf0f70, "vcmp%7'e%c.f64\t%z1, #0.0"}, + {FPU_VFP_EXT_V1xD, 0x0eb00a40, 0x0fbf0fd0, "vmov%c.f32\t%y1, %y0"}, + {FPU_VFP_EXT_V1xD, 0x0eb00ac0, 0x0fbf0fd0, "vabs%c.f32\t%y1, %y0"}, + {FPU_VFP_EXT_V1, 0x0eb00b40, 0x0fbf0fd0, "vmov%c.f64\t%z1, %z0"}, + {FPU_VFP_EXT_V1, 0x0eb00bc0, 0x0fbf0fd0, "vabs%c.f64\t%z1, %z0"}, + {FPU_VFP_EXT_V1xD, 0x0eb10a40, 0x0fbf0fd0, "vneg%c.f32\t%y1, %y0"}, + {FPU_VFP_EXT_V1xD, 0x0eb10ac0, 0x0fbf0fd0, "vsqrt%c.f32\t%y1, %y0"}, + {FPU_VFP_EXT_V1, 0x0eb10b40, 0x0fbf0fd0, "vneg%c.f64\t%z1, %z0"}, + {FPU_VFP_EXT_V1, 0x0eb10bc0, 0x0fbf0fd0, "vsqrt%c.f64\t%z1, %z0"}, + {FPU_VFP_EXT_V1, 0x0eb70ac0, 0x0fbf0fd0, "vcvt%c.f64.f32\t%z1, %y0"}, + {FPU_VFP_EXT_V1, 0x0eb70bc0, 0x0fbf0fd0, "vcvt%c.f32.f64\t%y1, %z0"}, + {FPU_VFP_EXT_V1xD, 0x0eb80a40, 0x0fbf0f50, "vcvt%c.f32.%7?su32\t%y1, %y0"}, + {FPU_VFP_EXT_V1, 0x0eb80b40, 0x0fbf0f50, "vcvt%c.f64.%7?su32\t%z1, %y0"}, + {FPU_VFP_EXT_V1xD, 0x0eb40a40, 0x0fbf0f50, "vcmp%7'e%c.f32\t%y1, %y0"}, + {FPU_VFP_EXT_V1, 0x0eb40b40, 0x0fbf0f50, "vcmp%7'e%c.f64\t%z1, %z0"}, + {FPU_VFP_EXT_V3, 0x0eba0a40, 0x0fbe0f50, "vcvt%c.f32.%16?us%7?31%7?26\t%y1, %y1, #%5,0-3k"}, + {FPU_VFP_EXT_V3, 0x0eba0b40, 0x0fbe0f50, "vcvt%c.f64.%16?us%7?31%7?26\t%z1, %z1, #%5,0-3k"}, + {FPU_VFP_EXT_V1xD, 0x0ebc0a40, 0x0fbe0f50, "vcvt%7`r%c.%16?su32.f32\t%y1, %y0"}, + {FPU_VFP_EXT_V1, 0x0ebc0b40, 0x0fbe0f50, "vcvt%7`r%c.%16?su32.f64\t%y1, %z0"}, + {FPU_VFP_EXT_V3, 0x0ebe0a40, 0x0fbe0f50, "vcvt%c.%16?us%7?31%7?26.f32\t%y1, %y1, #%5,0-3k"}, + {FPU_VFP_EXT_V3, 0x0ebe0b40, 0x0fbe0f50, "vcvt%c.%16?us%7?31%7?26.f64\t%z1, %z1, #%5,0-3k"}, + {FPU_VFP_EXT_V1, 0x0c500b10, 0x0fb00ff0, "vmov%c\t%12-15r, %16-19r, %z0"}, + {FPU_VFP_EXT_V3, 0x0eb00a00, 0x0fb00ff0, "vmov%c.f32\t%y1, #%0-3,16-19d"}, + {FPU_VFP_EXT_V3, 0x0eb00b00, 0x0fb00ff0, "vmov%c.f64\t%z1, #%0-3,16-19d"}, + {FPU_VFP_EXT_V2, 0x0c400a10, 0x0ff00fd0, "vmov%c\t%y4, %12-15r, %16-19r"}, + {FPU_VFP_EXT_V2, 0x0c400b10, 0x0ff00fd0, "vmov%c\t%z0, %12-15r, %16-19r"}, + {FPU_VFP_EXT_V2, 0x0c500a10, 0x0ff00fd0, "vmov%c\t%12-15r, %16-19r, %y4"}, + {FPU_VFP_EXT_V1xD, 0x0e000a00, 0x0fb00f50, "vmla%c.f32\t%y1, %y2, %y0"}, + {FPU_VFP_EXT_V1xD, 0x0e000a40, 0x0fb00f50, "vmls%c.f32\t%y1, %y2, %y0"}, + {FPU_VFP_EXT_V1, 0x0e000b00, 0x0fb00f50, "vmla%c.f64\t%z1, %z2, %z0"}, + {FPU_VFP_EXT_V1, 0x0e000b40, 0x0fb00f50, "vmls%c.f64\t%z1, %z2, %z0"}, + {FPU_VFP_EXT_V1xD, 0x0e100a00, 0x0fb00f50, "vnmls%c.f32\t%y1, %y2, %y0"}, + {FPU_VFP_EXT_V1xD, 0x0e100a40, 0x0fb00f50, "vnmla%c.f32\t%y1, %y2, %y0"}, + {FPU_VFP_EXT_V1, 0x0e100b00, 0x0fb00f50, "vnmls%c.f64\t%z1, %z2, %z0"}, + {FPU_VFP_EXT_V1, 0x0e100b40, 0x0fb00f50, "vnmla%c.f64\t%z1, %z2, %z0"}, + {FPU_VFP_EXT_V1xD, 0x0e200a00, 0x0fb00f50, "vmul%c.f32\t%y1, %y2, %y0"}, + {FPU_VFP_EXT_V1xD, 0x0e200a40, 0x0fb00f50, "vnmul%c.f32\t%y1, %y2, %y0"}, + {FPU_VFP_EXT_V1, 0x0e200b00, 0x0fb00f50, "vmul%c.f64\t%z1, %z2, %z0"}, + {FPU_VFP_EXT_V1, 0x0e200b40, 0x0fb00f50, "vnmul%c.f64\t%z1, %z2, %z0"}, + {FPU_VFP_EXT_V1xD, 0x0e300a00, 0x0fb00f50, "vadd%c.f32\t%y1, %y2, %y0"}, + {FPU_VFP_EXT_V1xD, 0x0e300a40, 0x0fb00f50, "vsub%c.f32\t%y1, %y2, %y0"}, + {FPU_VFP_EXT_V1, 0x0e300b00, 0x0fb00f50, "vadd%c.f64\t%z1, %z2, %z0"}, + {FPU_VFP_EXT_V1, 0x0e300b40, 0x0fb00f50, "vsub%c.f64\t%z1, %z2, %z0"}, + {FPU_VFP_EXT_V1xD, 0x0e800a00, 0x0fb00f50, "vdiv%c.f32\t%y1, %y2, %y0"}, + {FPU_VFP_EXT_V1, 0x0e800b00, 0x0fb00f50, "vdiv%c.f64\t%z1, %z2, %z0"}, /* Cirrus coprocessor instructions. */ {ARM_CEXT_MAVERICK, 0x0d100400, 0x0f500f00, "cfldrs%c\tmvf%12-15d, %A"}, @@ -1935,8 +1934,6 @@ print_insn_coprocessor (bfd_vma pc, struct disassemble_info *info, long given, switch (*c) { case '4': /* Sm pair */ - func (stream, "{"); - /* Fall through. */ case '0': /* Sm, Dm */ regno = given & 0x0000000f; if (single) @@ -2005,11 +2002,11 @@ print_insn_coprocessor (bfd_vma pc, struct disassemble_info *info, long given, func (stream, "}"); } else if (*c == '4') - func (stream, ", %c%d}", single ? 's' : 'd', + func (stream, ", %c%d", single ? 's' : 'd', regno + 1); } break; - + case 'L': switch (given & 0x00400100) { -- 2.30.2