From 7e39a97a62defb10e860deaaf756fbbc45ce8157 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Tue, 22 Dec 2020 19:38:22 +0000
Subject: [PATCH]

---
 openpower/sv/vector_ops.mdwn | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/openpower/sv/vector_ops.mdwn b/openpower/sv/vector_ops.mdwn
index 64fc9e63d..a7b539bad 100644
--- a/openpower/sv/vector_ops.mdwn
+++ b/openpower/sv/vector_ops.mdwn
@@ -72,6 +72,15 @@ Example
 
 TODO: a Vector CR-based version of the same, due to CRs being used for predication.
 
+     def iotacr(RT, BA): 
+        mask = get_src_predicate()
+        count = 0
+        for i in range(VL):
+            if mask & (1<<i) == 0: continue
+            iregs[RT+i] = count
+            if test_CR_bit(CR[i+BA]):
+                 count += 1
+
 # Scalar
 
 These may all be viewed as suitable for fitting into a scalar bitmanip extension.
-- 
2.30.2