From 7e995eb418d755873ef710fccbd2355d6f5d13df Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Fri, 1 Mar 2019 13:57:45 +0100 Subject: [PATCH] boards/targets/ulx3s: allow building with diamond or trellis --- litex/boards/targets/ulx3s.py | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/litex/boards/targets/ulx3s.py b/litex/boards/targets/ulx3s.py index 00b452ca..4a2ecf29 100755 --- a/litex/boards/targets/ulx3s.py +++ b/litex/boards/targets/ulx3s.py @@ -49,8 +49,8 @@ class _CRG(Module): # BaseSoC ------------------------------------------------------------------------------------------ class BaseSoC(SoCSDRAM): - def __init__(self, **kwargs): - platform = ulx3s.Platform(toolchain="trellis") + def __init__(self, toolchain="diamond", **kwargs): + platform = ulx3s.Platform(toolchain=toolchain) sys_clk_freq = int(50e6) SoCSDRAM.__init__(self, platform, clk_freq=sys_clk_freq, integrated_rom_size=0x8000, @@ -69,11 +69,13 @@ class BaseSoC(SoCSDRAM): def main(): parser = argparse.ArgumentParser(description="LiteX SoC on ULX3S") + parser.add_argument("--gateware-toolchain", dest="toolchain", default="diamond", + help='gateware toolchain to use, diamond (default) or trellis') builder_args(parser) soc_sdram_args(parser) args = parser.parse_args() - soc = BaseSoC(**soc_sdram_argdict(args)) + soc = BaseSoC(toolchain=args.toolchain, **soc_sdram_argdict(args)) builder = Builder(soc, **builder_argdict(args)) builder.build() -- 2.30.2