From 7eb2bd57189fdcadc28b6df963d33b82178b4585 Mon Sep 17 00:00:00 2001 From: Andrew Pinski Date: Fri, 5 Dec 2014 19:44:47 +0000 Subject: [PATCH] aarch64-simd-builtins.def (bswap): Use CF2 rather than CF10 so 2 is appended on the code. 2014-12-05 Andrew Pinski * config/aarch64/aarch64-simd-builtins.def (bswap): Use CF2 rather than CF10 so 2 is appended on the code. * config/aarch64/aarch64-simd.md (bswap): Rename to ... (bswap2): This so it matches for the optabs. From-SVN: r218435 --- gcc/ChangeLog | 7 +++++++ gcc/config/aarch64/aarch64-simd-builtins.def | 2 +- gcc/config/aarch64/aarch64-simd.md | 4 ++-- 3 files changed, 10 insertions(+), 3 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d0375513a23..48e713b4ef2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2014-12-05 Andrew Pinski + + * config/aarch64/aarch64-simd-builtins.def (bswap): Use CF2 rather + than CF10 so 2 is appended on the code. + * config/aarch64/aarch64-simd.md (bswap): Rename to ... + (bswap2): This so it matches for the optabs. + 2014-12-05 Thomas Preud'homme * regrename.c (find_best_rename_reg): Rename to ... diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def index 4eb70ff629f..503fa2c6b61 100644 --- a/gcc/config/aarch64/aarch64-simd-builtins.def +++ b/gcc/config/aarch64/aarch64-simd-builtins.def @@ -317,7 +317,7 @@ VAR1 (UNOP, floatunsv4si, 2, v4sf) VAR1 (UNOP, floatunsv2di, 2, v2df) - VAR5 (UNOPU, bswap, 10, v4hi, v8hi, v2si, v4si, v2di) + VAR5 (UNOPU, bswap, 2, v4hi, v8hi, v2si, v4si, v2di) BUILTIN_VB (UNOP, rbit, 0) diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 0ec132345a5..4995e4dfe94 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -287,7 +287,7 @@ [(set_attr "type" "neon_mul_")] ) -(define_insn "bswap" +(define_insn "bswap2" [(set (match_operand:VDQHSD 0 "register_operand" "=w") (bswap:VDQHSD (match_operand:VDQHSD 1 "register_operand" "w")))] "TARGET_SIMD" @@ -309,7 +309,7 @@ (ctz:VS (match_operand:VS 1 "register_operand")))] "TARGET_SIMD" { - emit_insn (gen_bswap (operands[0], operands[1])); + emit_insn (gen_bswap2 (operands[0], operands[1])); rtx op0_castsi2qi = simplify_gen_subreg(mode, operands[0], mode, 0); emit_insn (gen_aarch64_rbit (op0_castsi2qi, op0_castsi2qi)); -- 2.30.2