From 7eb64e9577dd60b6f928ed28c37971478ef08d6a Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 23 Jul 2022 10:38:24 +0100 Subject: [PATCH] --- openpower/sv/executive_summary.mdwn | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 openpower/sv/executive_summary.mdwn diff --git a/openpower/sv/executive_summary.mdwn b/openpower/sv/executive_summary.mdwn new file mode 100644 index 000000000..41622bd2c --- /dev/null +++ b/openpower/sv/executive_summary.mdwn @@ -0,0 +1,21 @@ + + +Simple-V is a Scalable Vector ISA Extension specifically for the Power ISA. +It is extremely important to think of Simple-V as a 2-Dimensional ISA: +instructions vertical and registers horizontal, otherwise it will be +difficult to understand. + +Simple-V is **not RISC-V and is not RISC-V Vectors**. NEC SX Aurora, +RVV and Simple-V are all based on Cray-style Vectors hence the similarity, +the provision of a `setvl` instruction and why they are called +"Scalable" Vectors because it is the `setvl` instruction that +presents the programmer with explicit control over Vector length. + +ARM NEON, AVX-512 and ARM SVE2 are all Predicated SIMD ISAs and +**do not provide Scalability**. Programmers must emulate scaling +through explicit predicate masks which increases instruction count in +hot-loops. + +Links to Simulator and Unit tests: + +* Simple-V Simulator -- 2.30.2