From 7f0d7d6155b6ef87b9a8e404a556222d22f844f8 Mon Sep 17 00:00:00 2001 From: Pat Haugen Date: Mon, 11 Jul 2016 19:03:09 +0000 Subject: [PATCH] rs6000.md (stfiwx): Change constraint to 'wu' to prevent generation of 'stxsiwx' on pre Power8 hardware. * config/rs6000/rs6000.md (stfiwx): Change constraint to 'wu' to prevent generation of 'stxsiwx' on pre Power8 hardware. From-SVN: r238223 --- gcc/ChangeLog | 6 ++++++ gcc/config/rs6000/rs6000.md | 4 +++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c17f3884378..f473b669c7e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2016-07-11 Pat Haugen + + PR target/71800 + * config/rs6000/rs6000.md (stfiwx): Change constraint to 'wu' to + prevent generation of 'stxsiwx' on pre Power8 hardware. + 2016-07-11 David Malcolm * input.c: Include cpplib.h. diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 5d212dd8180..5afae92291c 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -5747,9 +5747,11 @@ }) ; An UNSPEC is used so we don't have to support SImode in FP registers. +; The 'wu' constraint is used for the 2nd alternative to ensure stxsiwx +; is only generated for Power8 or later. (define_insn "stfiwx" [(set (match_operand:SI 0 "memory_operand" "=Z,Z") - (unspec:SI [(match_operand:DI 1 "gpc_reg_operand" "d,wv")] + (unspec:SI [(match_operand:DI 1 "gpc_reg_operand" "d,wu")] UNSPEC_STFIWX))] "TARGET_PPC_GFXOPT" "@ -- 2.30.2