From 7f37a52a21a15fc28b2c452fff54dd871d5dfe53 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Wed, 31 Oct 2018 23:38:20 +0000 Subject: [PATCH] radv: apply xfb buffer offset at buffer binding time not later. (v2) In order to handle pause/resume properly, the offset should be added to the buffer binding not to the begin/end paths. v2: don't add offset to size Fixes ext_transform_feedback-alignment* under zink Fixes: b4eb029062 (radv: implement VK_EXT_transform_feedback) Reviewed-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index c43e12f6d62..296b626b19c 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -1950,6 +1950,8 @@ radv_flush_streamout_descriptors(struct radv_cmd_buffer *cmd_buffer) va = radv_buffer_get_va(buffer->bo) + buffer->offset; + va += sb[i].offset; + /* Set the descriptor. * * On VI, the format must be non-INVALID, otherwise @@ -4754,7 +4756,7 @@ void radv_CmdBeginTransformFeedbackEXT( * SGPRs what to do. */ radeon_set_context_reg_seq(cs, R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 + 16*i, 2); - radeon_emit(cs, (sb[i].offset + sb[i].size) >> 2); /* BUFFER_SIZE (in DW) */ + radeon_emit(cs, sb[i].size >> 2); /* BUFFER_SIZE (in DW) */ radeon_emit(cs, so->stride_in_dw[i]); /* VTX_STRIDE (in DW) */ if (pCounterBuffers && pCounterBuffers[i]) { @@ -4783,7 +4785,7 @@ void radv_CmdBeginTransformFeedbackEXT( STRMOUT_OFFSET_SOURCE(STRMOUT_OFFSET_FROM_PACKET)); /* control */ radeon_emit(cs, 0); /* unused */ radeon_emit(cs, 0); /* unused */ - radeon_emit(cs, sb[i].offset >> 2); /* buffer offset in DW */ + radeon_emit(cs, 0); /* unused */ radeon_emit(cs, 0); /* unused */ } } -- 2.30.2