From 7f6672f6a737bc1c47e36c9567bd6d908855ce4d Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 2 Jun 2011 14:48:06 +1000 Subject: [PATCH] r600g: prepare for passing ctx into _r600_pipe_state_add_reg This moves the functions down the file, and also adds a ctx parameter. This is precursor patch just moving stuff around and getting it ready. Signed-off-by: Dave Airlie --- src/gallium/drivers/r600/evergreen_state.c | 9 ++++++- src/gallium/drivers/r600/r600.h | 28 ++++++++++++---------- src/gallium/drivers/r600/r600_asm.c | 4 ++-- src/gallium/drivers/r600/r600_pipe.h | 4 ++-- src/gallium/drivers/r600/r600_state.c | 10 +++++++- 5 files changed, 37 insertions(+), 18 deletions(-) diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index ea37b17c9a4..27f88f1cab1 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -154,6 +154,7 @@ static void *evergreen_create_blend_state(struct pipe_context *ctx, static void *evergreen_create_dsa_state(struct pipe_context *ctx, const struct pipe_depth_stencil_alpha_state *state) { + struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; struct r600_pipe_dsa *dsa = CALLOC_STRUCT(r600_pipe_dsa); unsigned db_depth_control, alpha_test_control, alpha_ref, db_shader_control; unsigned stencil_ref_mask, stencil_ref_mask_bf, db_render_override, db_render_control; @@ -336,6 +337,7 @@ static void *evergreen_create_rs_state(struct pipe_context *ctx, static void *evergreen_create_sampler_state(struct pipe_context *ctx, const struct pipe_sampler_state *state) { + struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state); union util_color uc; unsigned aniso_flag_offset = state->max_anisotropy > 1 ? 2 : 0; @@ -379,6 +381,7 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte struct pipe_resource *texture, const struct pipe_sampler_view *state) { + struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; struct r600_pipe_sampler_view *resource = CALLOC_STRUCT(r600_pipe_sampler_view); struct r600_pipe_state *rstate; const struct util_format_description *desc; @@ -1556,6 +1559,7 @@ void evergreen_polygon_offset_update(struct r600_pipe_context *rctx) void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader) { + struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; struct r600_pipe_state *rstate = &shader->rstate; struct r600_shader *rshader = &shader->shader; unsigned i, exports_ps, num_cout, spi_ps_in_control_0, spi_input_z, spi_ps_in_control_1, db_shader_control; @@ -1684,6 +1688,7 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader) { + struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; struct r600_pipe_state *rstate = &shader->rstate; struct r600_shader *rshader = &shader->shader; unsigned spi_vs_out_id[10]; @@ -1727,8 +1732,10 @@ void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader 0xFFFFFFFF, NULL); } -void evergreen_fetch_shader(struct r600_vertex_element *ve) +void evergreen_fetch_shader(struct pipe_context *ctx, + struct r600_vertex_element *ve) { + struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; struct r600_pipe_state *rstate = &ve->rstate; rstate->id = R600_PIPE_STATE_FETCH_SHADER; rstate->nregs = 0; diff --git a/src/gallium/drivers/r600/r600.h b/src/gallium/drivers/r600/r600.h index 97bef42db05..aa6a213e7db 100644 --- a/src/gallium/drivers/r600/r600.h +++ b/src/gallium/drivers/r600/r600.h @@ -169,18 +169,6 @@ struct r600_pipe_state { struct r600_pipe_reg regs[R600_BLOCK_MAX_REG]; }; -static inline void r600_pipe_state_add_reg(struct r600_pipe_state *state, - u32 offset, u32 value, u32 mask, - struct r600_bo *bo) -{ - state->regs[state->nregs].offset = offset; - state->regs[state->nregs].value = value; - state->regs[state->nregs].mask = mask; - state->regs[state->nregs].bo = bo; - state->nregs++; - assert(state->nregs < R600_BLOCK_MAX_REG); -} - #define R600_BLOCK_STATUS_ENABLED (1 << 0) #define R600_BLOCK_STATUS_DIRTY (1 << 1) @@ -322,4 +310,20 @@ void evergreen_context_pipe_state_set_vs_sampler(struct r600_context *ctx, struc struct radeon *radeon_decref(struct radeon *radeon); +static inline void _r600_pipe_state_add_reg(struct r600_context *ctx, + struct r600_pipe_state *state, + u32 offset, u32 value, u32 mask, + struct r600_bo *bo) +{ + state->regs[state->nregs].offset = offset; + state->regs[state->nregs].value = value; + state->regs[state->nregs].mask = mask; + state->regs[state->nregs].bo = bo; + state->nregs++; + assert(state->nregs < R600_BLOCK_MAX_REG); +} + +#define r600_pipe_state_add_reg(state, offset, value, mask, bo) _r600_pipe_state_add_reg(&rctx->ctx, state, offset, value, mask, bo) + + #endif diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c index dda429e48fa..65e539eba35 100644 --- a/src/gallium/drivers/r600/r600_asm.c +++ b/src/gallium/drivers/r600/r600_asm.c @@ -2283,9 +2283,9 @@ int r600_vertex_elements_build_fetch_shader(struct r600_pipe_context *rctx, stru r600_bc_clear(&bc); if (rctx->family >= CHIP_CEDAR) - evergreen_fetch_shader(ve); + evergreen_fetch_shader(&rctx->context, ve); else - r600_fetch_shader(ve); + r600_fetch_shader(&rctx->context, ve); return 0; } diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h index 1102c5c72eb..ae809a28713 100644 --- a/src/gallium/drivers/r600/r600_pipe.h +++ b/src/gallium/drivers/r600/r600_pipe.h @@ -218,7 +218,7 @@ void evergreen_init_state_functions(struct r600_pipe_context *rctx); void evergreen_init_config(struct r600_pipe_context *rctx); void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader); void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader); -void evergreen_fetch_shader(struct r600_vertex_element *ve); +void evergreen_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve); void *evergreen_create_db_flush_dsa(struct r600_pipe_context *rctx); void evergreen_polygon_offset_update(struct r600_pipe_context *rctx); void evergreen_pipe_set_buffer_resource(struct r600_pipe_context *rctx, @@ -259,7 +259,7 @@ void r600_init_state_functions(struct r600_pipe_context *rctx); void r600_init_config(struct r600_pipe_context *rctx); void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader); void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader); -void r600_fetch_shader(struct r600_vertex_element *ve); +void r600_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve); void *r600_create_db_flush_dsa(struct r600_pipe_context *rctx); void r600_polygon_offset_update(struct r600_pipe_context *rctx); void r600_pipe_set_buffer_resource(struct r600_pipe_context *rctx, diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index 21e6abcb1f6..f1fbfa570f6 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -199,6 +199,7 @@ static void *r600_create_blend_state(struct pipe_context *ctx, static void *r600_create_dsa_state(struct pipe_context *ctx, const struct pipe_depth_stencil_alpha_state *state) { + struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; struct r600_pipe_dsa *dsa = CALLOC_STRUCT(r600_pipe_dsa); unsigned db_depth_control, alpha_test_control, alpha_ref, db_shader_control; unsigned stencil_ref_mask, stencil_ref_mask_bf, db_render_override, db_render_control; @@ -286,6 +287,7 @@ static void *r600_create_dsa_state(struct pipe_context *ctx, static void *r600_create_rs_state(struct pipe_context *ctx, const struct pipe_rasterizer_state *state) { + struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; struct r600_pipe_rasterizer *rs = CALLOC_STRUCT(r600_pipe_rasterizer); struct r600_pipe_state *rstate; unsigned tmp; @@ -367,6 +369,7 @@ static void *r600_create_rs_state(struct pipe_context *ctx, static void *r600_create_sampler_state(struct pipe_context *ctx, const struct pipe_sampler_state *state) { + struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state); union util_color uc; unsigned aniso_flag_offset = state->max_anisotropy > 1 ? 4 : 0; @@ -405,6 +408,7 @@ static struct pipe_sampler_view *r600_create_sampler_view(struct pipe_context *c struct pipe_resource *texture, const struct pipe_sampler_view *state) { + struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; struct r600_pipe_sampler_view *resource = CALLOC_STRUCT(r600_pipe_sampler_view); struct r600_pipe_state *rstate; const struct util_format_description *desc; @@ -1280,6 +1284,7 @@ void r600_init_config(struct r600_pipe_context *rctx) void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader) { + struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; struct r600_pipe_state *rstate = &shader->rstate; struct r600_shader *rshader = &shader->shader; unsigned i, exports_ps, num_cout, spi_ps_in_control_0, spi_input_z, spi_ps_in_control_1, db_shader_control; @@ -1373,6 +1378,7 @@ void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shad void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader) { + struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; struct r600_pipe_state *rstate = &shader->rstate; struct r600_shader *rshader = &shader->shader; unsigned spi_vs_out_id[10]; @@ -1419,9 +1425,11 @@ void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shad 0xFFFFFFFF, NULL); } -void r600_fetch_shader(struct r600_vertex_element *ve) +void r600_fetch_shader(struct pipe_context *ctx, + struct r600_vertex_element *ve) { struct r600_pipe_state *rstate; + struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx; rstate = &ve->rstate; rstate->id = R600_PIPE_STATE_FETCH_SHADER; -- 2.30.2