From 7ffd3946055ec2761d7a475559f580c587e7ca78 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Thu, 7 May 2020 20:51:02 +0200 Subject: [PATCH] aco: implement 8-bit/16-bit mov's with p_create_vector ACO doesn't lower 8-bit/16-bit mov's in NIR. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2997 Signed-off-by: Samuel Pitoiset Reviewed-by: Rhys Perry Part-of: --- src/amd/compiler/aco_instruction_selection.cpp | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 5346376a48d..abc84952299 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -1056,13 +1056,15 @@ void visit_alu_instr(isel_context *ctx, nir_alu_instr *instr) bld.sop1(aco_opcode::s_mov_b64, Definition(dst), src); else unreachable("wrong src register class for nir_op_imov"); - } else if (dst.regClass() == v1) { - bld.vop1(aco_opcode::v_mov_b32, Definition(dst), src); - } else if (dst.regClass() == v2) { - bld.pseudo(aco_opcode::p_create_vector, Definition(dst), src); } else { - nir_print_instr(&instr->instr, stderr); - unreachable("Should have been lowered to scalar."); + if (dst.regClass() == v1) + bld.vop1(aco_opcode::v_mov_b32, Definition(dst), src); + else if (dst.regClass() == v1b || + dst.regClass() == v2b || + dst.regClass() == v2) + bld.pseudo(aco_opcode::p_create_vector, Definition(dst), src); + else + unreachable("wrong src register class for nir_op_imov"); } break; } -- 2.30.2