From 801c3fcbca69a17f0696522b91cbfc378094974b Mon Sep 17 00:00:00 2001 From: Roland Scheidegger Date: Fri, 31 Jul 2009 23:24:44 +0200 Subject: [PATCH] radeon: fix r100/r200 compressed texture stride This almost fixes compressed mipmapped textures on r200, though some small mip levels are still broken. Leave r300 compressed texture stride as is though afaik it's different to pre-radeon-rewrite too. Also do the fixup for rs600 uncompressed row stride at same place. --- src/mesa/drivers/dri/r300/r300_context.c | 5 ----- src/mesa/drivers/dri/radeon/radeon_common_context.c | 13 ++++++++++++- 2 files changed, 12 insertions(+), 6 deletions(-) diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c index 6f3aab986d2..db404b38479 100644 --- a/src/mesa/drivers/dri/r300/r300_context.c +++ b/src/mesa/drivers/dri/r300/r300_context.c @@ -451,11 +451,6 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual, r300InitState(r300); r300InitShaderFunctions(r300); - if (screen->chip_family == CHIP_FAMILY_RS600 || screen->chip_family == CHIP_FAMILY_RS690 || - screen->chip_family == CHIP_FAMILY_RS740) { - r300->radeon.texture_row_align = 64; - } - r300InitGLExtensions(ctx); return GL_TRUE; diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c index 4e4eba5d94c..2a017b59cfc 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c @@ -245,9 +245,20 @@ GLboolean radeonInitContext(radeonContextPtr radeon, radeon->texture_row_align = 256; radeon->texture_rect_row_align = 256; radeon->texture_compressed_row_align = 256; - } else { + } else if (IS_R200_CLASS(radeon->radeonScreen) || + IS_R100_CLASS(radeon->radeonScreen)) { radeon->texture_row_align = 32; radeon->texture_rect_row_align = 64; + radeon->texture_compressed_row_align = 32; + } else { /* R300 - not sure this is all correct */ + int chip_family = radeon->radeonScreen->chip_family; + if (chip_family == CHIP_FAMILY_RS600 || + chip_family == CHIP_FAMILY_RS690 || + chip_family == CHIP_FAMILY_RS740) + radeon->texture_row_align = 64; + else + radeon->texture_row_align = 32; + radeon->texture_rect_row_align = 64; radeon->texture_compressed_row_align = 64; } -- 2.30.2