From 805432bec701827c763a0dceab32a6a94a3afb01 Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sebastien@milkymist.org>
Date: Thu, 11 Jul 2013 16:23:05 +0200
Subject: [PATCH] memtest/LFSR: test bench

---
 milkymist/memtest/__init__.py | 21 ++++++++++++++++++---
 1 file changed, 18 insertions(+), 3 deletions(-)

diff --git a/milkymist/memtest/__init__.py b/milkymist/memtest/__init__.py
index 3062cafc..dcc05f8a 100644
--- a/milkymist/memtest/__init__.py
+++ b/milkymist/memtest/__init__.py
@@ -13,7 +13,7 @@ class LFSR(Module):
 		curval = [state[i] for i in range(n_state)]
 		curval += [0]*(n_out - n_state)
 		for i in range(n_out):
-			nv = optree("^", [curval[tap] for tap in taps])
+			nv = ~optree("^", [curval[tap] for tap in taps])
 			curval.insert(0, nv)
 			curval.pop()
 
@@ -22,9 +22,24 @@ class LFSR(Module):
 				self.o.eq(Cat(*curval))
 			)
 
-def _printcode():
+def _print_lfsr_code():
 	dut = LFSR(3, 4, [3, 2])
 	print(verilog.convert(dut, ios={dut.ce, dut.o}))
 
+class _LFSRTB(Module):
+	def __init__(self, *args, **kwargs):
+		self.submodules.lfsr = LFSR(*args, **kwargs)
+		self.comb += self.lfsr.ce.eq(1)
+
+	def do_simulation(self, s):
+		print(s.rd(self.lfsr.o))
+
+def _sim_lfsr():
+	from migen.sim.generic import Simulator
+	tb = _LFSRTB(3, 4, [3, 2])
+	sim = Simulator(tb)
+	sim.run(20)
+
 if __name__ == "__main__":
-	_printcode()
+	_print_lfsr_code()
+	_sim_lfsr()
-- 
2.30.2