From 80801683275d66fd9ccb1b8a165bec2c49c2d640 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Wed, 17 Jun 2020 22:07:33 +1000 Subject: [PATCH] xics/icp: MFRR starts at 0xff not 0x00 Signed-off-by: Benjamin Herrenschmidt --- xics.vhdl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xics.vhdl b/xics.vhdl index 413fdd9..a7e030b 100644 --- a/xics.vhdl +++ b/xics.vhdl @@ -53,7 +53,7 @@ architecture behaviour of xics is constant reg_internal_init : reg_internal_t := (wb_ack => '0', mfrr_pending => '0', - mfrr => x"00", -- mask everything on reset + mfrr => x"ff", -- no IPI on reset irq => '0', others => (others => '0')); -- 2.30.2