From 80e66af3c885e9b0137a8de22578ceca58c1453e Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Tue, 13 Dec 2016 18:15:35 +0100 Subject: [PATCH] re PR target/78794 (We noticed ~9% regression in 32-bit mode for 462.libquntum on Avoton after r243202) PR target/78794 * config/i386/i386.c (dimode_scalar_chain::compute_convert_gain): Calculate additional gain for andnot for targets without BMI. testsuite/ChangeLog: PR target/78794 * gcc.target/i386/pr78794.c: New test. From-SVN: r243615 --- gcc/ChangeLog | 14 +++++++---- gcc/config/i386/i386.c | 7 +++++- gcc/testsuite/ChangeLog | 5 ++++ gcc/testsuite/gcc.target/i386/pr78794.c | 32 +++++++++++++++++++++++++ 4 files changed, 52 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr78794.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c946865ee72..cbf7b2f466d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2016-12-13 Uros Bizjak + + PR target/78794 + * config/i386/i386.c (dimode_scalar_chain::compute_convert_gain): + Calculate additional gain for andnot for targets without BMI. + 2016-12-13 Carl Love * config/rs6000/rs6000-c.c: Add built-in support for @@ -21,11 +27,9 @@ 2016-12-13 Martin Liska PR tree-optimization/78428 - * expr.c (store_constructor_field): Add new arguments to the - function. - (store_constructor): Set up bitregion_end and add - gcc_unreachable to fields that have either non-constant size - or (and) offset. + * expr.c (store_constructor_field): Add new arguments to the function. + (store_constructor): Set up bitregion_end and add gcc_unreachable to + fields that have either non-constant size or (and) offset. 2016-12-13 Marek Polacek diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 152e6bcafd5..8fca3692a31 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -3419,6 +3419,11 @@ dimode_scalar_chain::compute_convert_gain () || GET_CODE (src) == AND) { gain += ix86_cost->add; + /* Additional gain for andnot for targets without BMI. */ + if (GET_CODE (XEXP (src, 0)) == NOT + && !TARGET_BMI) + gain += 2 * ix86_cost->add; + if (CONST_INT_P (XEXP (src, 0))) gain -= vector_const_cost (XEXP (src, 0)); if (CONST_INT_P (XEXP (src, 1))) @@ -3431,7 +3436,7 @@ dimode_scalar_chain::compute_convert_gain () { /* Assume comparison cost is the same. */ } - else if (GET_CODE (src) == CONST_INT) + else if (CONST_INT_P (src)) { if (REG_P (dst)) gain += COSTS_N_INSNS (2); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 48ad430720b..072e617415a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-12-13 Uros Bizjak + + PR target/78794 + * gcc.target/i386/pr78794.c: New test. + 2016-12-13 Andre Vehreschild PR fortran/77785 diff --git a/gcc/testsuite/gcc.target/i386/pr78794.c b/gcc/testsuite/gcc.target/i386/pr78794.c new file mode 100644 index 00000000000..6c3a3feb84f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr78794.c @@ -0,0 +1,32 @@ +/* PR target/pr78794 */ +/* { dg-do compile { target { ia32 } } } */ +/* { dg-options "-O2 -march=slm -mno-bmi -mno-stackrealign" } */ +/* { dg-final { scan-assembler "pandn" } } */ + +typedef unsigned long long ull; + +struct S1 +{ + float x; + ull y; +}; + + +struct S2 +{ + int a1; + struct S1 *node; + int *a2; +}; + +void +foo(int c1, int c2, int c3, struct S2 *reg) +{ + int i; + for(i=0; ia1; i++) + if(reg->node[i].y & ((ull) 1 << c1)) + { + if(reg->node[i].y & ((ull) 1 << c2)) + reg->node[i].y ^= ((ull) 1 << c3); + } +} -- 2.30.2