From 810846e157cb7fe37041fa009f3ec6a3234935a2 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Tue, 20 Aug 2019 13:20:07 -0400 Subject: [PATCH] radeonsi/gfx10: fix the legacy pipeline by storing as_ngg in the shader cache It could load an NGG shader when we want a legacy shader and vice versa. Reviewed-by: Pierre-Eric Pelloux-Prayer --- src/gallium/drivers/radeonsi/si_compute.c | 2 +- src/gallium/drivers/radeonsi/si_state.h | 2 +- src/gallium/drivers/radeonsi/si_state_shaders.c | 13 +++++++------ 3 files changed, 9 insertions(+), 8 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c index a118ab246ae..ac4a7aa3135 100644 --- a/src/gallium/drivers/radeonsi/si_compute.c +++ b/src/gallium/drivers/radeonsi/si_compute.c @@ -147,7 +147,7 @@ static void si_create_compute_state_async(void *job, int thread_index) program->num_cs_user_data_dwords = sel->info.properties[TGSI_PROPERTY_CS_USER_DATA_COMPONENTS_AMD]; - void *ir_binary = si_get_ir_binary(sel); + void *ir_binary = si_get_ir_binary(sel, false); /* Try to load the shader from the shader cache. */ mtx_lock(&sscreen->shader_cache_mutex); diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index c66eccc89d9..323313764d8 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -573,7 +573,7 @@ si_compute_fast_udiv_info32(uint32_t D, unsigned num_bits); void si_emit_dpbb_state(struct si_context *sctx); /* si_state_shaders.c */ -void *si_get_ir_binary(struct si_shader_selector *sel); +void *si_get_ir_binary(struct si_shader_selector *sel, bool as_ngg); bool si_shader_cache_load_shader(struct si_screen *sscreen, void *ir_binary, struct si_shader *shader); bool si_shader_cache_insert_shader(struct si_screen *sscreen, void *ir_binary, diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index 1c80a227209..63014c9687c 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.c +++ b/src/gallium/drivers/radeonsi/si_state_shaders.c @@ -45,7 +45,7 @@ * Return the IR binary in a buffer. For TGSI the first 4 bytes contain its * size as integer. */ -void *si_get_ir_binary(struct si_shader_selector *sel) +void *si_get_ir_binary(struct si_shader_selector *sel, bool as_ngg) { struct blob blob; unsigned ir_size; @@ -64,14 +64,15 @@ void *si_get_ir_binary(struct si_shader_selector *sel) ir_size = blob.size; } - unsigned size = 4 + ir_size + sizeof(sel->so); + unsigned size = 4 + 4 + ir_size + sizeof(sel->so); char *result = (char*)MALLOC(size); if (!result) return NULL; - *((uint32_t*)result) = size; - memcpy(result + 4, ir_binary, ir_size); - memcpy(result + 4 + ir_size, &sel->so, sizeof(sel->so)); + ((uint32_t*)result)[0] = size; + ((uint32_t*)result)[1] = as_ngg; + memcpy(result + 8, ir_binary, ir_size); + memcpy(result + 8 + ir_size, &sel->so, sizeof(sel->so)); if (sel->nir) blob_finish(&blob); @@ -2462,7 +2463,7 @@ static void si_init_shader_selector_async(void *job, int thread_index) shader->key.as_ngg = 1; if (sel->tokens || sel->nir) - ir_binary = si_get_ir_binary(sel); + ir_binary = si_get_ir_binary(sel, shader->key.as_ngg); /* Try to load the shader from the shader cache. */ mtx_lock(&sscreen->shader_cache_mutex); -- 2.30.2