From 81db5ccf3c41e28966ce547e3fd783634581a077 Mon Sep 17 00:00:00 2001 From: Curtis Dunham Date: Wed, 26 Apr 2017 15:21:34 +0000 Subject: [PATCH] kvm, arm: don't create interrupt events while saving GIC state If an interrupt was pending according to Kvm state during a drain, the Pl390 model would create an interrupt event that could not be serviced, preventing the system from draining. The proper behavior is for the Pl390 not actively being used for simulation to just skip the GIC state machine that delivers interrupts. Change-Id: Icb37e7e992f1fb441a9b3a26daa1bb5a6fe19228 Reviewed-by: Andreas Sandberg Reviewed-on: https://gem5-review.googlesource.com/3661 Maintainer: Andreas Sandberg --- src/arch/arm/kvm/gic.cc | 11 +++++++++++ src/arch/arm/kvm/gic.hh | 3 +++ src/dev/arm/gic_pl390.cc | 8 ++++++++ src/dev/arm/gic_pl390.hh | 3 ++- 4 files changed, 24 insertions(+), 1 deletion(-) diff --git a/src/arch/arm/kvm/gic.cc b/src/arch/arm/kvm/gic.cc index ce3baa558..d490265b8 100644 --- a/src/arch/arm/kvm/gic.cc +++ b/src/arch/arm/kvm/gic.cc @@ -291,6 +291,17 @@ MuxingKvmGic::clearPPInt(uint32_t num, uint32_t cpu) kernelGic->clearPPI(cpu, num); } +void +MuxingKvmGic::updateIntState(int hint) +{ + // During Kvm->Pl390 state transfer, writes to the Pl390 will call + // updateIntState() which can post an interrupt. Since we're only + // using the Pl390 model for holding state in this circumstance, we + // short-circuit this behavior, as the Pl390 is not actually active. + if (!usingKvm) + return Pl390::updateIntState(hint); +} + void MuxingKvmGic::copyDistRegister(BaseGicRegisters* from, BaseGicRegisters* to, ContextID ctx, Addr daddr) diff --git a/src/arch/arm/kvm/gic.hh b/src/arch/arm/kvm/gic.hh index ee04088d3..5447e6a92 100644 --- a/src/arch/arm/kvm/gic.hh +++ b/src/arch/arm/kvm/gic.hh @@ -194,6 +194,9 @@ class MuxingKvmGic : public Pl390 void sendPPInt(uint32_t num, uint32_t cpu) override; void clearPPInt(uint32_t num, uint32_t cpu) override; + protected: // Pl390 + void updateIntState(int hint) override; + protected: /** System this interrupt controller belongs to */ System &system; diff --git a/src/dev/arm/gic_pl390.cc b/src/dev/arm/gic_pl390.cc index 7b63306c3..93aaf5c45 100644 --- a/src/dev/arm/gic_pl390.cc +++ b/src/dev/arm/gic_pl390.cc @@ -871,6 +871,14 @@ Pl390::drain() } } + +void +Pl390::drainResume() +{ + // There may be pending interrupts if checkpointed from Kvm; post them. + updateIntState(-1); +} + void Pl390::serialize(CheckpointOut &cp) const { diff --git a/src/dev/arm/gic_pl390.hh b/src/dev/arm/gic_pl390.hh index 5c8a71222..3b35b59fb 100644 --- a/src/dev/arm/gic_pl390.hh +++ b/src/dev/arm/gic_pl390.hh @@ -318,7 +318,7 @@ class Pl390 : public BaseGic, public BaseGicRegisters /** See if some processor interrupt flags need to be enabled/disabled * @param hint which set of interrupts needs to be checked */ - void updateIntState(int hint); + virtual void updateIntState(int hint); /** Update the register that records priority of the highest priority * active interrupt*/ @@ -368,6 +368,7 @@ class Pl390 : public BaseGic, public BaseGicRegisters ~Pl390(); DrainState drain() override; + void drainResume() override; void serialize(CheckpointOut &cp) const override; void unserialize(CheckpointIn &cp) override; -- 2.30.2