From 8209c0f082d827636b3cb9a734af52bcce41d1ca Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 3 Jun 2021 13:02:59 +0100 Subject: [PATCH] make core_rst a member of TestIssuerInternal --- src/soc/simple/issuer.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py index c604354a..8e98202c 100644 --- a/src/soc/simple/issuer.py +++ b/src/soc/simple/issuer.py @@ -216,6 +216,7 @@ class TestIssuerInternal(Elaboratable): # main instruction core. suitable for prototyping / demo only self.core = core = NonProductionCore(pspec) + self.core_rst = ResetSignal("coresync") # instruction decoder. goes into Trap Record pdecode = create_pdecode() @@ -966,7 +967,8 @@ class TestIssuerInternal(Elaboratable): core = self.core # set up peripherals and core - core_rst = self.setup_peripherals(m) + core_rst = self.core_rst + self.setup_peripherals(m) # reset current state if core reset requested with m.If(core_rst): -- 2.30.2