From 824478c04c49adfe005b23ab33a25795ee4ccf84 Mon Sep 17 00:00:00 2001 From: Segher Boessenkool Date: Mon, 20 Jul 2015 18:32:55 +0200 Subject: [PATCH] * config/rs6000/rs6000.md (*lt0_disi): New. From-SVN: r226006 --- gcc/ChangeLog | 4 ++++ gcc/config/rs6000/rs6000.md | 11 +++++++++++ 2 files changed, 15 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6a4b22bf6f3..953e6b999fb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2015-07-20 Segher Boessenkool + + * config/rs6000/rs6000.md (*lt0_disi): New. + 2015-07-20 Segher Boessenkool PR target/66217 diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 5727068060c..4e64a365131 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -3475,6 +3475,17 @@ (set_attr "dot" "yes") (set_attr "length" "4,8")]) +; Special case for less-than-0. We can do it with just one machine +; instruction, but the generic optimizers do not realise it is cheap. +(define_insn "*lt0_disi" + [(set (match_operand:DI 0 "gpc_reg_operand" "=r") + (lt:DI (match_operand:SI 1 "gpc_reg_operand" "r") + (const_int 0)))] + "TARGET_POWERPC64" + "rlwinm %0,%1,1,31,31" + [(set_attr "type" "shift")]) + + ; Two forms for insert (the two arms of the IOR are not canonicalized, ; both are an AND so are the same precedence). -- 2.30.2