From 82534f65d86d48da77dcc27f18da3007c29e3fac Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Tue, 30 Jul 2019 00:47:36 +0200 Subject: [PATCH] i386.md (movstrict): Use register_operand predicate for operand 0. * config/i386/i386.md (movstrict): Use register_operand predicate for operand 0. Add expander condition. Assert that operand 0 is a SUBREG RTX. (*movstrict_1): Use register_operand predicate for operand 0. Update operand constraints and insn condition. (zero_extendsi2_and): Do not call gen_movstrict. (zero_extendqihi2_and): Do not call gen_movstrictqi. (*setcc_qi_slp): Use register_operand predicate for operand 0. Update operand 0 constraints. (setcc_qi_slp splitters): Use register_operand predicate for operand 0. From-SVN: r273891 --- gcc/ChangeLog | 13 +++++++++++++ gcc/config/i386/i386.md | 38 ++++++++++++++++++-------------------- 2 files changed, 31 insertions(+), 20 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5ab9e12ed05..f991c703ca7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,16 @@ +2019-07-30 Uroš Bizjak + + * config/i386/i386.md (movstrict): Use register_operand + predicate for operand 0. Add expander condition. Assert that + operand 0 is a SUBREG RTX. + (*movstrict_1): Use register_operand predicate for operand 0. + Update operand constraints and insn condition. + (zero_extendsi2_and): Do not call gen_movstrict. + (zero_extendqihi2_and): Do not call gen_movstrictqi. + (*setcc_qi_slp): Use register_operand predicate for operand 0. + Update operand 0 constraints. + (setcc_qi_slp splitters): Use register_operand predicate for operand 0. + 2019-07-29 Jozef Lawrynowicz * config/msp430/msp430.h (DRIVER_SELF_SPECS): Define and emit errors diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 63f18d7874b..e19a591fa9d 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -2786,26 +2786,20 @@ (set_attr "bdver1_decode" "double")]) (define_expand "movstrict" - [(set (strict_low_part (match_operand:SWI12 0 "nonimmediate_operand")) + [(set (strict_low_part (match_operand:SWI12 0 "register_operand")) (match_operand:SWI12 1 "general_operand"))] - "" + "!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)" { - if (TARGET_PARTIAL_REG_STALL && optimize_function_for_speed_p (cfun)) + gcc_assert (SUBREG_P (operands[0])); + if (GET_MODE_CLASS (GET_MODE (SUBREG_REG (operands[0]))) != MODE_INT) FAIL; - if (SUBREG_P (operands[0]) - && GET_MODE_CLASS (GET_MODE (SUBREG_REG (operands[0]))) != MODE_INT) - FAIL; - /* Don't generate memory->memory moves, go through a register */ - if (MEM_P (operands[0]) && MEM_P (operands[1])) - operands[1] = force_reg (mode, operands[1]); }) (define_insn "*movstrict_1" [(set (strict_low_part - (match_operand:SWI12 0 "nonimmediate_operand" "+m,")) - (match_operand:SWI12 1 "general_operand" "n,m"))] - "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)) - && !(MEM_P (operands[0]) && MEM_P (operands[1]))" + (match_operand:SWI12 0 "register_operand" "+")) + (match_operand:SWI12 1 "general_operand" "mn"))] + "!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)" "mov{}\t{%1, %0|%0, %1}" [(set_attr "type" "imov") (set_attr "mode" "")]) @@ -4011,8 +4005,10 @@ ix86_expand_clear (operands[0]); gcc_assert (!TARGET_PARTIAL_REG_STALL); - emit_insn (gen_movstrict - (gen_lowpart (mode, operands[0]), operands[1])); + emit_insn (gen_rtx_SET + (gen_rtx_STRICT_LOW_PART + (VOIDmode, gen_lowpart (mode, operands[0])), + operands[1])); DONE; } @@ -4063,8 +4059,10 @@ ix86_expand_clear (operands[0]); gcc_assert (!TARGET_PARTIAL_REG_STALL); - emit_insn (gen_movstrictqi - (gen_lowpart (QImode, operands[0]), operands[1])); + emit_insn (gen_rtx_SET + (gen_rtx_STRICT_LOW_PART + (VOIDmode, gen_lowpart (QImode, operands[0])), + operands[1])); DONE; } @@ -11835,7 +11833,7 @@ (set_attr "mode" "QI")]) (define_insn "*setcc_qi_slp" - [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm")) + [(set (strict_low_part (match_operand:QI 0 "register_operand" "+q")) (match_operator:QI 1 "ix86_comparison_operator" [(reg FLAGS_REG) (const_int 0)]))] "" @@ -11864,7 +11862,7 @@ }) (define_split - [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand")) + [(set (strict_low_part (match_operand:QI 0 "register_operand")) (ne:QI (match_operator 1 "ix86_comparison_operator" [(reg FLAGS_REG) (const_int 0)]) (const_int 0)))] @@ -11896,7 +11894,7 @@ }) (define_split - [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand")) + [(set (strict_low_part (match_operand:QI 0 "register_operand")) (eq:QI (match_operator 1 "ix86_comparison_operator" [(reg FLAGS_REG) (const_int 0)]) (const_int 0)))] -- 2.30.2