From 82822bc5497c2cf4643204d12cd0ed3f96ae72e1 Mon Sep 17 00:00:00 2001
From: Nanley Chery <nanley.g.chery@intel.com>
Date: Mon, 12 Aug 2019 15:41:11 -0700
Subject: [PATCH] iris: Allow for non-Y-tiled aux allocation

The Gen12 CCS is not Y-tiled.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
---
 src/gallium/drivers/iris/iris_resource.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c
index 46b207ed388..d06bf1b6211 100644
--- a/src/gallium/drivers/iris/iris_resource.c
+++ b/src/gallium/drivers/iris/iris_resource.c
@@ -564,7 +564,8 @@ iris_resource_alloc_separate_aux(struct iris_screen *screen,
     * block sizes.
     */
    res->aux.bo = iris_bo_alloc_tiled(screen->bufmgr, "aux buffer", size, 4096,
-                                     IRIS_MEMZONE_OTHER, I915_TILING_Y,
+                                     IRIS_MEMZONE_OTHER,
+                                     isl_tiling_to_i915_tiling(res->aux.surf.tiling),
                                      res->aux.surf.row_pitch_B, alloc_flags);
    if (!res->aux.bo) {
       return false;
-- 
2.30.2