From 839c480a14f025bdcd73a53d14a19d4cc9a1aea5 Mon Sep 17 00:00:00 2001 From: Kelvin Nilsen Date: Mon, 6 May 2019 17:00:46 +0000 Subject: [PATCH] re PR target/89424 (__builtin_vec_ext_v1ti (v, i) results in ICE with variable i (RS6000)) gcc/ChangeLog: 2019-05-06 Kelvin Nilsen PR target/89424 * config/rs6000/rs6000.c (rs6000_expand_vector_extract): Add handling of V1TImode. gcc/testsuite/ChangeLog: 2019-05-06 Kelvin Nilsen PR target/89424 * gcc.target/powerpc/pr89424-0.c: New test. * gcc.target/powerpc/vsx-builtin-13a.c: Define macro PR89424 to enable testing of newly patched capability. * gcc.target/powerpc/vsx-builtin-13b.c: Likewise. * gcc.target/powerpc/vsx-builtin-20a.c: Likewise. * gcc.target/powerpc/vsx-builtin-20b.c: Likewise. From-SVN: r270918 --- gcc/ChangeLog | 6 ++ gcc/config/rs6000/rs6000.c | 4 + gcc/testsuite/ChangeLog | 10 +++ gcc/testsuite/gcc.target/powerpc/pr89424-0.c | 76 +++++++++++++++++++ .../gcc.target/powerpc/vsx-builtin-13a.c | 2 +- .../gcc.target/powerpc/vsx-builtin-13b.c | 2 +- .../gcc.target/powerpc/vsx-builtin-20a.c | 2 +- .../gcc.target/powerpc/vsx-builtin-20b.c | 2 +- 8 files changed, 100 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr89424-0.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 493e843417d..0422740c56b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2019-05-06 Kelvin Nilsen + + PR target/89424 + * config/rs6000/rs6000.c (rs6000_expand_vector_extract): Add + handling of V1TImode. + 2019-05-06 Uroš Bizjak PR target/89221 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index c75fd863bdb..23db1302715 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -6944,6 +6944,10 @@ rs6000_expand_vector_extract (rtx target, rtx vec, rtx elt) switch (mode) { + case E_V1TImode: + emit_move_insn (target, gen_lowpart (TImode, vec)); + return; + case E_V2DFmode: emit_insn (gen_vsx_extract_v2df_var (target, vec, elt)); return; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 1ffdb10d432..d1329c69786 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,13 @@ +2019-05-06 Kelvin Nilsen + + PR target/89424 + * gcc.target/powerpc/pr89424-0.c: New test. + * gcc.target/powerpc/vsx-builtin-13a.c: Define macro PR89424 to + enable testing of newly patched capability. + * gcc.target/powerpc/vsx-builtin-13b.c: Likewise. + * gcc.target/powerpc/vsx-builtin-20a.c: Likewise. + * gcc.target/powerpc/vsx-builtin-20b.c: Likewise. + 2019-05-06 Marek Polacek PR c++/90265 - ICE with generic lambda. diff --git a/gcc/testsuite/gcc.target/powerpc/pr89424-0.c b/gcc/testsuite/gcc.target/powerpc/pr89424-0.c new file mode 100644 index 00000000000..301cf90ce5f --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr89424-0.c @@ -0,0 +1,76 @@ +/* { dg-do run { target { powerpc*-*-* && lp64 } } } */ +/* { dg-require-effective-target vsx_hw } */ +/* { dg-options "-mvsx" } */ + +/* This test should run the same on any target that supports vsx + instructions. Intentionally not specifying cpu in order to test + all code generation paths. */ + +#include + +extern void abort (void); + +/* Define PR89626 after that pr is addressed. */ +#ifdef PR89626 +#define SIGNED +#else +#define SIGNED signed +#endif + +#define CONST0 (((__int128) 31415926539) << 60) + +/* Test that indices > length of vector are applied modulo the vector + length. */ + + +/* Test for variable selector and vector residing in register. */ +__attribute__((noinline)) +__int128 ei (vector SIGNED __int128 v, int i) +{ + return __builtin_vec_ext_v1ti (v, i); +} + +/* Test for variable selector and vector residing in memory. */ +__int128 mei (vector SIGNED __int128 *vp, int i) +{ + return __builtin_vec_ext_v1ti (*vp, i); +} + +int main (int argc, char *argv[]) { + vector SIGNED __int128 dv = { CONST0 }; + __int128 d; + + d = ei (dv, 0); + if (d != CONST0) + abort (); + + d = ei (dv, 1); + if (d != CONST0) + abort (); + + d = ei (dv, 2); + if (d != CONST0) + abort (); + + d = ei (dv, 3); + if (d != CONST0) + abort (); + + d = mei (&dv, 0); + if (d != CONST0) + abort (); + + d = mei (&dv, 1); + if (d != CONST0) + abort (); + + d = mei (&dv, 2); + if (d != CONST0) + abort (); + + d = mei (&dv, 3); + if (d != CONST0) + abort (); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-13a.c b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-13a.c index 907bcce9236..7dc6bd994e4 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-13a.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-13a.c @@ -9,7 +9,7 @@ #include /* Define this after PR89424 is addressed. */ -#undef PR89424 +#define PR89424 /* Define this after PR89626 is addressed. */ #undef PR89626 diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-13b.c b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-13b.c index e1d791ded4f..168227214fc 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-13b.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-13b.c @@ -9,7 +9,7 @@ #include /* Define this after PR89424 is addressed. */ -#undef PR89424 +#define PR89424 /* Define this after PR89626 is addressed. */ #undef PR89626 diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-20a.c b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-20a.c index 638f5a1c904..12350c3ed7a 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-20a.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-20a.c @@ -9,7 +9,7 @@ #include /* Define this after PR89424 is addressed. */ -#undef PR89424 +#define PR89424 extern void abort (void); diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-20b.c b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-20b.c index 7b127a06c77..37fb7133ba0 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-20b.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-20b.c @@ -9,7 +9,7 @@ #include /* Define this after PR89424 is addressed. */ -#undef PR89424 +#define PR89424 extern void abort (void); -- 2.30.2