From 83a67c0cd7fd11f6ca6a88d2e7db594ef7449454 Mon Sep 17 00:00:00 2001 From: Kelvin Nilsen Date: Wed, 30 Jan 2019 15:01:40 +0000 Subject: [PATCH] rs6000-c.c (altivec-resolve_overloaded_builtin): Change handling of ALTIVEC_BUILTIN_VEC_EXTRACT. gcc/ChangeLog: 2019-01-30 Kelvin Nilsen * config/rs6000/rs6000-c.c (altivec-resolve_overloaded_builtin): Change handling of ALTIVEC_BUILTIN_VEC_EXTRACT. Coerce result to type of vector element when vec_extract is implemented by direct move. gcc/testsuite/ChangeLog: 2019-01-30 Kelvin Nilsen * gcc.target/powerpc/vec-extract-schar-1.c: New test. * gcc.target/powerpc/vec-extract-sint-1.c: New test. * gcc.target/powerpc/vec-extract-sint128-1.c: New test. * gcc.target/powerpc/vec-extract-slong-1.c: New test. * gcc.target/powerpc/vec-extract-sshort-1.c: New test. * gcc.target/powerpc/vec-extract-uchar-1.c: New test. * gcc.target/powerpc/vec-extract-uint-1.c: New test. * gcc.target/powerpc/vec-extract-uint128-1.c: New test. * gcc.target/powerpc/vec-extract-ulong-1.c: New test. * gcc.target/powerpc/vec-extract-ushort-1.c: New test. From-SVN: r268391 --- gcc/ChangeLog | 7 +++++ gcc/config/rs6000/rs6000-c.c | 8 ++++- gcc/testsuite/ChangeLog | 13 +++++++++ .../gcc.target/powerpc/vec-extract-schar-1.c | 29 +++++++++++++++++++ .../gcc.target/powerpc/vec-extract-sint-1.c | 29 +++++++++++++++++++ .../powerpc/vec-extract-sint128-1.c | 27 +++++++++++++++++ .../gcc.target/powerpc/vec-extract-slong-1.c | 27 +++++++++++++++++ .../gcc.target/powerpc/vec-extract-sshort-1.c | 29 +++++++++++++++++++ .../gcc.target/powerpc/vec-extract-uchar-1.c | 29 +++++++++++++++++++ .../gcc.target/powerpc/vec-extract-uint-1.c | 29 +++++++++++++++++++ .../powerpc/vec-extract-uint128-1.c | 27 +++++++++++++++++ .../gcc.target/powerpc/vec-extract-ulong-1.c | 27 +++++++++++++++++ .../gcc.target/powerpc/vec-extract-ushort-1.c | 29 +++++++++++++++++++ 13 files changed, 309 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-extract-schar-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-extract-sint-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-extract-sint128-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-extract-slong-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-extract-sshort-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-extract-uchar-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-extract-uint-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-extract-uint128-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-extract-ulong-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-extract-ushort-1.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3b59dad778d..e63082a7249 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2019-01-30 Kelvin Nilsen + + * config/rs6000/rs6000-c.c (altivec-resolve_overloaded_builtin): + Change handling of ALTIVEC_BUILTIN_VEC_EXTRACT. Coerce result to + type of vector element when vec_extract is implemented by direct + move. + 2019-01-30 Thomas Schwinge * doc/invoke.texi (C Language Options): List "-fopenacc-dim". diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c index 245a92f3bef..ae39eb77ea1 100644 --- a/gcc/config/rs6000/rs6000-c.c +++ b/gcc/config/rs6000/rs6000-c.c @@ -6645,7 +6645,13 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, } if (call) - return build_call_expr (call, 2, arg1, arg2); + { + tree result = build_call_expr (call, 2, arg1, arg2); + /* Coerce the result to vector element type. May be no-op. */ + arg1_inner_type = TREE_TYPE (arg1_type); + result = fold_convert (arg1_inner_type, result); + return result; + } } /* Build *(((arg1_inner_type*)&(vector type){arg1})+arg2). */ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3488fdd717f..3d02efb8ade 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,16 @@ +2019-01-30 Kelvin Nilsen + + * gcc.target/powerpc/vec-extract-schar-1.c: New test. + * gcc.target/powerpc/vec-extract-sint-1.c: New test. + * gcc.target/powerpc/vec-extract-sint128-1.c: New test. + * gcc.target/powerpc/vec-extract-slong-1.c: New test. + * gcc.target/powerpc/vec-extract-sshort-1.c: New test. + * gcc.target/powerpc/vec-extract-uchar-1.c: New test. + * gcc.target/powerpc/vec-extract-uint-1.c: New test. + * gcc.target/powerpc/vec-extract-uint128-1.c: New test. + * gcc.target/powerpc/vec-extract-ulong-1.c: New test. + * gcc.target/powerpc/vec-extract-ushort-1.c: New test. + 2019-01-30 Richard Biener PR tree-optimization/89111 diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-schar-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-schar-1.c new file mode 100644 index 00000000000..bd4d8b62f36 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-schar-1.c @@ -0,0 +1,29 @@ +/* Test to verify that the vec_extract from a vector of + signed chars remains signed. */ +/* { dg-do run } */ +/* { dg-options "-ansi -mcpu=power8 " } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ + +#include +#include +#include + +int test1(signed char sc) { + int sce; + + vector signed char v = vec_splats(sc); + sce = vec_extract(v,0); + + if (sce != sc) + abort(); + return 0; +} + +int main() +{ + test1 (0xf6); + test1 (0x76); + test1 (0x06); + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-sint-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-sint-1.c new file mode 100644 index 00000000000..9e32de3c60d --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-sint-1.c @@ -0,0 +1,29 @@ +/* Test to verify that the vec_extract from a vector of + signed ints remains signed. */ +/* { dg-do run } */ +/* { dg-options "-ansi -mcpu=power8 " } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ + +#include +#include +#include + +int test1(signed int si) { + long long int sie; + + vector signed int v = vec_splats(si); + sie = vec_extract(v,0); + + if (sie != si) + abort(); + return 0; +} + +int main() +{ + test1 (0xf6000000); + test1 (0x76000000); + test1 (0x06000000); + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-sint128-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-sint128-1.c new file mode 100644 index 00000000000..7e160740e21 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-sint128-1.c @@ -0,0 +1,27 @@ +/* Test to verify that the vec_extract from a vector of + signed __int128s remains signed. */ +/* { dg-do run } */ +/* { dg-options "-ansi -mcpu=power8 " } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ + +#include +#include +#include + +int test1(signed __int128 st) { + + vector signed __int128 v = vec_splats(st); + + if (vec_extract (v, 0) > st) + abort(); + return 0; +} + +int main() +{ + test1 (((__int128) 0xf600000000000000LL) << 64); + test1 (((__int128) 0x7600000000000000LL) << 64); + test1 (((__int128) 0x0600000000000000LL) << 64); + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-slong-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-slong-1.c new file mode 100644 index 00000000000..9b341272419 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-slong-1.c @@ -0,0 +1,27 @@ +/* Test to verify that the vec_extract from a vector of + signed longs remains signed. */ +/* { dg-do run } */ +/* { dg-options "-ansi -mcpu=power8 " } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ + +#include +#include +#include + +int test1(signed long long int sl) { + + vector signed long long int v = vec_splats(sl); + + if (vec_extract (v, 0) > sl) + abort(); + return 0; +} + +int main() +{ + test1 (0xf600000000000000LL); + test1 (0x7600000000000000LL); + test1 (0x0600000000000000LL); + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-sshort-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-sshort-1.c new file mode 100644 index 00000000000..24d2e28bf92 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-sshort-1.c @@ -0,0 +1,29 @@ +/* Test to verify that the vec_extract from a vector of + signed shorts remains signed. */ +/* { dg-do run } */ +/* { dg-options "-ansi -mcpu=power8 " } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ + +#include +#include +#include + +int test1(signed short ss) { + int sse; + + vector signed short v = vec_splats(ss); + sse = vec_extract(v,0); + + if (sse != ss) + abort(); + return 0; +} + +int main() +{ + test1 (0xf600); + test1 (0x7600); + test1 (0x0600); + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-uchar-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-uchar-1.c new file mode 100644 index 00000000000..ed4cb0ac67d --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-uchar-1.c @@ -0,0 +1,29 @@ +/* Test to verify that the vec_extract from a vector of + unsigned chars remains unsigned. */ +/* { dg-do run } */ +/* { dg-options "-ansi -mcpu=power8 " } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ + +#include +#include +#include + +int test1(unsigned char uc) { + int uce; + + vector unsigned char v = vec_splats(uc); + uce = vec_extract(v,0); + + if (uce != uc) + abort(); + return 0; +} + +int main() +{ + test1 (0xf6); + test1 (0x76); + test1 (0x06); + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-uint-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-uint-1.c new file mode 100644 index 00000000000..aa485f7c025 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-uint-1.c @@ -0,0 +1,29 @@ +/* Test to verify that the vec_extract from a vector of + unsigned ints remains unsigned. */ +/* { dg-do run } */ +/* { dg-options "-ansi -mcpu=power8 " } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ + +#include +#include +#include + +int test1(unsigned int ui) { + long long int uie; + + vector unsigned int v = vec_splats(ui); + uie = vec_extract(v,0); + + if (uie != ui) + abort(); + return 0; +} + +int main() +{ + test1 (0xf6000000); + test1 (0x76000000); + test1 (0x06000000); + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-uint128-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-uint128-1.c new file mode 100644 index 00000000000..a4ff9c7f831 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-uint128-1.c @@ -0,0 +1,27 @@ +/* Test to verify that the vec_extract from a vector of + unsigned __int128s remains unsigned. */ +/* { dg-do run } */ +/* { dg-options "-ansi -mcpu=power8 " } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ + +#include +#include +#include + +int test1(unsigned __int128 ul) { + + vector unsigned __int128 v = vec_splats(ul); + + if (vec_extract (v, 0) < ul) + abort(); + return 0; +} + +int main() +{ + test1 (((__int128) 0xf600000000000000LL) << 64); + test1 (((__int128) 0x7600000000000000LL) << 64); + test1 (((__int128) 0x0600000000000000LL) << 64); + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-ulong-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-ulong-1.c new file mode 100644 index 00000000000..be9d6a68766 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-ulong-1.c @@ -0,0 +1,27 @@ +/* Test to verify that the vec_extract from a vector of + unsigned longs remains unsigned. */ +/* { dg-do run } */ +/* { dg-options "-ansi -mcpu=power8 " } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ + +#include +#include +#include + +int test1(unsigned long long int ul) { + + vector unsigned long long int v = vec_splats(ul); + + if (vec_extract (v, 0) < ul) + abort(); + return 0; +} + +int main() +{ + test1 (0xf600000000000000LL); + test1 (0x7600000000000000LL); + test1 (0x0600000000000000LL); + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-ushort-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-ushort-1.c new file mode 100644 index 00000000000..1c36832c60d --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-ushort-1.c @@ -0,0 +1,29 @@ +/* Test to verify that the vec_extract from a vector of + signed shorts remains signed. */ +/* { dg-do run } */ +/* { dg-options "-ansi -mcpu=power8 " } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ + +#include +#include +#include + +int test1(unsigned short us) { + int use; + + vector unsigned short v = vec_splats(us); + use = vec_extract(v,0); + + if (use != us) + abort(); + return 0; +} + +int main() +{ + test1 (0xf600); + test1 (0x7600); + test1 (0x0600); + return 0; +} -- 2.30.2