From 83b29a1584a6fce74b7da7faa8620ed6c8a57878 Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 12 May 2022 12:33:25 +0100 Subject: [PATCH] --- openpower/sv/SimpleV_rationale.mdwn | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn index 15712c345..da962bb95 100644 --- a/openpower/sv/SimpleV_rationale.mdwn +++ b/openpower/sv/SimpleV_rationale.mdwn @@ -1017,6 +1017,22 @@ the register files (128 64-bit entries), to arbitrary (massive) sizes. **Summary** +There are historical and current efforts that step away from both a +general-purpose architecture and from the practice of using compiler +intrinsics in general-purpose compute to make programmer's lives easier. +A classic example being the Cell Processor (Sony PS3) which required +programmers to use DMA to schedule processing tasks. These specialist +high-performance architectures are only tolerated for +as long as they are useful. + +Combining SVP64 with ZOLC and OpenCAPI can produce an extremely powerful +architectural base that fits well with intrinsics embedded into standard +general-purpose compilers (gcc, llvm) as a pragmatic compromise which makes +it useful right out the gate. Further R&D may target compiler technology +that brings it on-par with NVIDIA, Graphcore, AMDGPU, but with intrinsics +there is no critical product launch dependence on having such +advanced compilers. + Bottom line is that there is a clear roadmap towards solving a long standing problem facing Computer Science and doing so in a way that reduces power consumption reduces algorithm completion time and reduces -- 2.30.2