From 83d01a08be358475466d62541566e93ff2bdab9a Mon Sep 17 00:00:00 2001 From: lkcl Date: Tue, 25 Jun 2019 08:08:10 +0100 Subject: [PATCH] --- simple_v_extension/sv_prefix_proposal.rst | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/simple_v_extension/sv_prefix_proposal.rst b/simple_v_extension/sv_prefix_proposal.rst index b5c2cb07c..07c7fa93d 100644 --- a/simple_v_extension/sv_prefix_proposal.rst +++ b/simple_v_extension/sv_prefix_proposal.rst @@ -824,6 +824,15 @@ executing 48/64-bit instructions. For just SVPrefix, I would say that the only user-visible CSR needed is VL. This is ignoring all the state for context-switching and exception handling. +> the consequence of that would be that P48/64 would need +> its own CSR State to track the subelement index. +> or that any exceptions would need to occur on a group +> basis, which is less than ideal, +> and interrupts would have to be stalled. +> interacting with SUBVL and requiring P48/64 to save the +> STATE CSR if needed is a workable compromise that +> does not result in huge CSR proliferation + -- What are the interaction rules when a 48/64 prefix opcode has a rd/rs -- 2.30.2