From 83fc3bac9fd75bd785cf0016ca429b301c30fabd Mon Sep 17 00:00:00 2001
From: Jeff Law <law@redhat.com>
Date: Fri, 30 Aug 1996 16:35:10 +0000
Subject: [PATCH]         * interp.c (hash): Fix.         * interp.c
 (do_format_8): Get operands correctly and         call the target function.  
       * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".

---
 sim/v850/ChangeLog |  7 ++++++
 sim/v850/interp.c  | 37 +++++++++++++++----------------
 sim/v850/simops.c  | 54 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 80 insertions(+), 18 deletions(-)

diff --git a/sim/v850/ChangeLog b/sim/v850/ChangeLog
index eb1e52856b5..8c1cbbf4dce 100644
--- a/sim/v850/ChangeLog
+++ b/sim/v850/ChangeLog
@@ -1,3 +1,10 @@
+Fri Aug 30 10:33:49 1996  Jeffrey A Law  (law@cygnus.com)
+
+	* interp.c (hash): Fix.
+	* interp.c (do_format_8): Get operands correctly and
+	call the target function.
+	* simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
+
 Thu Aug 29 13:53:29 1996  Jeffrey A Law  (law@cygnus.com)
 
 	* interp.c (do_format_4): Get operands correctly and
diff --git a/sim/v850/interp.c b/sim/v850/interp.c
index d47a1090fba..d11c14e4bec 100644
--- a/sim/v850/interp.c
+++ b/sim/v850/interp.c
@@ -27,28 +27,22 @@ static long
 hash(insn)
      long insn;
 {
-  if ((insn & 0x30) == 0
-      || (insn & 0x38) == 0x10)
+  if ((insn & 0x0600) == 0
+      || (insn & 0x0700) == 0x0200)
     return (insn & 0x07e0) >> 5;
-  if ((insn & 0x3c) == 0x18
-      || (insn & 0x3c) == 0x1c
-      || (insn & 0x3c) == 0x20
-      || (insn & 0x3c) == 0x24
-      || (insn & 0x3c) == 0x28
-      || (insn & 0x3c) == 0x23)
-    return (insn & 0x07c0) >> 6;
-  if ((insn & 0x38) == 0x30)
+  if ((insn & 0x0700) == 0x0300
+      || (insn & 0x0700) == 0x0400
+      || (insn & 0x0700) == 0x0500)
+    return (insn & 0x0780) >> 7;
+  if ((insn & 0x0700) == 0x0600)
     return (insn & 0x07e0) >> 5;
-  /* What about sub-op field? XXX */
-  if ((insn & 0x38) == 0x38)
+  if ((insn & 0x0780) == 0x0700)
     return (insn & 0x07e0) >> 5;
-  if ((insn & 0x3e) == 0x3c)
+  if ((insn & 0x07c0) == 0x0780)
     return (insn & 0x07c0) >> 6;
-  if ((insn & 0x3f) == 0x3e)
-    return (insn & 0xc7e0) >> 5;
-  /* Not really correct.  XXX */
-  return insn & 0xffffffff;
-  
+  if ((insn & 0x07E0) == 0x07C0)
+    return (insn & 0x07e0) >> 5;
+  return (insn & 0x07e0) >> 5;
 }
 
 static struct hash_entry *
@@ -208,7 +202,14 @@ static void
 do_format_8 (insn)
      uint32 insn;
 {
+  struct hash_entry *h;
   printf("format 8 0x%x\n", insn);
+
+  h = lookup_hash (insn);
+  OP[0] = insn & 0x1f;
+  OP[1] = (insn >> 11) & 0x7;
+  OP[2] = (insn >> 16) & 0xffff;
+  (h->ops->func) ();
 }
 
 static void
diff --git a/sim/v850/simops.c b/sim/v850/simops.c
index f763d028881..1586b11f67b 100644
--- a/sim/v850/simops.c
+++ b/sim/v850/simops.c
@@ -1306,24 +1306,78 @@ OP_20 ()
 void
 OP_7C0 ()
 {
+  unsigned int op0, op1, op2;
+  int result, temp;
+
+  op0 = State.regs[OP[0]];
+  op1 = OP[1] & 0x7;
+  temp = OP[2];
+  temp = (temp << 16) >> 16;
+  op2 = temp;
+  temp = get_byte (State.mem + op0 + op2);
+  State.sregs[5] &= ~PSW_Z;
+  if ((temp & (1 << op1)) == 0)
+    State.sregs[5] |= PSW_Z;
+  temp |= ~(1 << op1);
+  put_byte (State.mem + op0 + op2, temp);
 }
 
 /* not1 */
 void
 OP_47C0 ()
 {
+  unsigned int op0, op1, op2;
+  int result, temp;
+
+  op0 = State.regs[OP[0]];
+  op1 = OP[1] & 0x7;
+  temp = OP[2];
+  temp = (temp << 16) >> 16;
+  op2 = temp;
+  temp = get_byte (State.mem + op0 + op2);
+  State.sregs[5] &= ~PSW_Z;
+  if ((temp & (1 << op1)) == 0)
+    State.sregs[5] |= PSW_Z;
+  temp ^= ~(1 << op1);
+  put_byte (State.mem + op0 + op2, temp);
 }
 
 /* clr1 */
 void
 OP_87C0 ()
 {
+  unsigned int op0, op1, op2;
+  int result, temp;
+
+  op0 = State.regs[OP[0]];
+  op1 = OP[1] & 0x7;
+  temp = OP[2];
+  temp = (temp << 16) >> 16;
+  op2 = temp;
+  temp = get_byte (State.mem + op0 + op2);
+  State.sregs[5] &= ~PSW_Z;
+  if ((temp & (1 << op1)) == 0)
+    State.sregs[5] |= PSW_Z;
+  temp &= ~(1 << op1);
+  put_byte (State.mem + op0 + op2, temp);
 }
 
 /* tst1 */
 void
 OP_C7C0 ()
 {
+  unsigned int op0, op1, op2;
+  int result, temp;
+
+  op0 = State.regs[OP[0]];
+  op1 = OP[1] & 0x7;
+  temp = OP[2];
+  temp = (temp << 16) >> 16;
+  op2 = temp;
+  temp = get_byte (State.mem + op0 + op2);
+  State.sregs[5] &= ~PSW_Z;
+  if ((temp & (1 << op1)) == 0)
+    State.sregs[5] |= PSW_Z;
 }
 
 /* di */
-- 
2.30.2