From 8416f2d77f045b386ca280214cbe3a7ea07082bc Mon Sep 17 00:00:00 2001 From: R Veera Kumar Date: Mon, 22 Nov 2021 08:04:26 +0530 Subject: [PATCH] Add expected state to case_addme_ca_so_4 in alu_cases unit test --- src/openpower/test/alu/alu_cases.py | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/openpower/test/alu/alu_cases.py b/src/openpower/test/alu/alu_cases.py index 71e45c2f..bcf34a0f 100644 --- a/src/openpower/test/alu/alu_cases.py +++ b/src/openpower/test/alu/alu_cases.py @@ -145,8 +145,13 @@ class ALUTestCase(TestAccumulatorBase): xer = SelectableInt(0, 64) xer[XER_bits['CA']] = 1 initial_sprs[special_sprs['XER']] = xer + e = ExpectedState(pc=4) + e.intregs[16] = 0x7fffffffffffffff + e.intregs[6] = 0x7fffffffffffffff + e.ca = 0x3 + e.crregs[0] = 0x4 self.add_case(Program(lst, bigendian), - initial_regs, initial_sprs) + initial_regs, initial_sprs, expected=e) def case_addme_ca_so_3(self): """bug where SO does not get passed through to CR0 -- 2.30.2