From 841e721579bec2dbab9cfc2b34929dcde56816a2 Mon Sep 17 00:00:00 2001 From: Will Schmidt Date: Mon, 30 Mar 2020 12:13:57 -0500 Subject: [PATCH] RS6000 Allow builtin initialization regardless of mask Disable the code that limits initialization of builtins based on the rs6000_builtin_mask. This allows all built-ins to be properly referenced when building code using #pragma for cpu targets newer than what was specified by the -mcpu default. The use of built-ins is still properly limited by logic within altivec_resolve_overloaded_builtin(). 2020-03-30 Will Schmidt gcc/ * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code to skip defining builtins based on builtin_mask. gcc/testsuite/ * gcc.target/powerpc/pragma_power6.c: New. * gcc.target/powerpc/pragma_power7.c: New. * gcc.target/powerpc/pragma_power8.c: New. * gcc.target/powerpc/pragma_power9.c: New. * gcc.target/powerpc/pragma_misc9.c: New. * gcc.target/powerpc/vsu/vec-all-nez-7.c: Update error message. * gcc.target/powerpc/vsu/vec-any-eqz-7.c: Update error message. --- gcc/ChangeLog | 5 ++ gcc/config/rs6000/rs6000-call.c | 28 --------- gcc/testsuite/ChangeLog | 10 +++ .../gcc.target/powerpc/pragma_misc9.c | 47 ++++++++++++++ .../gcc.target/powerpc/pragma_power6.c | 17 +++++ .../gcc.target/powerpc/pragma_power7.c | 32 ++++++++++ .../gcc.target/powerpc/pragma_power8.c | 52 +++++++++++++++ .../gcc.target/powerpc/pragma_power9.c | 63 +++++++++++++++++++ .../gcc.target/powerpc/vsu/vec-all-nez-7.c | 3 +- .../gcc.target/powerpc/vsu/vec-any-eqz-7.c | 3 +- 10 files changed, 230 insertions(+), 30 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_misc9.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_power6.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_power7.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_power8.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_power9.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index fc6e8778aea..43015c6541d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2020-03-30 Will Schmidt + + * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code + to skip defining builtins based on builtin_mask. + 2020-03-30 Jakub Jelinek PR target/94343 diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c index 59060647431..e08621ace27 100644 --- a/gcc/config/rs6000/rs6000-call.c +++ b/gcc/config/rs6000/rs6000-call.c @@ -12069,7 +12069,6 @@ altivec_init_builtins (void) size_t i; tree ftype; tree decl; - HOST_WIDE_INT builtin_mask = rs6000_builtin_mask; tree pvoid_type_node = build_pointer_type (void_type_node); @@ -12431,17 +12430,8 @@ altivec_init_builtins (void) d = bdesc_dst; for (i = 0; i < ARRAY_SIZE (bdesc_dst); i++, d++) { - HOST_WIDE_INT mask = d->mask; - /* It is expected that these dst built-in functions may have d->icode equal to CODE_FOR_nothing. */ - if ((mask & builtin_mask) != mask) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "altivec_init_builtins, skip dst %s\n", - d->name); - continue; - } def_builtin (d->name, void_ftype_pcvoid_int_int, d->code); } @@ -12451,15 +12441,6 @@ altivec_init_builtins (void) { machine_mode mode1; tree type; - HOST_WIDE_INT mask = d->mask; - - if ((mask & builtin_mask) != mask) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "altivec_init_builtins, skip predicate %s\n", - d->name); - continue; - } if (rs6000_overloaded_builtin_p (d->code)) mode1 = VOIDmode; @@ -12506,15 +12487,6 @@ altivec_init_builtins (void) { machine_mode mode0; tree type; - HOST_WIDE_INT mask = d->mask; - - if ((mask & builtin_mask) != mask) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "altivec_init_builtins, skip abs %s\n", - d->name); - continue; - } /* Cannot define builtin if the instruction is disabled. */ gcc_assert (d->icode != CODE_FOR_nothing); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index f893ca000d4..90c9db8fbf5 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,13 @@ +2020-03-30 Will Schmidt + + * gcc.target/powerpc/pragma_power6.c: New. + * gcc.target/powerpc/pragma_power7.c: New. + * gcc.target/powerpc/pragma_power8.c: New. + * gcc.target/powerpc/pragma_power9.c: New. + * gcc.target/powerpc/pragma_misc9.c: New. + * gcc.target/powerpc/vsu/vec-all-nez-7.c: Update error message. + * gcc.target/powerpc/vsu/vec-any-eqz-7.c: Update error message. + 2020-03-30 Will Schmidt * gcc.target/powerpc/bswap64-4.c: Update scan-assembler diff --git a/gcc/testsuite/gcc.target/powerpc/pragma_misc9.c b/gcc/testsuite/gcc.target/powerpc/pragma_misc9.c new file mode 100644 index 00000000000..e03099bd084 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pragma_misc9.c @@ -0,0 +1,47 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-mdejagnu-cpu=power9 -maltivec -O2" } */ + +/* Ensure that if we set a pragma gcc target for an + older processor, we do not compile builtins that + the older target does not support. */ + +#include + +vector bool int +test1 (vector signed int a, vector signed int b) +{ + return vec_cmpnez (a, b); +} + +#pragma GCC target ("cpu=power8") +vector bool int +test2 (vector signed int a, vector signed int b) +{ + return vec_cmpnez (a, b); + /* { dg-error "'__builtin_altivec_vcmpnezw' requires the '-mcpu=power9' option" "" { target *-*-* } .-1 } */ +} + +#pragma GCC target ("cpu=power7") +vector signed int +test3 (vector signed int a, vector signed int b) +{ + return vec_mergee (a, b); + /* { dg-error "'__builtin_altivec_vmrgew_v4si' requires the '-mpower8-vector' option" "" { target *-*-* } .-1 } */ +} + +#pragma GCC target ("cpu=power6") +vector signed int +test4 (vector int a, vector int b) +{ + return vec_sldw (a, b, 2); + /* { dg-error "'__builtin_vsx_xxsldwi_4si' requires the '-mvsx' option" "" { target *-*-* } .-1 } */ +} + +vector int +test5 (vector int a, vector int b) +{ + return vec_add (a, b); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/pragma_power6.c b/gcc/testsuite/gcc.target/powerpc/pragma_power6.c new file mode 100644 index 00000000000..a9120b77415 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pragma_power6.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-mdejagnu-cpu=power6 -maltivec -O2" } */ + +#include + +#pragma GCC target ("cpu=power6,altivec") +#ifdef _ARCH_PWR6 +vector int +isa_2_05 (vector int a, vector int b) +{ + return vec_add (a, b); +} +#else +#error failed power6 pragma target +#endif + diff --git a/gcc/testsuite/gcc.target/powerpc/pragma_power7.c b/gcc/testsuite/gcc.target/powerpc/pragma_power7.c new file mode 100644 index 00000000000..2e5b7c2b369 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pragma_power7.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-mdejagnu-cpu=power6 -maltivec -O2" } */ + +#include + +#pragma GCC target ("cpu=power6,altivec") +#ifdef _ARCH_PWR6 +vector int +test1 (vector int a, vector int b) +{ + return vec_add (a, b); +} +#else +#error failed power6 pragma target +#endif + +#pragma GCC target ("cpu=power7") +/* Force a re-read of altivec.h with new cpu target. */ +#undef _ALTIVEC_H +#include +#ifdef _ARCH_PWR7 +vector signed int +test2 (vector signed int a, vector signed int b) +{ + return vec_sldw (a, b, 3); +} +#else +#error failed to set power7 pragma target +#endif + diff --git a/gcc/testsuite/gcc.target/powerpc/pragma_power8.c b/gcc/testsuite/gcc.target/powerpc/pragma_power8.c new file mode 100644 index 00000000000..c8d2cdd6c1a --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pragma_power8.c @@ -0,0 +1,52 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mdejagnu-cpu=power6 -maltivec -O2" } */ + +#include + +#pragma GCC target ("cpu=power6,altivec") +#ifdef _ARCH_PWR6 +vector int +test1 (vector int a, vector int b) +{ + return vec_add (a, b); +} +#else +#error failed power6 pragma target +#endif + +#pragma GCC target ("cpu=power7") +/* Force a re-read of altivec.h with new cpu target. */ +#undef _ALTIVEC_H +#include +#ifdef _ARCH_PWR7 +vector signed int +test2 (vector signed int a, vector signed int b) +{ + return vec_sldw (a, b, 3); +} +#else +#error failed to set power7 pragma target +#endif + +#pragma GCC target ("cpu=power8") +/* Force a re-read of altivec.h with new cpu target. */ +#undef _ALTIVEC_H +#include +#ifdef _ARCH_PWR8 +vector int +test3 (vector int a, vector int b) +{ + return vec_mergee (a, b); +} +typedef __attribute__((altivec(vector__))) long vec_t; +int +test3b (vec_t a, vec_t b) +{ + return __builtin_vec_vcmpeq_p (2, a, b); +} +#else +#error failed to set power8 pragma target. +#endif + diff --git a/gcc/testsuite/gcc.target/powerpc/pragma_power9.c b/gcc/testsuite/gcc.target/powerpc/pragma_power9.c new file mode 100644 index 00000000000..e33aad1aaf7 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pragma_power9.c @@ -0,0 +1,63 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-mdejagnu-cpu=power6 -maltivec -O2" } */ + +#include + +#ifdef _ARCH_PWR6 +vector int +test1 (vector int a, vector int b) +{ + return vec_add (a, b); +} +#else +#error failed on default power6 pragma target +#endif + +#pragma GCC target ("cpu=power7") +#undef _ALTIVEC_H +#include +#ifdef _ARCH_PWR7 +vector signed int +test2 (vector signed int a, vector signed int b) +{ + return vec_sldw (a, b, 3); +} +#else +#error failed to set power7 pragma target +#endif + +#pragma GCC target ("cpu=power8") +#undef _ALTIVEC_H +#include +#ifdef _ARCH_PWR8 +vector int +test3 (vector int a, vector int b) +{ + return vec_mergee (a, b); +} + +typedef __attribute__((altivec(vector__))) long vec_t; +int +test3b (vec_t a, vec_t b) +{ + return __builtin_vec_vcmpeq_p (2, a, b); +} +#else +#error failed to set power8 pragma target. +#endif + +#pragma GCC target ("cpu=power9,power9-vector") +#undef _ALTIVEC_H +#include +#ifdef _ARCH_PWR9 +vector bool int +test4 (vector signed int a, vector signed int b) +{ + return vec_cmpnez (a, b); +} +#else +#error Failed to set cpu=power9 pragma target. +#endif + diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-all-nez-7.c b/gcc/testsuite/gcc.target/powerpc/vsu/vec-all-nez-7.c index 0f9badda4f8..f53c6dca0a9 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsu/vec-all-nez-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-all-nez-7.c @@ -11,5 +11,6 @@ test_all_not_equal_and_not_zero (vector unsigned short *arg1_p, vector unsigned short arg_1 = *arg1_p; vector unsigned short arg_2 = *arg2_p; - return __builtin_vec_vcmpnez_p (__CR6_LT, arg_1, arg_2); /* { dg-error "'__builtin_vec_vcmpnez_p' is not supported in this compiler configuration" } */ + return __builtin_vec_vcmpnez_p (__CR6_LT, arg_1, arg_2); + /* { dg-error "'__builtin_altivec_vcmpnezh_p' requires the '-mcpu=power9' option" "" { target *-*-* } .-1 } */ } diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-any-eqz-7.c b/gcc/testsuite/gcc.target/powerpc/vsu/vec-any-eqz-7.c index c69dfa64728..757acd93110 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsu/vec-any-eqz-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-any-eqz-7.c @@ -10,5 +10,6 @@ test_any_equal (vector unsigned int *arg1_p, vector unsigned int *arg2_p) vector unsigned int arg_1 = *arg1_p; vector unsigned int arg_2 = *arg2_p; - return __builtin_vec_vcmpnez_p (__CR6_LT_REV, arg_1, arg_2); /* { dg-error "'__builtin_vec_vcmpnez_p' is not supported in this compiler configuration" } */ + return __builtin_vec_vcmpnez_p (__CR6_LT_REV, arg_1, arg_2); + /* { dg-error "'__builtin_altivec_vcmpnezw_p' requires the '-mcpu=power9' option" "" { target *-*-* } .-1 } */ } -- 2.30.2