From 846b8f1ed924f25981bd016e7d6fe730d40bf99e Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Tue, 12 Dec 2000 19:32:56 +0000 Subject: [PATCH] Add el segundo tests Fix formatting --- gas/testsuite/ChangeLog | 7 ++++ gas/testsuite/gas/arm/el_segundo.d | 33 ++++++++++++++++++ gas/testsuite/gas/arm/el_segundo.s | 54 +++++++++++++++++++++++++++++ gas/testsuite/gas/vtable/vtable.exp | 36 ++++++------------- 4 files changed, 105 insertions(+), 25 deletions(-) create mode 100644 gas/testsuite/gas/arm/el_segundo.d create mode 100644 gas/testsuite/gas/arm/el_segundo.s diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 047ddcaaf00..e47bc4d5cb9 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2000-12-12 Nick Clifton + + * gas/vtable/vtable.exp: Fix formatting. + + * gas/arm/elsegundo.s: New Test (currently disabled). + * gas/arm/elsegundo.d: Expected test results. + 2000-12-11 H.J. Lu * gas/i386/intel.d: Adjusted for the a.out assembler. diff --git a/gas/testsuite/gas/arm/el_segundo.d b/gas/testsuite/gas/arm/el_segundo.d new file mode 100644 index 00000000000..835e7a11ada --- /dev/null +++ b/gas/testsuite/gas/arm/el_segundo.d @@ -0,0 +1,33 @@ + +el_segundo.o: file format elf32-littlearm + +Disassembly of section .text: + +00000000
: + 0: c1003281 smlabbgt r0, r1, r2, r3 + 4: e1003281 smlabb r0, r1, r2, r3 + 8: e10032a1 smlatb r0, r1, r2, r3 + c: e10032c1 smlabt r0, r1, r2, r3 + 10: e10032e1 smlatt r0, r1, r2, r3 + 14: c1203281 smlawbgt r0, r1, r2, r3 + 18: e1203281 smlawb r0, r1, r2, r3 + 1c: e12032c1 smlawt r0, r1, r2, r3 + 20: c1410382 smlalbbgt r0, r1, r2, r3 + 24: e1410382 smlalbb r0, r1, r2, r3 + 28: e14103a2 smlaltb r0, r1, r2, r3 + 2c: e14103c2 smlalbt r0, r1, r2, r3 + 30: e14103e2 smlaltt r0, r1, r2, r3 + 34: c1600281 smulbbgt r0, r1, r2 + 38: e1600281 smulbb r0, r1, r2 + 3c: e16002a1 smultb r0, r1, r2 + 40: e16002c1 smulbt r0, r1, r2 + 44: e16002e1 smultt r0, r1, r2 + 48: c12002a1 smulwbgt r0, r1, r2 + 4c: e12002a1 smulwb r0, r1, r2 + 50: e12002e1 smulwt r0, r1, r2 + 54: c1020051 qaddgt r0, r1, r2 + 58: e1020051 qadd r0, r1, r2 + 5c: e1420051 qdadd r0, r1, r2 + 60: e1220051 qsub r0, r1, r2 + 64: e1620051 qdsub r0, r1, r2 + 68: e1220051 qsub r0, r1, r2 diff --git a/gas/testsuite/gas/arm/el_segundo.s b/gas/testsuite/gas/arm/el_segundo.s new file mode 100644 index 00000000000..9f403a10d56 --- /dev/null +++ b/gas/testsuite/gas/arm/el_segundo.s @@ -0,0 +1,54 @@ +# el_segundo.s +# +# Tests that we generate the right code for v5e instructions. +# This is not a functional test, although it can be linked. +# (The section at the rear is non-Coyanosa stuff for comparison.) +# To verify a compiler, do: +# /gcc/as el_segundo.s -o _temp.o +# /binutils/objdump -dr _temp.o >! _temp.d +# diff _temp.d el_segundo.d + + .section .rdata + .align 0 +.LC0: + .ascii "some data\000" + + .text + .global main +# .type main,function + .align 0 + +main: + smlabbgt r0,r1,r2,r3 + smlabb r0,r1,r2,r3 + smlatb r0,r1,r2,r3 + smlabt r0,r1,r2,r3 + smlatt r0,r1,r2,r3 + + smlawbgt r0,r1,r2,r3 + smlawb r0,r1,r2,r3 + smlawt r0,r1,r2,r3 + + smlalbbgt r0,r1,r2,r3 + smlalbb r0,r1,r2,r3 + smlaltb r0,r1,r2,r3 + smlalbt r0,r1,r2,r3 + smlaltt r0,r1,r2,r3 + + smulbbgt r0,r1,r2 + smulbb r0,r1,r2 + smultb r0,r1,r2 + smulbt r0,r1,r2 + smultt r0,r1,r2 + + smulwbgt r0,r1,r2 + smulwb r0,r1,r2 + smulwt r0,r1,r2 + + qaddgt r0,r1,r2 + qadd r0,r1,r2 + + qdadd r0,r1,r2 + qsub r0,r1,r2 + qdsub r0,r1,r2 + qsub r0,r1,r2 diff --git a/gas/testsuite/gas/vtable/vtable.exp b/gas/testsuite/gas/vtable/vtable.exp index 3a98d98d13c..4845ce4f94b 100644 --- a/gas/testsuite/gas/vtable/vtable.exp +++ b/gas/testsuite/gas/vtable/vtable.exp @@ -15,32 +15,17 @@ proc run_list_test { name opts } { } # Vtable bits are only supported by ELF targets. -if { ([istarget "*-*-elf*"] - || [istarget "*-*-linux*"]) +if { ( [istarget "*-*-elf*"] || [istarget "*-*-linux*"]) && ![istarget *-*-linux*aout*] && ![istarget *-*-linux*oldld*] } then { - - if {[istarget "ia64-*"]} then { - return - } - - if {[istarget "hppa*64*-*-*"]} then { - return - } - - # not supported by D30V - if {[istarget "d30v-*-*"]} { - return - } - - # not yet supported by i960 - if {[istarget "i960-*-*"]} { - return - } - - # not yet supported by ARC - if {[istarget "arc*-*-*"]} { - return + + # These tests are not (yet) supported on some targets. + if { [istarget "ia64-*"] + || [istarget "hppa*64*-*-*"] + || [istarget "i960-*-*"] + || [istarget "arc*-*-*"] + || [istarget "d30v-*-*"] } then { + return } run_dump_test "inherit0" @@ -48,10 +33,11 @@ if { ([istarget "*-*-elf*"] # The vtable entry results are different on Rel and Rela targets. if {[istarget "i*86-*-*"] + || [istarget "d10v-*-*"] || [istarget "mips*-*-*"] || [istarget "strongarm*-*-*"] || [istarget "xscale*-*-*"] - || [istarget "arm*-*-*"]} then { + || [istarget "arm*-*-*"] } then { run_dump_test "entry0" -- 2.30.2